From: Adam Ford <aford173@gmail.com>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Adam Ford <aford173@gmail.com>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: renesas: beacon: Fix i2c2 speed calcuation
Date: Mon, 20 Sep 2021 07:25:09 -0500 [thread overview]
Message-ID: <CAHCN7xJZ1+B+bo3EoBELvhx2OXkP5p8TsSC=_AcZEjpCjk15Jg@mail.gmail.com> (raw)
In-Reply-To: <YUB8Z8ArmIbjI6i+@ninjato>
On Tue, Sep 14, 2021 at 5:41 AM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
>
> On Wed, Aug 25, 2021 at 02:47:21PM +0200, Geert Uytterhoeven wrote:
> > CC Wolfram
> >
> > On Wed, Aug 25, 2021 at 2:28 PM Adam Ford <aford173@gmail.com> wrote:
> > > The desired i2c2 speed is 400KHz, but when measured on a scope, it
> > > is incorrect. The driver can use the i2c-scl-rising-time-ns to help
> > > calculate the proper setting to get exactly 400KHz.
>
> The question for me is: Has it been measured that SCL rising time is
> really 50ns or has it been measured that the bus clock is now exactly
> 400kHz?
The person who originally reported this to me moved on, so I don't
know if he measured both the rise time or just the clock speed. I
know originally, the clock speed was measured to be 426KHz instead of
400KHz, and with the change to the rise time, the measured clock speed
was exactly 400KHz. I do not know if the measured rise time is really
50ns or not.
adam
>
prev parent reply other threads:[~2021-09-20 12:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 12:27 [PATCH] arm64: dts: renesas: beacon: Fix i2c2 speed calcuation Adam Ford
2021-08-25 12:47 ` Geert Uytterhoeven
2021-09-14 10:41 ` Wolfram Sang
2021-09-20 12:25 ` Adam Ford [this message]
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