From: Arnd Bergmann <arnd@arndb.de>
To: Songjun Wu <songjun.wu@linux.intel.com>
Cc: hua.ma@linux.intel.com, yixin.zhu@linux.intel.com,
chuanhua.lei@intel.com,
"open list:RALINK MIPS ARCHITECTURE" <linux-mips@linux-mips.org>,
qi-ming.wu@intel.com, linux-clk <linux-clk@vger.kernel.org>,
linux-serial@vger.kernel.org, DTML <devicetree@vger.kernel.org>,
James Hogan <jhogan@kernel.org>, Jiri Slaby <jslaby@suse.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 4/7] tty: serial: lantiq: Always use readl()/writel()
Date: Thu, 14 Jun 2018 12:07:19 +0200 [thread overview]
Message-ID: <CAK8P3a0K6qezHLcjkeq0zd+iQJQc_qbT2JhtZGrCNRT495sUvQ@mail.gmail.com> (raw)
In-Reply-To: <20180612054034.4969-5-songjun.wu@linux.intel.com>
On Tue, Jun 12, 2018 at 7:40 AM, Songjun Wu <songjun.wu@linux.intel.com> wrote:
> Previous implementation uses platform-dependent functions
> ltq_w32()/ltq_r32() to access registers. Those functions are not
> available for other SoC which uses the same IP.
> Change to OS provided readl()/writel() and readb()/writeb(), so
> that different SoCs can use the same driver.
>
> Signed-off-by: Songjun Wu <songjun.wu@linux.intel.com>
Are there any big-endian machines using this driver? The original definition
of ltq_r32() uses non-byteswapping __raw_readl() etc, which suggests
that the registers might be wired up in a way that matches the CPU
endianess (this is usally a bad idea in hardware design, but nothing
we can influence in the OS).
When you change it to readl(), that will breaks all machines that rely
on the old behavior on big-endian kernels.
Arnd
next prev parent reply other threads:[~2018-06-14 10:07 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-12 5:40 [PATCH 0/7] MIPS: intel: add initial support for Intel MIPS SoCs Songjun Wu
2018-06-12 5:40 ` [PATCH 1/7] MIPS: dts: Add aliases node for lantiq danube serial Songjun Wu
2018-06-12 22:24 ` Rob Herring
2018-06-14 6:19 ` Wu, Songjun
2018-06-14 10:03 ` Arnd Bergmann
2018-06-18 9:42 ` Wu, Songjun
2018-06-18 10:59 ` Arnd Bergmann
2018-06-19 6:46 ` Wu, Songjun
2018-06-12 5:40 ` [PATCH 2/7] clk: intel: Add clock driver for GRX500 SoC Songjun Wu
2018-06-12 22:37 ` Rob Herring
2018-06-14 8:40 ` yixin zhu
2018-06-14 14:09 ` Rob Herring
2018-06-18 10:05 ` yixin zhu
2018-06-12 5:40 ` [PATCH 3/7] MIPS: intel: Add initial support for Intel MIPS SoCs Songjun Wu
2018-06-12 11:23 ` James Hogan
2018-06-14 9:24 ` yixin zhu
2018-06-12 22:31 ` Rob Herring
2018-06-14 8:01 ` Hua Ma
2018-06-12 5:40 ` [PATCH 4/7] tty: serial: lantiq: Always use readl()/writel() Songjun Wu
2018-06-12 8:13 ` Andy Shevchenko
2018-06-14 7:05 ` Wu, Songjun
2018-06-14 10:07 ` Arnd Bergmann [this message]
2018-06-18 9:39 ` Wu, Songjun
2018-06-18 11:52 ` Arnd Bergmann
2018-06-12 5:40 ` [PATCH 5/7] tty: serial: lantiq: Convert global lock to per device lock Songjun Wu
2018-06-12 5:40 ` [PATCH 6/7] tty: serial: lantiq: Remove unneeded header includes and macros Songjun Wu
2018-06-12 5:40 ` [PATCH 7/7] tty: serial: lantiq: Add CCF support Songjun Wu
2018-06-12 8:07 ` kbuild test robot
2018-06-12 8:07 ` kbuild test robot
2018-06-12 8:07 ` kbuild test robot
2018-06-12 22:39 ` Rob Herring
2018-06-14 6:38 ` Wu, Songjun
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