From: Alistair Francis <alistair23@gmail.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: "Damien Hedde" <damien.hedde@greensocs.com>,
"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
qemu-arm <qemu-arm@nongnu.org>,
"Alistair Francis" <alistair.francis@wdc.com>
Subject: Re: [PATCH v2 4/5] hw/char: cadence_uart: Convert to memop_with_attrs() ops
Date: Thu, 2 Sep 2021 12:32:17 +1000 [thread overview]
Message-ID: <CAKmqyKON_E3Pgds3B8UV6_E-ZvVRNE=UYCdkEmX2Rw1a=zc-3A@mail.gmail.com> (raw)
In-Reply-To: <20210901032724.23256-5-bmeng.cn@gmail.com>
On Wed, Sep 1, 2021 at 1:30 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> This converts uart_read() and uart_write() to memop_with_attrs() ops.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
>
> ---
>
> Changes in v2:
> - new patch: hw/char: cadence_uart: Convert to memop_with_attrs() ops
>
> hw/char/cadence_uart.c | 26 +++++++++++++++-----------
> 1 file changed, 15 insertions(+), 11 deletions(-)
>
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index fff8be3619..8bcf2b718a 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -411,15 +411,15 @@ static void uart_read_rx_fifo(CadenceUARTState *s, uint32_t *c)
> uart_update_status(s);
> }
>
> -static void uart_write(void *opaque, hwaddr offset,
> - uint64_t value, unsigned size)
> +static MemTxResult uart_write(void *opaque, hwaddr offset,
> + uint64_t value, unsigned size, MemTxAttrs attrs)
> {
> CadenceUARTState *s = opaque;
>
> DB_PRINT(" offset:%x data:%08x\n", (unsigned)offset, (unsigned)value);
> offset >>= 2;
> if (offset >= CADENCE_UART_R_MAX) {
> - return;
> + return MEMTX_DECODE_ERROR;
> }
> switch (offset) {
> case R_IER: /* ier (wts imr) */
> @@ -466,30 +466,34 @@ static void uart_write(void *opaque, hwaddr offset,
> break;
> }
> uart_update_status(s);
> +
> + return MEMTX_OK;
> }
>
> -static uint64_t uart_read(void *opaque, hwaddr offset,
> - unsigned size)
> +static MemTxResult uart_read(void *opaque, hwaddr offset,
> + uint64_t *value, unsigned size, MemTxAttrs attrs)
> {
> CadenceUARTState *s = opaque;
> uint32_t c = 0;
>
> offset >>= 2;
> if (offset >= CADENCE_UART_R_MAX) {
> - c = 0;
> - } else if (offset == R_TX_RX) {
> + return MEMTX_DECODE_ERROR;
> + }
> + if (offset == R_TX_RX) {
> uart_read_rx_fifo(s, &c);
> } else {
> - c = s->r[offset];
> + c = s->r[offset];
> }
>
> DB_PRINT(" offset:%x data:%08x\n", (unsigned)(offset << 2), (unsigned)c);
> - return c;
> + *value = c;
> + return MEMTX_OK;
> }
>
> static const MemoryRegionOps uart_ops = {
> - .read = uart_read,
> - .write = uart_write,
> + .read_with_attrs = uart_read,
> + .write_with_attrs = uart_write,
> .endianness = DEVICE_NATIVE_ENDIAN,
> };
>
> --
> 2.25.1
>
>
next prev parent reply other threads:[~2021-09-02 2:35 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-01 3:27 [PATCH v2 0/5] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure Bin Meng
2021-09-01 3:27 ` [PATCH v2 1/5] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase Bin Meng
2021-09-01 3:27 ` [PATCH v2 2/5] hw/char: cadence_uart: Disable transmit when input clock is disabled Bin Meng
2021-09-01 3:27 ` [PATCH v2 3/5] hw/char: cadence_uart: Move clock/reset check to uart_can_receive() Bin Meng
2021-09-02 2:30 ` Alistair Francis
2021-09-02 6:00 ` Philippe Mathieu-Daudé
2021-09-01 3:27 ` [PATCH v2 4/5] hw/char: cadence_uart: Convert to memop_with_attrs() ops Bin Meng
2021-09-02 2:32 ` Alistair Francis [this message]
2021-09-01 3:27 ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Bin Meng
2021-09-01 8:32 ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read,write}() Edgar E. Iglesias
2021-09-01 10:52 ` Bin Meng
2021-09-02 6:10 ` Philippe Mathieu-Daudé
2021-09-02 6:09 ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Philippe Mathieu-Daudé
2021-09-02 6:11 ` Philippe Mathieu-Daudé
2021-09-05 14:31 ` Bin Meng
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