All of lore.kernel.org
 help / color / mirror / Atom feed
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Magnus Damm <magnus.damm@gmail.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>
Subject: Re: [PATCH v2 3/5] spi: Add support for Renesas CSI
Date: Fri, 14 Jul 2023 09:30:21 +0200	[thread overview]
Message-ID: <CAMuHMdUPOQZAM=Rq8tMLj8ikoCz_ff4kYF3_uuX7PKtBwaMGwA@mail.gmail.com> (raw)
In-Reply-To: <TYWPR01MB8775E433ACFA2F78D357FF05C237A@TYWPR01MB8775.jpnprd01.prod.outlook.com>

Hi Fabrizio,

On Fri, Jul 14, 2023 at 12:35 AM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> > From: Andy Shevchenko <andy.shevchenko@gmail.com>
> > Subject: Re: [PATCH v2 3/5] spi: Add support for Renesas CSI
> >
> > On Thu, Jul 13, 2023 at 6:52 PM Fabrizio Castro
> > <fabrizio.castro.jz@renesas.com> wrote:
> >
> > ...
> >
> > > > > +#define CSI_CKS_MAX                0x3FFF
> > > >
> > > > If it's limited by number of bits, i would explicitly use that
> > information
> > > > as
> > > > (BIT(14) - 1).
> > >
> > > That value represents the register setting for the maximum clock
> > divider.
> > > The maximum divider and corresponding register setting are plainly
> > stated
> > > in the HW User Manual, therefore I would like to use either (plain)
> > value
> > > to make it easier for the reader.
> > >
> > > I think perhaps the below makes this clearer:
> > > #define CSI_CKS_MAX_DIV_RATIO   32766
> >
> > Hmm... To me it's a bit confusing now. Shouldn't it be 32767?
>
> 32766 is the correct value.
>
> Clock "csiclk" gets divided by 2 * CSI_CLKSEL_CKS in order to generate the
> serial clock (output from master), with CSI_CLKSEL_CKS ranging from 0x1 (that
> means "csiclk" is divided by 2) to 0x3FFF ("csiclk" is divided by 32766).
>
> >
> > > #define CSI_CKS_MAX             (CSI_CKS_MAX_DIV_RATIO >> 1)
> >
> > Whatever you choose it would be better to add a comment to explain
> > this. Because the above is more clear to me with BIT(14)-1 if the
> > register field is 14-bit long.
> > With this value(s) I'm lost. Definitely needs a comment.
>
> To cater for a wider audience (and not just for those who have read the
> HW manual), I think perhaps the below would probably be the best compromise:
>
> /*
>  * Clock "csiclk" gets divided by 2 * CSI_CLKSEL_CKS in order to generate the
>  * serial clock (output from master), with CSI_CLKSEL_CKS ranging from 0x1 (that
>  * means "csiclk" is divided by 2) to 0x3FFF ("csiclk" is divided by 32766).
>  */
> #define CSI_CKS_MAX             (BIT(14)-1)

Or GENMASK(13, 0)

As we have

    #define CSI_CLKSEL_CKS          GENMASK(14, 1)

and bit 0 must of the CLKSEL register must always be zero, the actual
divider is incidentally FIELD_GET(GENMASK(14, 0), clksel).
No idea if that can be useful to simplify the code, though ;-)

> > > static inline unsigned int x_trg(unsigned int words)
> > > {
> > >         return fls(words) - 1;
> > > }
> >
> > OK, but I think you can use it just inplace, no need to have such as a
> > standalone function.
>
> The above is actually equivalent to ilog2()
>
> >
> > > static inline unsigned int x_trg_words(unsigned int words)
> > > {
> > >         return 1 << x_trg(words);
> > > }
> >
> > Besides a better form of BIT(...) this looks to me like NIH
> > roundup_pow_of_two().
>
> rounddown_pow_of_two().
>
> I have tested the driver with s/x_trg/ilog2 and
> s/x_trg_words/roundup_pow_of_two and it looks like I am losing tiny bit of
> performance (probably down to the use of ternary operators in both macros)
> but I think it's okay, let's not reinvent the wheel and let's keep it more
> readable, I'll switch to using the above macros.

You mean this is not lost in the noise of the big loop in
rzv2m_csi_pio_transfer(), which is even waiting on an event?
I find that a bit surprising...

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2023-07-14  7:30 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-22 11:33 [PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M Fabrizio Castro
2023-06-22 11:33 ` Fabrizio Castro
2023-06-22 11:33 ` [PATCH v2 1/5] spi: dt-bindings: Add bindings for RZ/V2M CSI Fabrizio Castro
2023-07-03  9:43   ` Geert Uytterhoeven
2023-06-22 11:33 ` [PATCH v2 2/5] clk: renesas: r9a09g011: Add CSI related clocks Fabrizio Castro
2023-07-03  9:59   ` Geert Uytterhoeven
2023-06-22 11:33 ` [PATCH v2 3/5] spi: Add support for Renesas CSI Fabrizio Castro
2023-07-03 10:19   ` Geert Uytterhoeven
2023-07-05 10:24     ` andy.shevchenko
2023-07-05 11:36       ` Geert Uytterhoeven
2023-07-10 16:23     ` Fabrizio Castro
2023-07-05 10:41   ` andy.shevchenko
2023-07-13 15:52     ` Fabrizio Castro
2023-07-13 16:37       ` Andy Shevchenko
2023-07-13 22:35         ` Fabrizio Castro
2023-07-14  7:30           ` Geert Uytterhoeven [this message]
2023-07-14  9:36             ` Fabrizio Castro
2023-06-22 11:33 ` [PATCH v2 4/5] arm64: dts: renesas: r9a09g011: Add CSI nodes Fabrizio Castro
2023-07-03 11:47   ` Geert Uytterhoeven
2023-06-22 11:33 ` [PATCH v2 5/5] arm64: defconfig: Enable Renesas RZ/V2M CSI driver Fabrizio Castro
2023-06-22 11:33   ` Fabrizio Castro
2023-07-03 11:49   ` Geert Uytterhoeven
2023-07-03 11:49     ` Geert Uytterhoeven
2023-06-23  0:32 ` [PATCH v2 0/5] spi: Add CSI support for Renesas RZ/V2M Mark Brown
2023-06-23  0:32   ` Mark Brown
2023-06-23  6:49   ` Geert Uytterhoeven
2023-06-23  6:49     ` Geert Uytterhoeven
2023-06-23 10:05     ` Mark Brown
2023-06-23 10:05       ` Mark Brown
2023-06-23 15:08 ` (subset) " Mark Brown
2023-06-23 15:08   ` Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAMuHMdUPOQZAM=Rq8tMLj8ikoCz_ff4kYF3_uuX7PKtBwaMGwA@mail.gmail.com' \
    --to=geert@linux-m68k.org \
    --cc=Chris.Paterson2@renesas.com \
    --cc=andy.shevchenko@gmail.com \
    --cc=biju.das@bp.renesas.com \
    --cc=broonie@kernel.org \
    --cc=fabrizio.castro.jz@renesas.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=magnus.damm@gmail.com \
    --cc=p.zabel@pengutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.