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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 1/6] arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node
Date: Mon, 2 May 2022 18:00:48 +0200	[thread overview]
Message-ID: <CAMuHMdV1fO4EuV2n-iQ1jYmX9Fz5B6nX8oYMfduVHSEPAKG+dg@mail.gmail.com> (raw)
In-Reply-To: <20220501112926.47024-2-biju.das.jz@bp.renesas.com>

Hi Biju,

On Sun, May 1, 2022 at 1:29 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> @@ -418,12 +418,20 @@ adc: adc@10059000 {
>                 };
>
>                 sbc: spi@10060000 {
> +                       compatible = "renesas,r9a07g043-rpc-if",
> +                                    "renesas,rzg2l-rpc-if";
>                         reg = <0 0x10060000 0 0x10000>,
>                               <0 0x20000000 0 0x10000000>,
>                               <0 0x10070000 0 0x10000>;
> +                       reg-names = "regs", "dirmap", "wbuf";
> +                       interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

LGTM, but this interrupt is not documented in the RZ/G2UL Hardware
User's Manual (Rev. 0.51 and 1.00)?

> +                       clocks = <&cpg CPG_MOD R9A07G043_SPI_CLK2>,
> +                                <&cpg CPG_MOD R9A07G043_SPI_CLK>;
> +                       resets = <&cpg R9A07G043_SPI_RST>;
> +                       power-domains = <&cpg>;
>                         #address-cells = <1>;
>                         #size-cells = <0>;
> -                       /* place holder */
> +                       status = "disabled";
>                 };
>
>                 cpg: clock-controller@11010000 {

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2022-05-02 16:01 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-01 11:29 [PATCH 0/6] Add OPP, TSU, RSPI and SPI Multi I/O Bus controller node Biju Das
2022-05-01 11:29 ` [PATCH 1/6] arm64: dts: renesas: r9a07g043: Add " Biju Das
2022-05-02 16:00   ` Geert Uytterhoeven [this message]
2022-05-02 16:18     ` Biju Das
2022-05-02 16:53       ` Geert Uytterhoeven
2022-05-01 11:29 ` [PATCH 2/6] arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodes Biju Das
2022-05-02 16:09   ` Geert Uytterhoeven
2022-05-01 11:29 ` [PATCH 3/6] arm64: dts: renesas: r9a07g043: Add OPP table Biju Das
2022-05-02 16:57   ` Geert Uytterhoeven
2022-05-01 11:29 ` [PATCH 4/6] arm64: dts: renesas: r9a07g043: Add TSU node Biju Das
2022-05-02 16:10   ` Geert Uytterhoeven
2022-05-01 11:29 ` [PATCH 5/6] arm64: dts: renesas: r9a07g043: Create thermal zone to support IPA Biju Das
2022-05-02 16:14   ` Geert Uytterhoeven
2022-05-01 11:29 ` [PATCH 6/6] arm64: dts: renesas: r9a07g043: Add ADC node Biju Das

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