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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Simon Horman <horms+renesas@verge.net.au>,
	Magnus Damm <damm+renesas@opensource.se>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Toru Oishi <toru.oishi.zj@rvc.renesas.com>,
	Linux PM list <linux-pm@vger.kernel.org>
Subject: Re: [RFC 4/4] arm64: dts: r8a7795: Add Z clock scaling support
Date: Tue, 17 May 2016 15:03:23 +0200	[thread overview]
Message-ID: <CAMuHMdW52t9SZq89QjdB=P-aM8dCSq-YYLCxRA7Wk1NVGLsUPg@mail.gmail.com> (raw)
In-Reply-To: <5731678E.3080003@rvc.renesas.com>

On Tue, May 10, 2016 at 6:46 AM, Khiem Nguyen
<khiem.nguyen.xt@rvc.renesas.com> wrote:
> This patch adds Z clock scaling support for CA57 in R8A7795 SoC.
> An OPP table is created with the supported frequency scaling.
>
> Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index 7181db0..041d0f2 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -43,6 +43,8 @@
>                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
>                         next-level-cache = <&L2_CA57>;
>                         enable-method = "psci";
> +                       clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
> +                       operating-points-v2 = <&cluster0_opp_tb0>;
>                 };
>
>                 a57_1: cpu@1 {
> @@ -52,6 +54,7 @@
>                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
>                         next-level-cache = <&L2_CA57>;
>                         enable-method = "psci";
> +                       operating-points-v2 = <&cluster0_opp_tb0>;
>                 };
>                 a57_2: cpu@2 {
>                         compatible = "arm,cortex-a57","arm,armv8";
> @@ -60,6 +63,7 @@
>                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
>                         next-level-cache = <&L2_CA57>;
>                         enable-method = "psci";
> +                       operating-points-v2 = <&cluster0_opp_tb0>;
>                 };
>                 a57_3: cpu@3 {
>                         compatible = "arm,cortex-a57","arm,armv8";
> @@ -68,6 +72,28 @@
>                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
>                         next-level-cache = <&L2_CA57>;
>                         enable-method = "psci";
> +                       operating-points-v2 = <&cluster0_opp_tb0>;
> +               };
> +       };
> +
> +       cluster0_opp_tb0: opp_table0 {
> +               compatible = "operating-points-v2";
> +               opp-shared;
> +
> +               opp@500000000 {
> +                       opp-hz = /bits/ 64 <500000000>;
> +                       opp-microvolt = <820000>;
> +                       clock-latency-ns = <300000>;
> +               };
> +               opp@1000000000 {
> +                       opp-hz = /bits/ 64 <1000000000>;
> +                       opp-microvolt = <820000>;
> +                       clock-latency-ns = <300000>;
> +               };
> +               opp@1500000000 {
> +                       opp-hz = /bits/ 64 <1500000000>;
> +                       opp-microvolt = <820000>;
> +                       clock-latency-ns = <300000>;

With W=1:

Warning (unit_address_vs_reg): Node /opp_table0/opp@500000000 has a
unit name, but no reg property
Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property
Warning (unit_address_vs_reg): Node /opp_table0/opp@1500000000 has a
unit name, but no reg property

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2016-05-17 13:03 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-04 14:35 [PATCH 0/4] clk: renesas: cpg-mssr: Add support for R-Car M3-W Geert Uytterhoeven
2016-05-04 14:35 ` [PATCH 2/4] clk: renesas: Add r8a7796 CPG Core Clock Definitions Geert Uytterhoeven
     [not found] ` <1462372543-31835-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2016-05-04 14:35   ` [PATCH 1/4] clk: renesas: cpg-mssr: Document r8a7796 support Geert Uytterhoeven
2016-05-04 14:35     ` Geert Uytterhoeven
2016-05-05 22:13     ` Rob Herring
2016-05-04 14:35   ` [PATCH 3/4] clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code Geert Uytterhoeven
2016-05-04 14:35     ` Geert Uytterhoeven
2016-05-04 14:35 ` [PATCH 4/4] clk: renesas: cpg-mssr: Add support for R-Car M3-W Geert Uytterhoeven
2016-05-10  4:40 ` [RFC 0/4] Add Z clock support Khiem Nguyen
2016-05-10  4:55   ` [PATCH 0/2] cpufreq: rcar: Enable CPUFreq support Khiem Nguyen
2016-05-10  4:55     ` Khiem Nguyen
2016-05-10  4:55     ` Khiem Nguyen
2016-05-10  4:57     ` [PATCH 1/2] cpufreq: rcar: Add support for R8A7795 SoC Khiem Nguyen
2016-05-10  4:57       ` Khiem Nguyen
2016-05-10  4:59       ` [PATCH 2/2] cpufreq: rcar: Add support for R8A7796 SoC Khiem Nguyen
2016-05-10  4:59         ` Khiem Nguyen
2016-05-10  5:07         ` Viresh Kumar
2016-05-10  5:07           ` Viresh Kumar
2016-05-10  5:07       ` [PATCH 1/2] cpufreq: rcar: Add support for R8A7795 SoC Viresh Kumar
2016-05-10  5:07         ` Viresh Kumar
2016-05-10  8:17         ` Geert Uytterhoeven
2016-05-10  8:17           ` Geert Uytterhoeven
2016-05-10  8:19           ` Viresh Kumar
2016-05-10  8:19             ` Viresh Kumar
2016-05-13  8:55   ` [RFC 0/4] Add Z clock support Geert Uytterhoeven
2016-05-10  4:42 ` [RFC 1/4] clk: renesas: rcar-gen3-cpg: Add Z clock Khiem Nguyen
2016-05-13  8:54   ` Geert Uytterhoeven
2016-09-23  8:32   ` Geert Uytterhoeven
2016-05-10  4:43 ` [RFC 2/4] clk: renesas: r8a7795: " Khiem Nguyen
2016-05-10  4:44   ` [RFC 3/4] clk: renesas: r8a7796: " Khiem Nguyen
2016-05-10  7:39     ` Geert Uytterhoeven
2016-05-10  4:46   ` [RFC 4/4] arm64: dts: r8a7795: Add Z clock scaling support Khiem Nguyen
2016-05-17 13:03     ` Geert Uytterhoeven [this message]
2016-05-13  8:55   ` [RFC 2/4] clk: renesas: r8a7795: Add Z clock Geert Uytterhoeven
2016-05-26  2:35 ` [PATCH 0/4] clk: renesas: cpg-mssr: Add support for R-Car M3-W Simon Horman
2016-05-26  6:55   ` Geert Uytterhoeven
2016-05-27  0:49     ` Simon Horman

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