From: "Lespiau, Damien" <damien.lespiau@intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 09/14] drm/i915: fix DP AUX register definitions on Haswell
Date: Thu, 18 Oct 2012 14:57:41 +0100 [thread overview]
Message-ID: <CAPX-8+8zj0WPGWgLUfDmsoqJxW47x=sKUrJWDqyO4mY9VpANjg@mail.gmail.com> (raw)
In-Reply-To: <1350327102-4463-10-git-send-email-przanoni@gmail.com>
On Mon, Oct 15, 2012 at 7:51 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> The old rule that the AUX registers are just an offset (+4 and +10)
> from output_reg is not true anymore, since output_reg in on the CPU
> and some AUX regs are on the PCH.
Right, dp.output_reg is now DDI_BUF_CTL(port), note that _DATA is
still _AUX_CH_CTL + 4, so could keep that logic and just have switch
for DP_AUX_CH_CTL.
> +#define PCH_DPB_AUX_CH_CTL 0xe4110
> +#define PCH_DPC_AUX_CH_CTL 0xe4210
> +#define PCH_DPD_AUX_CH_CTL 0xe4310
> +
> +#define PCH_DPB_AUX_CH_DATA 0xe4114
> +#define PCH_DPC_AUX_CH_DATA 0xe4214
> +#define PCH_DPD_AUX_CH_DATA 0xe4314
Those defines are already there AFAICS:
http://cgit.freedesktop.org/~danvet/drm-intel/tree/drivers/gpu/drm/i915/i915_reg.h#n4017
--
Damien
next prev parent reply other threads:[~2012-10-18 13:57 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-15 18:51 [PATCH 00/14] Haswell DP enablement Paulo Zanoni
2012-10-15 18:51 ` [PATCH 01/14] drm/i915: add DP support to intel_ddi_enable_pipe_func Paulo Zanoni
2012-10-16 10:04 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 02/14] drm/i915: add intel_ddi_set_pipe_settings Paulo Zanoni
2012-10-16 8:05 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 03/14] drm/i915: add DP support to intel_ddi_pll_mode_set Paulo Zanoni
2012-10-15 18:51 ` [PATCH 04/14] drm/i915: add DP support to intel_ddi_disable_port Paulo Zanoni
2012-10-16 10:05 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 05/14] drm/i915: add DP support to intel_ddi_mode_set Paulo Zanoni
2012-10-18 18:00 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 06/14] drm/i915: add basic Haswell DP link train bits Paulo Zanoni
2012-10-16 11:47 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n Paulo Zanoni
2012-10-16 11:49 ` Jani Nikula
2012-10-17 20:27 ` Daniel Vetter
2012-10-18 17:14 ` Paulo Zanoni
2012-10-18 19:36 ` Daniel Vetter
2012-10-15 18:51 ` [PATCH 08/14] drm/i915: fix Haswell DP M/N registers Paulo Zanoni
2012-10-15 20:29 ` Adam Jackson
2012-10-15 20:39 ` Daniel Vetter
2012-10-15 20:45 ` Paulo Zanoni
2012-10-18 15:42 ` [PATCH 08/83] " Paulo Zanoni
2012-10-15 18:51 ` [PATCH 09/14] drm/i915: fix DP AUX register definitions on Haswell Paulo Zanoni
2012-10-18 13:57 ` Lespiau, Damien [this message]
2012-10-15 18:51 ` [PATCH 10/14] drm/i915: add DP support to intel_ddi_get_encoder_port Paulo Zanoni
2012-10-18 14:06 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 11/14] drm/i915: add DP support to intel_ddi_get_hw_state Paulo Zanoni
2012-10-18 14:14 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 12/14] drm/i915: add DP support to intel_enable_ddi Paulo Zanoni
2012-10-18 14:20 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 13/14] drm/i915: implement Haswell DP link train sequence Paulo Zanoni
2012-10-18 17:34 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 14/14] drm/i915: set the correct function pointers for Haswell DP Paulo Zanoni
2012-10-18 17:36 ` Lespiau, Damien
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