Re: [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map

From: Dan Williams <dan.j.williams@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ira Weiny <ira.weiny@intel.com>,
	linux-cxl@vger.kernel.org, Linux PCI <linux-pci@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map
Date: Fri, 15 Oct 2021 09:56:42 -0700	[thread overview]
Message-ID: <CAPcyv4gM-wNs6NP7tCKMZfRGoHJd6U8DyPbRr+mO0zUziwFQrA@mail.gmail.com> (raw)
In-Reply-To: <20211015172930.00007f21@Huawei.com>

On Fri, Oct 15, 2021 at 9:29 AM Jonathan Cameron
<Jonathan.Cameron@huawei.com> wrote:
>
> On Wed, 13 Oct 2021 15:53:20 -0700
> Dan Williams <dan.j.williams@intel.com> wrote:
>
> > On Sat, Oct 9, 2021 at 9:21 PM Ira Weiny <ira.weiny@intel.com> wrote:
> > >
> > > On Sat, Oct 09, 2021 at 09:44:29AM -0700, Dan Williams wrote:
> > > > In addition to carrying @barno, @block_offset, and @reg_type, add @base
> > > > to keep all map/unmap parameters in one object. The helpers
> > > > cxl_{map,unmap}_regblock() handle adjusting @base to the @block_offset
> > > > at map and unmap time.
> > > >
> > > > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > > > ---
> > > >  drivers/cxl/cxl.h |    1 +
> > > >  drivers/cxl/pci.c |   31 ++++++++++++++++---------------
> > > >  2 files changed, 17 insertions(+), 15 deletions(-)
> > > >
> > > > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> > > > index a6687e7fd598..7cd16ef144dd 100644
> > > > --- a/drivers/cxl/cxl.h
> > > > +++ b/drivers/cxl/cxl.h
> > > > @@ -140,6 +140,7 @@ struct cxl_device_reg_map {
> > > >  };
> > > >
> > > >  struct cxl_register_map {
> > > > +     void __iomem *base;
> > > >       u64 block_offset;
> > > >       u8 reg_type;
> > > >       u8 barno;
> > > > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> > > > index 9f006299a0e3..b42407d067ac 100644
> > > > --- a/drivers/cxl/pci.c
> > > > +++ b/drivers/cxl/pci.c
> > > > @@ -306,8 +306,7 @@ static int cxl_pci_setup_mailbox(struct cxl_mem *cxlm)
> > > >       return 0;
> > > >  }
> > > >
> > > > -static void __iomem *cxl_pci_map_regblock(struct pci_dev *pdev,
> > > > -                                       struct cxl_register_map *map)
> > > > +static int cxl_map_regblock(struct pci_dev *pdev, struct cxl_register_map *map)
> > > >  {
> > > >       void __iomem *addr;
> > > >       int bar = map->barno;
> > > > @@ -318,24 +317,27 @@ static void __iomem *cxl_pci_map_regblock(struct pci_dev *pdev,
> > > >       if (pci_resource_len(pdev, bar) < offset) {
> > > >               dev_err(dev, "BAR%d: %pr: too small (offset: %#llx)\n", bar,
> > > >                       &pdev->resource[bar], (unsigned long long)offset);
> > > > -             return NULL;
> > > > +             return -ENXIO;
> > > >       }
> > > >
> > > >       addr = pci_iomap(pdev, bar, 0);
> > > >       if (!addr) {
> > > >               dev_err(dev, "failed to map registers\n");
> > > > -             return addr;
> > > > +             return -ENOMEM;
> > > >       }
> > > >
> > > >       dev_dbg(dev, "Mapped CXL Memory Device resource bar %u @ %#llx\n",
> > > >               bar, offset);
> > > >
> > > > -     return addr;
> > > > +     map->base = addr + map->block_offset;
> > > > +     return 0;
> > > >  }
> > > >
> > > > -static void cxl_pci_unmap_regblock(struct pci_dev *pdev, void __iomem *base)
> > > > +static void cxl_unmap_regblock(struct pci_dev *pdev,
> > > > +                            struct cxl_register_map *map)
> > > >  {
> > > > -     pci_iounmap(pdev, base);
> > > > +     pci_iounmap(pdev, map->base - map->block_offset);
> > >
> > > I know we need to get these in soon.  But I think map->base should be 'base'
> > > and map->block_offset should be handled in cxl_probe_regs() rather than
> > > subtract it here..
> >
> > But why? The goal of the cxl_register_map cleanups is to reduce the
> > open-coding for details that can just be passed around in a @map
> > instance. Once cxl_map_regblock() sets up @base there's little reason
> > to consider the hardware regblock details.
>
> I agree with Ira to the extent that this was a little confusing.   Perhaps it is worth
> a comment at the structure definition to make the relationship of block_offset
> and base clear?
>

I can add that, sure.