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From: Dan Williams <dan.j.williams@intel.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: "linux-nvdimm@lists.01.org" <linux-nvdimm@lists.01.org>,
	"Koul, Vinod  <vinod.koul@intel.com>,
	Christoph Hellwig <hch@infradead.org>,
	dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>
Subject: Re: [PATCH v5 7/7] libnvdimm: Add blk-mq pmem driver
Date: Wed, 23 Aug 2017 12:58:08 -0700	[thread overview]
Message-ID: <CAPcyv4idv6NL8B8DpjW-L2DTtMLvOFh5+M6rAE3-JSTvAkUPvg@mail.gmail.com> (raw)
In-Reply-To: <cc37e79b-904e-a8a3-faae-28887ed28b0f@intel.com>

On Wed, Aug 23, 2017 at 12:56 PM, Dave Jiang <dave.jiang@intel.com> wrote:
>
>
> On 08/23/2017 11:39 AM, Dan Williams wrote:
>> On Mon, Aug 21, 2017 at 2:11 PM, Dave Jiang <dave.jiang@intel.com> wrote:
>>> Adding a DMA supported blk-mq driver for pmem.
>>
>> "Add support for offloading pmem block-device I/O operations to a DMA engine."
>>
>>> This provides signficant CPU
>>
>> *significant
>>
>>> utilization reduction.
>>
>> "at the cost of some increased latency and bandwidth reduction in some cases."
>>
>>> By default the pmem driver will be using blk-mq with
>>
>> "By default the current cpu-copy based pmem driver will load, but this
>> driver can be manually selected with a modprobe configuration."
>>
>>> DMA through the dmaengine API. DMA can be turned off with use_dma=0 kernel
>>> parameter.
>>
>> Do we need the module option? It seems for debug / testing a user can
>> simply unload the ioatdma driver, otherwise we should use dma by
>> default.
>>
>>> Additional kernel parameters are provided:
>>>
>>> queue_depth: The queue depth for blk-mq. Typically in relation to what the
>>>              DMA engine can provide per queue/channel. This needs to take
>>>              into account of num_sg as well for some DMA engines. i.e.
>>>              num_sg * queue_depth < total descriptors available per queue or
>>>              channel.
>>>
>>> q_per_node: Hardware queues per node. Typically the number of channels the
>>>             DMA engine can provide per socket.
>>> num_sg: Number of scatterlist we can handle per I/O request.
>>
>> Why do these need to be configurable?
>
> The concern is with other arch/platforms that have different DMA
> engines. The configurations would be platform dependent.

...but these are answers we should be able to get from dmaengine and
the specific DMA drivers in use. An end user has no chance of guessing
the right values.
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  reply	other threads:[~2017-08-23 19:55 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-21 21:10 [PATCH v5 0/7] libnvdimm: add DMA support for pmem blk-mq Dave Jiang
2017-08-21 21:10 ` [PATCH v5 1/7] dmaengine: ioatdma: revert 7618d035 to allow sharing of DMA channels Dave Jiang
2017-08-21 21:10 ` [PATCH v5 2/7] dmaengine: Add DMA_MEMCPY_SG transaction op Dave Jiang
2017-08-21 21:10 ` [PATCH v5 3/7] dmaengine: add verification of DMA_MEMSET_SG in dmaengine Dave Jiang
2017-08-21 21:10 ` [PATCH v5 4/7] dmaengine: ioatdma: dma_prep_memcpy_sg support Dave Jiang
2017-08-21 21:11 ` [PATCH v5 5/7] dmaengine: add function to provide per descriptor xfercap for dma engine Dave Jiang
2017-08-21 21:11 ` [PATCH v5 6/7] dmaengine: add SG support to dmaengine_unmap Dave Jiang
2017-08-21 21:11 ` [PATCH v5 7/7] libnvdimm: Add blk-mq pmem driver Dave Jiang
2017-08-23 18:39   ` Dan Williams
2017-08-23 19:56     ` Dave Jiang
2017-08-23 19:58       ` Dan Williams [this message]
2017-08-24 18:52   ` kbuild test robot

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