Re: [PATCH] drm/etnaviv: fix DMA direction handling for cached read/write buffers

From: Daniel Stone <daniel@fooishbar.org>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	patchwork-lst@pengutronix.de,
	Christian Gmeiner <christian.gmeiner@gmail.com>,
	kernel@pengutronix.de,
	Russell King <linux+etnaviv@armlinux.org.uk>
Subject: Re: [PATCH] drm/etnaviv: fix DMA direction handling for cached read/write buffers
Date: Mon, 29 Jan 2024 10:29:08 +0000	[thread overview]
Message-ID: <CAPj87rNOMYS7g_bU8Xjmh9xEJhuzG+BViXakC7wzgiDaG+9yCg@mail.gmail.com> (raw)
In-Reply-To: <20240126165856.1199387-1-l.stach@pengutronix.de>

Hi Lucas,

On Fri, 26 Jan 2024 at 17:00, Lucas Stach <l.stach@pengutronix.de> wrote:
> The dma sync operation needs to be done with DMA_BIDIRECTIONAL when
> the BO is prepared for both read and write operations. With the
> current inverted if ladder it would only be synced for DMA_FROM_DEVICE.
>
> [...]
>
>  static inline enum dma_data_direction etnaviv_op_to_dma_dir(u32 op)
>  {
> -       if (op & ETNA_PREP_READ)
> +       if (op & (ETNA_PREP_READ | ETNA_PREP_WRITE))
> +               return DMA_BIDIRECTIONAL;

This test will always be true for _either_ read or write.

Cheers,
Daniel