From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
Cc: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Thomas Chou <thomas-SDxUXYEhEBiCuPEqFHbRBg@public.gmane.org>,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Applied "spi: altera: Switch to SPI core transfer queue management" to the spi tree
Date: Wed, 16 Aug 2017 12:21:11 +0100 [thread overview]
Message-ID: <E1dhwNr-0003kF-EL@finisterre> (raw)
In-Reply-To: <20170816093312.23048-1-lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
The patch
spi: altera: Switch to SPI core transfer queue management
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From e19b63cd3cb7ebf1ca73d9c4f58934149337ed24 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
Date: Wed, 16 Aug 2017 11:33:11 +0200
Subject: [PATCH] spi: altera: Switch to SPI core transfer queue management
The Altera SPI driver currently uses the spi-bitbang infrastructure for
transfer queue management, but non of the bitbang functionality itself.
This is because when the driver was written this was the only way to not
have to do queue management in the driver itself.
Nowadays transfer queue management is available from the SPI driver core
itself and using the bitbang infrastructure just adds an additional level
of indirection.
Switch the driver over to using the core queue management directly.
Signed-off-by: Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
drivers/spi/Kconfig | 1 -
drivers/spi/spi-altera.c | 94 ++++++++++++++----------------------------------
2 files changed, 27 insertions(+), 68 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 9b31351fe429..acf566f06241 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -55,7 +55,6 @@ comment "SPI Master Controller Drivers"
config SPI_ALTERA
tristate "Altera SPI Controller"
- select SPI_BITBANG
help
This is the driver for the Altera SPI Controller.
diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c
index b95010e72452..bfac34068999 100644
--- a/drivers/spi/spi-altera.c
+++ b/drivers/spi/spi-altera.c
@@ -18,7 +18,6 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
-#include <linux/spi/spi_bitbang.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -45,10 +44,6 @@
#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
struct altera_spi {
- /* bitbang has to be first */
- struct spi_bitbang bitbang;
- struct completion done;
-
void __iomem *base;
int irq;
int len;
@@ -66,39 +61,18 @@ static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
return spi_master_get_devdata(sdev->master);
}
-static void altera_spi_chipsel(struct spi_device *spi, int value)
+static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
{
struct altera_spi *hw = altera_spi_to_hw(spi);
- if (spi->mode & SPI_CS_HIGH) {
- switch (value) {
- case BITBANG_CS_INACTIVE:
- writel(1 << spi->chip_select,
- hw->base + ALTERA_SPI_SLAVE_SEL);
- hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
- writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
- break;
-
- case BITBANG_CS_ACTIVE:
- hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
- writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
- writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
- break;
- }
+ if (is_high) {
+ hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
+ writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
+ writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
} else {
- switch (value) {
- case BITBANG_CS_INACTIVE:
- hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
- writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
- break;
-
- case BITBANG_CS_ACTIVE:
- writel(1 << spi->chip_select,
- hw->base + ALTERA_SPI_SLAVE_SEL);
- hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
- writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
- break;
- }
+ writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
+ hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
+ writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
}
}
@@ -116,9 +90,10 @@ static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
return 0;
}
-static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
+static int altera_spi_txrx(struct spi_master *master,
+ struct spi_device *spi, struct spi_transfer *t)
{
- struct altera_spi *hw = altera_spi_to_hw(spi);
+ struct altera_spi *hw = spi_master_get_devdata(master);
hw->tx = t->tx_buf;
hw->rx = t->rx_buf;
@@ -133,11 +108,6 @@ static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
/* send the first byte */
writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA);
-
- wait_for_completion(&hw->done);
- /* disable receive interrupt */
- hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
- writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
} else {
while (hw->count < hw->len) {
unsigned int rxd;
@@ -164,14 +134,16 @@ static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
hw->count++;
}
+ spi_finalize_current_transfer(master);
}
- return hw->count * hw->bytes_per_word;
+ return t->len;
}
static irqreturn_t altera_spi_irq(int irq, void *dev)
{
- struct altera_spi *hw = dev;
+ struct spi_master *master = dev;
+ struct altera_spi *hw = spi_master_get_devdata(master);
unsigned int rxd;
rxd = readl(hw->base + ALTERA_SPI_RXDATA);
@@ -189,10 +161,15 @@ static irqreturn_t altera_spi_irq(int irq, void *dev)
hw->count++;
- if (hw->count < hw->len)
+ if (hw->count < hw->len) {
writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA);
- else
- complete(&hw->done);
+ } else {
+ /* disable receive interrupt */
+ hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
+ writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
+
+ spi_finalize_current_transfer(master);
+ }
return IRQ_HANDLED;
}
@@ -214,14 +191,10 @@ static int altera_spi_probe(struct platform_device *pdev)
master->mode_bits = SPI_CS_HIGH;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
master->dev.of_node = pdev->dev.of_node;
+ master->transfer_one = altera_spi_txrx;
+ master->set_cs = altera_spi_set_cs;
hw = spi_master_get_devdata(master);
- platform_set_drvdata(pdev, hw);
-
- /* setup the state for the bitbang driver */
- hw->bitbang.master = master;
- hw->bitbang.chipselect = altera_spi_chipsel;
- hw->bitbang.txrx_bufs = altera_spi_txrx;
/* find and map our resources */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -239,15 +212,13 @@ static int altera_spi_probe(struct platform_device *pdev)
/* irq is optional */
hw->irq = platform_get_irq(pdev, 0);
if (hw->irq >= 0) {
- init_completion(&hw->done);
err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
- pdev->name, hw);
+ pdev->name, master);
if (err)
goto exit;
}
- /* register our spi controller */
- err = spi_bitbang_start(&hw->bitbang);
+ err = devm_spi_register_master(&pdev->dev, master);
if (err)
goto exit;
dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
@@ -258,16 +229,6 @@ static int altera_spi_probe(struct platform_device *pdev)
return err;
}
-static int altera_spi_remove(struct platform_device *dev)
-{
- struct altera_spi *hw = platform_get_drvdata(dev);
- struct spi_master *master = hw->bitbang.master;
-
- spi_bitbang_stop(&hw->bitbang);
- spi_master_put(master);
- return 0;
-}
-
#ifdef CONFIG_OF
static const struct of_device_id altera_spi_match[] = {
{ .compatible = "ALTR,spi-1.0", },
@@ -279,7 +240,6 @@ MODULE_DEVICE_TABLE(of, altera_spi_match);
static struct platform_driver altera_spi_driver = {
.probe = altera_spi_probe,
- .remove = altera_spi_remove,
.driver = {
.name = DRV_NAME,
.pm = NULL,
--
2.13.2
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prev parent reply other threads:[~2017-08-16 11:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-16 9:33 [PATCH 1/2] spi: altera: Switch to SPI core transfer queue management Lars-Peter Clausen
[not found] ` <20170816093312.23048-1-lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
2017-08-16 9:33 ` [PATCH 2/2] spi: altera: Consolidate TX/RX data register access Lars-Peter Clausen
[not found] ` <20170816093312.23048-2-lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
2017-08-16 11:21 ` Applied "spi: altera: Consolidate TX/RX data register access" to the spi tree Mark Brown
2017-08-16 11:21 ` Mark Brown [this message]
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