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From: "Nobuhiro Iwamatsu" <nobuhiro1.iwamatsu@toshiba.co.jp>
To: <wens@csie.org>, <pavel@denx.de>
Cc: <cip-dev@lists.cip-project.org>, <JohnsonCH.Chen@moxa.com>
Subject: Re: [cip-dev] [PATCH 4.4.y-cip 05/23] PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings
Date: Thu, 9 Jul 2020 04:38:28 +0000	[thread overview]
Message-ID: <OSBPR01MB2983907F308D6475B7D29D9D92640@OSBPR01MB2983.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <20200708154554.26450-6-wens@csie.org>

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Hi,

> -----Original Message-----
> From: Chen-Yu Tsai (Moxa) [mailto:wens@csie.org]
> Sent: Thursday, July 9, 2020 12:46 AM
> To: iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) <nobuhiro1.iwamatsu@toshiba.co.jp>; pavel@denx.de
> Cc: cip-dev@lists.cip-project.org; JohnsonCH.Chen@moxa.com
> Subject: [PATCH 4.4.y-cip 05/23] PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings
> 
> From: Viresh Kumar <viresh.kumar@linaro.org>
> 
> commit 50f8cfbd5897ca182d43f4caf19937153f17a604 uptream.

uptream -> upstream ?

> 
> V2 bindings have better support for clock-latency and voltage-tolerance
> and doesn't need special care. To use callbacks, like
> dev_pm_opp_get_max_{transition|volt}_latency(), irrespective of the
> bindings, the core needs to know clock-latency/voltage-tolerance for the
> earlier bindings.
> 
> This patch reads clock-latency/voltage-tolerance from the device node,
> irrespective of the bindings (to keep it simple) and use them only for
> V1 bindings.
> 
> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
> ---
>  drivers/base/power/opp/core.c | 20 ++++++++++++++++++++
>  drivers/base/power/opp/opp.h  |  6 ++++++
>  2 files changed, 26 insertions(+)

Best regards,
  Nobuhiro


> 
> diff --git a/drivers/base/power/opp/core.c b/drivers/base/power/opp/core.c
> index d51ddcebcca00..e1f214fc75555 100644
> --- a/drivers/base/power/opp/core.c
> +++ b/drivers/base/power/opp/core.c
> @@ -582,6 +582,7 @@ static struct device_opp *_add_device_opp(struct device *dev)
>  {
>  	struct device_opp *dev_opp;
>  	struct device_list_opp *list_dev;
> +	struct device_node *np;
> 
>  	/* Check for existing list for 'dev' first */
>  	dev_opp = _find_device_opp(dev);
> @@ -604,6 +605,21 @@ static struct device_opp *_add_device_opp(struct device *dev)
>  		return NULL;
>  	}
> 
> +	/*
> +	 * Only required for backward compatibility with v1 bindings, but isn't
> +	 * harmful for other cases. And so we do it unconditionally.
> +	 */
> +	np = of_node_get(dev->of_node);
> +	if (np) {
> +		u32 val;
> +
> +		if (!of_property_read_u32(np, "clock-latency", &val))
> +			dev_opp->clock_latency_ns_max = val;
> +		of_property_read_u32(np, "voltage-tolerance",
> +				     &dev_opp->voltage_tolerance_v1);
> +		of_node_put(np);
> +	}
> +
>  	srcu_init_notifier_head(&dev_opp->srcu_head);
>  	INIT_LIST_HEAD(&dev_opp->opp_list);
> 
> @@ -861,6 +877,7 @@ static int _opp_add_v1(struct device *dev, unsigned long freq, long u_volt,
>  {
>  	struct device_opp *dev_opp;
>  	struct dev_pm_opp *new_opp;
> +	unsigned long tol;
>  	int ret;
> 
>  	/* Hold our list modification lock here */
> @@ -874,7 +891,10 @@ static int _opp_add_v1(struct device *dev, unsigned long freq, long u_volt,
> 
>  	/* populate the opp table */
>  	new_opp->rate = freq;
> +	tol = u_volt * dev_opp->voltage_tolerance_v1 / 100;
>  	new_opp->u_volt = u_volt;
> +	new_opp->u_volt_min = u_volt - tol;
> +	new_opp->u_volt_max = u_volt + tol;
>  	new_opp->available = true;
>  	new_opp->dynamic = dynamic;
> 
> diff --git a/drivers/base/power/opp/opp.h b/drivers/base/power/opp/opp.h
> index 416293b7da237..fe44beb404ba2 100644
> --- a/drivers/base/power/opp/opp.h
> +++ b/drivers/base/power/opp/opp.h
> @@ -138,6 +138,8 @@ struct device_list_opp {
>   * @dentry:	debugfs dentry pointer of the real device directory (not links).
>   * @dentry_name: Name of the real dentry.
>   *
> + * @voltage_tolerance_v1: In percentage, for v1 bindings only.
> + *
>   * This is an internal data structure maintaining the link to opps attached to
>   * a device. This structure is not meant to be shared to users as it is
>   * meant for book keeping and private to OPP library.
> @@ -156,6 +158,10 @@ struct device_opp {
> 
>  	struct device_node *np;
>  	unsigned long clock_latency_ns_max;
> +
> +	/* For backward compatibility with v1 bindings */
> +	unsigned int voltage_tolerance_v1;
> +
>  	bool shared_opp;
>  	struct dev_pm_opp *suspend_opp;
> 
> --
> 2.27.0


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  reply	other threads:[~2020-07-09  4:38 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-08 15:45 [cip-dev] [PATCH 4.4.y-cip 00/23] PM / OPP v2 & cpufreq backports part 2 Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 01/23] PM / OPP: get/put regulators from OPP core Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 02/23] PM / OPP: Disable OPPs that aren't supported by the regulator Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 03/23] PM / OPP: Introduce dev_pm_opp_get_max_volt_latency() Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 04/23] PM / OPP: Introduce dev_pm_opp_get_max_transition_latency() Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 05/23] PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings Chen-Yu Tsai (Moxa)
2020-07-09  4:38   ` Nobuhiro Iwamatsu [this message]
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 06/23] PM / OPP: Manage device clk Chen-Yu Tsai (Moxa)
2020-07-14 17:44   ` Pavel Machek
2020-07-14 17:57   ` Pavel Machek
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 07/23] PM / OPP: Add dev_pm_opp_set_rate() Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 08/23] cpufreq: dt: Convert few pr_debug/err() calls to dev_dbg/err() Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 09/23] cpufreq: dt: Rename 'need_update' to 'opp_v1' Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 10/23] cpufreq: dt: OPP layers handles clock-latency for V1 bindings as well Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 11/23] cpufreq: dt: Pass regulator name to the OPP core Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 12/23] cpufreq: dt: Unsupported OPPs are already disabled Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 13/23] cpufreq: dt: Reuse dev_pm_opp_get_max_transition_latency() Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 14/23] cpufreq: dt: Use dev_pm_opp_set_rate() to switch frequency Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 15/23] cpufreq: dt: No need to fetch voltage-tolerance Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 16/23] cpufreq: dt: No need to allocate resources anymore Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 17/23] PM / OPP: Fix NULL pointer dereference crash when disabling OPPs Chen-Yu Tsai (Moxa)
2020-07-14 17:37   ` Pavel Machek
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 18/23] PM / OPP: Initialize regulator pointer to an error value Chen-Yu Tsai (Moxa)
2020-07-14 17:38   ` Pavel Machek
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 19/23] PM / OPP: Fix incorrect comments Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 20/23] PM / OPP: Rename structures for clarity Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 21/23] cpufreq: dt: Drop stale comment Chen-Yu Tsai (Moxa)
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 22/23] PM / OPP: Remove useless check Chen-Yu Tsai (Moxa)
2020-07-14 17:41   ` Pavel Machek
2020-07-08 15:45 ` [cip-dev] [PATCH 4.4.y-cip 23/23] PM / OPP: Update voltage in case freq == old_freq Chen-Yu Tsai (Moxa)
2020-07-09  4:48 ` [cip-dev] [PATCH 4.4.y-cip 00/23] PM / OPP v2 & cpufreq backports part 2 Nobuhiro Iwamatsu
2020-07-14 17:33 ` Pavel Machek
2020-08-31  3:41   ` Chen-Yu Tsai (Moxa)
2020-09-02 21:50     ` Pavel Machek

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