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From: "Nobuhiro Iwamatsu" <nobuhiro1.iwamatsu@toshiba.co.jp>
To: <biju.das.jz@bp.renesas.com>, <cip-dev@lists.cip-project.org>,
	<pavel@denx.de>
Cc: <chris.paterson2@renesas.com>, <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [cip-dev] [PATCH 00/36] Add Hihope RZ/G2H basic board support
Date: Sun, 23 Aug 2020 23:04:13 +0000	[thread overview]
Message-ID: <OSBPR01MB29839552F399D747C9009A9D92590@OSBPR01MB2983.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <20200821094312.3249-1-biju.das.jz@bp.renesas.com>

[-- Attachment #1: Type: text/plain, Size: 6729 bytes --]

Hi,

> -----Original Message-----
> From: Biju Das [mailto:biju.das.jz@bp.renesas.com]
> Sent: Friday, August 21, 2020 6:43 PM
> To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT)
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
> Cc: Chris Paterson <chris.paterson2@renesas.com>; Biju Das <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: [PATCH 00/36] Add Hihope RZ/G2H basic board support
> 
> This patch series add basic support for Hihope RZ/G2H based on
> r8a774e1 SoC to 4.19.y-cip kernel. All patches in this series
> are cherry-picked from mainline.
> 
> This patch series depends on [1]
> [1]: https://patchwork.kernel.org/project/cip-dev/list/?series=335409
> 
> Geert Uytterhoeven (7):
>   pinctrl: sh-pfc: r8a77965: Fix DU_DOTCLKIN3 drive/bias control
>   pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions
>   pinctrl: sh-pfc: r8a7795-es1: Add TPU pins, groups and functions
>   pinctrl: sh-pfc: r8a7795: Add TPU pins, groups and functions
>   pinctrl: sh-pfc: r8a7795-es1: Use new macros for non-GPIO pins
>   pinctrl: sh-pfc: r8a7795: Use new macros for non-GPIO pins
>   pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers
> 
> Jacopo Mondi (1):
>   pinctrl: sh-pfc: r8a7795: Fix VIN versioned groups
> 
> Keiya Nobuta (2):
>   pinctrl: sh-pfc: pfc-r8a7795-es1: Fix typo in pinmux macro for SCL3
>   pinctrl: sh-pfc: pfc-r8a7795: Fix typo in pinmux macro for SCL3
> 
> Lad Prabhakar (1):
>   pinctrl: sh-pfc: pfc-r8a77951: Add R8A774E1 PFC support
> 
> Marek Vasut (1):
>   pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across
>     suspend/resume
> 
> Marian-Cristian Rotariu (17):
>   dt-bindings: power: Add r8a774e1 SYSC power domain definitions
>   dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding
>   soc: renesas: rcar-sysc: Add r8a774e1 support
>   soc: renesas: Add Renesas R8A774E1 config option
>   dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings
>   soc: renesas: Identify RZ/G2H
>   dt-bindings: reset: rcar-rst: Document r8a774e1 reset module
>   soc: renesas: rcar-rst: Add support for RZ/G2H
>   clk: renesas: Add r8a774e1 CPG Core Clock Definitions
>   dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
>   clk: renesas: cpg-mssr: Add r8a774e1 support
>   arm64: defconfig: Enable R8A774E1 SoC
>   dt-bindings: pinctrl: sh-pfc: Document r8a774e1 PFC support
>   arm64: dts: renesas: Initial r8a774e1 SoC device tree
>   dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards
>   arm64: dts: renesas: Add HiHope RZ/G2H main board support
>   arm64: dts: renesas: Add HiHope RZ/G2H sub board support
> 
> Sergei Shtylyov (2):
>   clk: renesas: rcar-gen3: Add RPC clocks
>   clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks
> 
> Takeshi Kihara (3):
>   pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and
>     functions
>   pinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions
>   pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function
>     definitions
> 
> Ulrich Hecht (2):
>   clk: renesas: cpg-mssr: Mark clocks as critical only if on at boot
>   clk: renesas: rzg2: Mark RWDT clocks as critical

I have reviewed this patch series.
I didn't see any problems.

Best regards,
  Nobuhiro

> 
>  .../devicetree/bindings/arm/shmobile.txt      |    7 +-
>  .../bindings/clock/renesas,cpg-mssr.txt       |    1 +
>  .../bindings/pinctrl/renesas,pfc-pinctrl.txt  |    1 +
>  .../bindings/power/renesas,rcar-sysc.txt      |    1 +
>  .../devicetree/bindings/reset/renesas,rst.txt |    1 +
>  arch/arm64/Kconfig.platforms                  |    6 +
>  arch/arm64/boot/dts/renesas/Makefile          |    2 +
>  .../arm64/boot/dts/renesas/hihope-common.dtsi |    4 +-
>  arch/arm64/boot/dts/renesas/hihope-rev4.dtsi  |    4 +-
>  .../boot/dts/renesas/hihope-rzg2-ex.dtsi      |    2 +-
>  .../dts/renesas/r8a774e1-hihope-rzg2h-ex.dts  |   15 +
>  .../dts/renesas/r8a774e1-hihope-rzg2h.dts     |   26 +
>  arch/arm64/boot/dts/renesas/r8a774e1.dtsi     |  652 ++++++++
>  arch/arm64/configs/defconfig                  |    1 +
>  drivers/clk/renesas/Kconfig                   |    5 +
>  drivers/clk/renesas/Makefile                  |    1 +
>  drivers/clk/renesas/r8a774a1-cpg-mssr.c       |    1 +
>  drivers/clk/renesas/r8a774b1-cpg-mssr.c       |    1 +
>  drivers/clk/renesas/r8a774c0-cpg-mssr.c       |    1 +
>  drivers/clk/renesas/r8a774e1-cpg-mssr.c       |  349 ++++
>  drivers/clk/renesas/rcar-gen3-cpg.c           |  103 ++
>  drivers/clk/renesas/rcar-gen3-cpg.h           |    4 +
>  drivers/clk/renesas/renesas-cpg-mssr.c        |   23 +-
>  drivers/clk/renesas/renesas-cpg-mssr.h        |    1 +
>  drivers/pinctrl/sh-pfc/Kconfig                |   14 +-
>  drivers/pinctrl/sh-pfc/Makefile               |    5 +-
>  drivers/pinctrl/sh-pfc/core.c                 |   63 +-
>  .../{pfc-r8a7795-es1.c => pfc-r8a77950.c}     |  546 ++++---
>  .../sh-pfc/{pfc-r8a7795.c => pfc-r8a77951.c}  | 1420 +++++++++--------
>  drivers/pinctrl/sh-pfc/pfc-r8a77965.c         |    8 +-
>  drivers/pinctrl/sh-pfc/pfc-r8a77970.c         |   24 +-
>  drivers/pinctrl/sh-pfc/pfc-r8a77980.c         |   32 +-
>  drivers/pinctrl/sh-pfc/pfc-r8a77995.c         |   22 +-
>  drivers/pinctrl/sh-pfc/sh_pfc.h               |    5 +-
>  drivers/soc/renesas/Kconfig                   |   11 +-
>  drivers/soc/renesas/Makefile                  |    1 +
>  drivers/soc/renesas/r8a774e1-sysc.c           |   43 +
>  drivers/soc/renesas/rcar-rst.c                |    1 +
>  drivers/soc/renesas/rcar-sysc.c               |    3 +
>  drivers/soc/renesas/rcar-sysc.h               |    1 +
>  drivers/soc/renesas/renesas-soc.c             |    8 +
>  include/dt-bindings/clock/r8a774e1-cpg-mssr.h |   59 +
>  include/dt-bindings/power/r8a774e1-sysc.h     |   36 +
>  43 files changed, 2547 insertions(+), 967 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h-ex.dts
>  create mode 100644 arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
>  create mode 100644 arch/arm64/boot/dts/renesas/r8a774e1.dtsi
>  create mode 100644 drivers/clk/renesas/r8a774e1-cpg-mssr.c
>  rename drivers/pinctrl/sh-pfc/{pfc-r8a7795-es1.c => pfc-r8a77950.c} (93%)
>  rename drivers/pinctrl/sh-pfc/{pfc-r8a7795.c => pfc-r8a77951.c} (87%)
>  create mode 100644 drivers/soc/renesas/r8a774e1-sysc.c
>  create mode 100644 include/dt-bindings/clock/r8a774e1-cpg-mssr.h
>  create mode 100644 include/dt-bindings/power/r8a774e1-sysc.h
> 
> --
> 2.17.1


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      parent reply	other threads:[~2020-08-23 23:04 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-21  9:42 [cip-dev] [PATCH 00/36] Add Hihope RZ/G2H basic board support Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 01/36] dt-bindings: power: Add r8a774e1 SYSC power domain definitions Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 02/36] dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 03/36] soc: renesas: rcar-sysc: Add r8a774e1 support Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 04/36] soc: renesas: Add Renesas R8A774E1 config option Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 05/36] dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 06/36] soc: renesas: Identify RZ/G2H Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 07/36] dt-bindings: reset: rcar-rst: Document r8a774e1 reset module Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 08/36] soc: renesas: rcar-rst: Add support for RZ/G2H Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 09/36] clk: renesas: rcar-gen3: Add RPC clocks Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 10/36] clk: renesas: Add r8a774e1 CPG Core Clock Definitions Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 11/36] clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 12/36] clk: renesas: cpg-mssr: Mark clocks as critical only if on at boot Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 13/36] clk: renesas: rzg2: Mark RWDT clocks as critical Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 14/36] dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1 Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 15/36] clk: renesas: cpg-mssr: Add r8a774e1 support Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 16/36] arm64: defconfig: Enable R8A774E1 SoC Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 17/36] pinctrl: sh-pfc: r8a77965: Fix DU_DOTCLKIN3 drive/bias control Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 18/36] pinctrl: sh-pfc: r8a7795: Fix VIN versioned groups Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 19/36] pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and functions Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 20/36] pinctrl: sh-pfc: r8a7795: " Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 21/36] pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 22/36] pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume Biju Das
2020-08-21  9:42 ` [cip-dev] [PATCH 23/36] pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 24/36] pinctrl: sh-pfc: r8a7795-es1: Add TPU pins, groups and functions Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 25/36] pinctrl: sh-pfc: r8a7795: " Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 26/36] pinctrl: sh-pfc: r8a7795-es1: Use new macros for non-GPIO pins Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 27/36] pinctrl: sh-pfc: r8a7795: " Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 28/36] pinctrl: sh-pfc: pfc-r8a7795-es1: Fix typo in pinmux macro for SCL3 Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 29/36] pinctrl: sh-pfc: pfc-r8a7795: " Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 30/36] pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 31/36] dt-bindings: pinctrl: sh-pfc: Document r8a774e1 PFC support Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 32/36] pinctrl: sh-pfc: pfc-r8a77951: Add R8A774E1 " Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 33/36] arm64: dts: renesas: Initial r8a774e1 SoC device tree Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 34/36] dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 35/36] arm64: dts: renesas: Add HiHope RZ/G2H main board support Biju Das
2020-08-21  9:43 ` [cip-dev] [PATCH 36/36] arm64: dts: renesas: Add HiHope RZ/G2H sub " Biju Das
2020-08-23 19:03 ` [cip-dev] [PATCH 00/36] Add Hihope RZ/G2H basic " Pavel Machek
2020-08-23 23:04 ` Nobuhiro Iwamatsu [this message]

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