Re: [PATCH v3 0/4] Modify MxL's CGU clk driver to make it secure boot compatible

From: Yi xin Zhu <yzhu@maxlinear.com>
To: Rahul Tanwar <rtanwar@maxlinear.com>,
	"sboyd@kernel.org" <sboyd@kernel.org>,
	"mturquette@baylibre.com" <mturquette@baylibre.com>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	linux-lgm-soc <linux-lgm-soc@maxlinear.com>
Subject: Re: [PATCH v3 0/4] Modify MxL's CGU clk driver to make it secure boot compatible
Date: Tue, 11 Oct 2022 08:04:17 +0000	[thread overview]
Message-ID: <SA1PR19MB4909F6711D45ADCCA6360A4FC2239@SA1PR19MB4909.namprd19.prod.outlook.com> (raw)
In-Reply-To: cover.1664958833.git.rtanwar@maxlinear.com

On 5/10/2022 5:36 pm, Rahul Tanwar wrote:
> MxL's CGU driver was found to be lacking below required features. Add these
> required lacking features:
>
> 1. Since it is a core driver, it has to conform to secure boot & secure
>    access architecture. In order for the register accesses to be secure
>    access compliant, it needs regmap support as per our security architecture.
>    Hence, replace direct read/writel with regmap based IO. Also remove
>    redundant spinlocks from the driver as they are no longer necessary
>    because regmap uses its own lock.
>
> 2. In MxL's LGM SoC, gate clocks can be controlled either from CGU clk driver
>    i.e. this driver or directly from power management driver/daemon. It is
>    dependent on the power policy/profile requirements of the end product.
>
>    To support such use cases, provide option to override gate clks enable/disable
>    by adding a flag GATE_CLK_HW which controls if these gate clks are controlled
>    by HW i.e. this driver or overridden in order to allow it to be controlled
>    by power profiles instead.
>
> 3. Fix a bug related to missing flags in one 'dcl' clk entry.
>
> This patch series is based on below git tree (linux-v6.0-rc1):
> git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
>
>
> Rahul Tanwar (4):
>   clk: mxl: Switch from direct readl/writel based IO to regmap based IO
>   clk: mxl: Remove redundant spinlocks
>   clk: mxl: Add option to override gate clks enable/disable
>   clk: mxl: Fix a clk entry by adding relevant flags
>
>  drivers/clk/x86/Kconfig       |   5 +-
>  drivers/clk/x86/clk-cgu-pll.c |  23 ++-----
>  drivers/clk/x86/clk-cgu.c     | 122 +++++++++++-----------------------
>  drivers/clk/x86/clk-cgu.h     |  46 ++++++-------
>  drivers/clk/x86/clk-lgm.c     |  18 +++--
>  5 files changed, 82 insertions(+), 132 deletions(-)
>
Reviewed-by: Yi xin Zhu <yzhu@maxlinear.com> for entire series.