RE: [PATCH] net: ethernet: renesas: sh_eth: do not access POST registers if not exist

From: Chris Brandt <Chris.Brandt@renesas.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	"David S . Miller" <davem@davemloft.net>
Cc: Simon Horman <horms+renesas@verge.net.au>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Daniel Palmer <daniel@0x0f.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH] net: ethernet: renesas: sh_eth: do not access POST registers if not exist
Date: Tue, 30 Aug 2016 14:16:41 +0000	[thread overview]
Message-ID: <SG2PR06MB1165DAEF1E16FFA7E2DC49308AE00@SG2PR06MB1165.apcprd06.prod.outlook.com> (raw)
In-Reply-To: <f456cca3-289c-67dc-f15c-5b475553cdde@cogentembedded.com>

Hello Sergei,

On Aug 29, 2016, Sergei Shtylyov wrote:
>    SH7757 is not the only platform with TSU, there's e.g. R8A7740 ARM
> SoC which only has 1 GETHER channel...

I don't have the R8A7740 manual (R-Mobile A1) so I can't see. But even if it does not have the POST registers, it might not hurt anything.

I just looked at the RZ/A1 register space and there seems to be dummy registers in the POST1-4 area. I can write to them and read back what I wrote...which is all that the sh_eth driver cares about. I bet when the designers bring in the EtherC IP block, the entire register address is always populated with a simple latch registers. And then, if a feature is not included (like relay/POST), then nothing is hooked up on the back side of it.

So, the 'easiest' solution is to just put the registers into the sh_eth_offset_fast_rz array and not try to make things more complicated.
	[TSU_TEN]	= 0x0064,
+	[TSU_POST1]	= 0x0070,
+	[TSU_POST2]	= 0x0074,
+	[TSU_POST3]	= 0x0078,
+	[TSU_POST4]	= 0x007c,

Chris