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From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
To: Simon Horman <horms@verge.net.au>,
	Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	Biju Das <biju.das@bp.renesas.com>,
	Chris Paterson <Chris.Paterson2@renesas.com>
Subject: RE: [PATCH] clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK
Date: Mon, 25 Feb 2019 09:44:21 +0000	[thread overview]
Message-ID: <TY1PR01MB177027370EE55C92347CC576C07A0@TY1PR01MB1770.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <20190225092708.cwormmuqdm3g4umy@verge.net.au>

Hello Simon, Geert

Thank you for your feedback!

> From: Simon Horman <horms@verge.net.au>
> Sent: 25 February 2019 09:27
> Subject: Re: [PATCH] clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK
> 
> On Fri, Feb 22, 2019 at 12:01:21PM +0000, Chris Paterson wrote:
> >
> > > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > > Sent: 22 February 2019 12:00
> > >
> > > Enum LAST_DT_CORE_CLK needs updating as R8A774A1_CLK_CANFD
> > > was recently added and it's the core clock with the highest
> > > index.
> > >
> > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
> 
> I think this needs:
> 
> Fixes: 9d034e151b40 ("clk: renesas: r8a774a1: Add missing CANFD clock")

I naively thought I could only refer to commits from Torvald's, which is clearly wrong,
therefore thank you for fixing.

Cheers,
Fab

> 
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> 
> >
> > > ---
> > >  drivers/clk/renesas/r8a774a1-cpg-mssr.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> > > b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> > > index 5fcd6c5..8e7bb43 100644
> > > --- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> > > +++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> > > @@ -21,7 +21,7 @@
> > >
> > >  enum clk_ids {
> > >  	/* Core Clock Outputs exported to DT */
> > > -	LAST_DT_CORE_CLK = R8A774A1_CLK_OSC,
> > > +	LAST_DT_CORE_CLK = R8A774A1_CLK_CANFD,
> > >
> > >  	/* External Input Clocks */
> > >  	CLK_EXTAL,
> > > --
> > > 2.7.4
> >

  parent reply	other threads:[~2019-02-25  9:44 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-22 11:59 [PATCH] clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK Fabrizio Castro
2019-02-22 12:01 ` Chris Paterson
2019-02-25  9:27   ` Simon Horman
2019-02-25  9:32     ` Geert Uytterhoeven
2019-02-25  9:44     ` Fabrizio Castro [this message]
2019-02-25  9:47       ` Geert Uytterhoeven
2019-02-25  9:49         ` Fabrizio Castro
2019-02-25 17:13 ` Stephen Boyd

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