From: Xu Yilun <yilun.xu@intel.com>
To: Ivan Bornyakov <i.bornyakov@metrotek.ru>
Cc: mdf@kernel.org, hao.wu@intel.com, trix@redhat.com, dg@emlix.com,
j.zink@pengutronix.de, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-fpga@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
kernel@pengutronix.de, system@metrotek.ru
Subject: Re: [PATCH v18 1/2] fpga: lattice-sysconfig-spi: add Lattice sysCONFIG FPGA manager
Date: Wed, 19 Oct 2022 12:54:14 +0800 [thread overview]
Message-ID: <Y0+C9tTIXkAcKXBS@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20221014202750.20542-2-i.bornyakov@metrotek.ru>
On 2022-10-14 at 23:27:49 +0300, Ivan Bornyakov wrote:
> Add support to the FPGA manager for programming Lattice ECP5 FPGA over
> slave SPI sysCONFIG interface.
>
> sysCONFIG interface core functionality is separate from both ECP5 and
> SPI specifics, so support for other FPGAs with different port types can
> be added in the future.
>
> Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
> ---
[...]
> +static int sysconfig_poll_gpio(struct gpio_desc *gpio, bool is_active)
> +{
> + int ret, val;
> +
> + ret = read_poll_timeout(gpiod_get_value, val, val < 0 ||
> + (val && is_active) || (!val && !is_active),
val < 0 || (!!val == is_active)
is it better?
> + SYSCONFIG_POLL_INTERVAL_US,
> + SYSCONFIG_POLL_GPIO_TIMEOUT_US, false, gpio);
> +
> + return val < 0 ? val : ret;
Try not to use ternery operator here.
if (ret)
return ret;
else if (val < 0)
return val;
return 0;
Is it OK?
Thanks,
Yilun
next prev parent reply other threads:[~2022-10-19 5:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-14 20:27 [PATCH v18 0/2] Lattice sysCONFIG SPI FPGA manager Ivan Bornyakov
2022-10-14 20:27 ` [PATCH v18 1/2] fpga: lattice-sysconfig-spi: add Lattice sysCONFIG " Ivan Bornyakov
2022-10-19 4:54 ` Xu Yilun [this message]
2022-10-14 20:27 ` [PATCH v18 2/2] dt-bindings: fpga: document " Ivan Bornyakov
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