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From: Bagas Sanjaya <bagasdotme@gmail.com>
To: matthew.gerlach@linux.intel.com, hao.wu@intel.com,
	yilun.xu@intel.com, russell.h.weight@intel.com,
	basheer.ahmed.muddebihal@intel.com, trix@redhat.com,
	mdf@kernel.org, linux-fpga@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	tianfei.zhang@intel.com, corbet@lwn.net,
	gregkh@linuxfoundation.org, linux-serial@vger.kernel.org,
	jirislaby@kernel.org, geert+renesas@glider.be,
	andriy.shevchenko@linux.intel.com,
	niklas.soderlund+renesas@ragnatech.se, macro@orcam.me.uk,
	johan@kernel.org, lukas@wunner.de, ilpo.jarvinen@linux.intel.com,
	marpagan@redhat.com
Subject: Re: [PATCH v6 1/4] Documentation: fpga: dfl: Add documentation for DFHv1
Date: Sat, 10 Dec 2022 10:17:10 +0700	[thread overview]
Message-ID: <Y5P6NjDxy/S7nlF7@debian.me> (raw)
In-Reply-To: <20221209214523.3484193-2-matthew.gerlach@linux.intel.com>

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On Fri, Dec 09, 2022 at 01:45:20PM -0800, matthew.gerlach@linux.intel.com wrote:
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index 15b670926084..606b4b070c33 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -561,6 +561,109 @@ new DFL feature via UIO direct access, its feature id should be added to the
>  driver's id_table.
>  
>  
> +Device Feature Header - Version 0
> +===========================================
> +Version 0 (DFHv0) is the original version of the Device Feature Header.
> +The format of DFHv0 is shown below::
> +
> +    +-----------------------------------------------------------------------+
> +    |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 VER 12|11 ID 0| 0x00
> +    +-----------------------------------------------------------------------+
> +    |63                                 GUID_L                             0| 0x08
> +    +-----------------------------------------------------------------------+
> +    |63                                 GUID_H                             0| 0x10
> +    +-----------------------------------------------------------------------+
> +
> +- Offset 0x00
> +
> +  * Type - The type of DFH (e.g. FME, AFU, or private feature).
> +  * DFH VER - The version of the DFH.
> +  * Rsvd - Currently unused.
> +  * EOL - Set if this DFH is the end of the Device Feature List (DFL).
> +  * Next - The offset of the next DFH in the DFL from the start of the DFH. If EOL is set, Next is the size of MMIO ofthe last feature in the list.
> +  * ID - The ID of the feature if Type is private feature.
> +
> +- Offset 0x08
> +
> +  * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU).
> +
> +- Offset 0x10
> +
> +  * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU).
> +
> +
> +Device Feature Header - Version 1
> +===========================================
> +Version 1 (DFHv1) of the Device Feature Header adds the following functionality:
> +
> +* Provides a standardized mechanism for features to describe parameters/capabilities to software.
> +* Standardize the use of a GUID for all DFHv1 types.
> +* Decouples the location of the DFH from the register space of the feature itself.
> +
> +The format of Version 1 of the Device Feature Header (DFH) is shown below::
> +
> +    +-----------------------------------------------------------------------+
> +    |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 VER 12|11 ID 0| 0x00
> +    +-----------------------------------------------------------------------+
> +    |63                                 GUID_L                             0| 0x08
> +    +-----------------------------------------------------------------------+
> +    |63                                 GUID_H                             0| 0x10
> +    +-----------------------------------------------------------------------+
> +    |63                   Reg Address/Offset                      1|  Rel  0| 0x18
> +    +-----------------------------------------------------------------------+
> +    |63        Reg Size       32|Params 31|30 Group    16|15 Instance      0| 0x20
> +    +-----------------------------------------------------------------------+
> +    |63 Next    35|34RSV33|EOP32|31 Param Version 16|15 Param ID           0| 0x28
> +    +-----------------------------------------------------------------------+
> +    |63                 Parameter Data                                     0| 0x30
> +    +-----------------------------------------------------------------------+
> +
> +                                  ...
> +
> +    +-----------------------------------------------------------------------+
> +    |63 Next    35|34RSV33|EOP32|31 Param Version 16|15 Param ID           0|
> +    +-----------------------------------------------------------------------+
> +    |63                 Parameter Data                                     0|
> +    +-----------------------------------------------------------------------+
> +
> +- Offset 0x00
> +
> +  * Type - The type of DFH (e.g. FME, AFU, or private feature).
> +  * DFH VER - The version of the DFH.
> +  * Rsvd - Currently unused.
> +  * EOL - Set if this DFH is the end of the Device Feature List (DFL).
> +  * Next - The offset of the next DFH in the DFL from the start of the DFH.
> +  * ID - The ID of the feature if Type is private feature.
> +
> +- Offset 0x08
> +
> +  * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier.
> +
> +- Offset 0x10
> +
> +  * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier.
> +
> +- Offset 0x18
> +
> +  * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits of a 16 bit aligned absolute address of the feature's registers. If Rel bit is clear, then the value is the offset from the start of the DFH of the feature's registers.
> +
> +- Offset 0x20
> +
> +  * Reg Size - Size of feature's register set in bytes.
> +  * Params - Set if DFH has a list of parameter blocks.
> +  * Group - Id of group if feature is part of a group.
> +  * Instance - Id of instance of feature within a group.
> +
> +- Offset 0x28 if feature has parameters
> +
> +  * Next - Offset to the next parameter block in 8 byte words. If EOP set, size in 8 byte words of last parameter.
> +  * Param Version - Version of Param ID.
> +  * Param ID - ID of parameter.
> +
> +- Offset 0x30
> +
> +  * Parameter Data - Parameter data whose size and format is defined by version and ID of the parameter.
> +
>  Open discussion
>  ===============
>  FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration

What about this wording below (including fitting the prose within 80 columns)?

---- >8 ----
diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
index 606b4b070c3321..3d8f8dde6021db 100644
--- a/Documentation/fpga/dfl.rst
+++ b/Documentation/fpga/dfl.rst
@@ -579,26 +579,30 @@ The format of DFHv0 is shown below::
   * Type - The type of DFH (e.g. FME, AFU, or private feature).
   * DFH VER - The version of the DFH.
   * Rsvd - Currently unused.
-  * EOL - Set if this DFH is the end of the Device Feature List (DFL).
-  * Next - The offset of the next DFH in the DFL from the start of the DFH. If EOL is set, Next is the size of MMIO ofthe last feature in the list.
-  * ID - The ID of the feature if Type is private feature.
+  * EOL - Set if the DFH is the end of the Device Feature List (DFL).
+  * Next - The offset of the next DFH in the DFL from the DFH start. If EOL is
+    set, Next is the size of MMIO of the last feature in the list.
+  * ID - The feature ID if Type is private feature.
 
 - Offset 0x08
 
-  * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU).
+  * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier
+    (present only if Type is FME or AFU).
 
 - Offset 0x10
 
-  * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU).
+  * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier
+    (present only if Type is FME or AFU).
 
 
 Device Feature Header - Version 1
 ===========================================
 Version 1 (DFHv1) of the Device Feature Header adds the following functionality:
 
-* Provides a standardized mechanism for features to describe parameters/capabilities to software.
+* Provides a standardized mechanism for features to describe
+  parameters/capabilities to software.
 * Standardize the use of a GUID for all DFHv1 types.
-* Decouples the location of the DFH from the register space of the feature itself.
+* Decouples the DFH location from the register space of the feature itself.
 
 The format of Version 1 of the Device Feature Header (DFH) is shown below::
 
@@ -631,38 +635,43 @@ The format of Version 1 of the Device Feature Header (DFH) is shown below::
   * Type - The type of DFH (e.g. FME, AFU, or private feature).
   * DFH VER - The version of the DFH.
   * Rsvd - Currently unused.
-  * EOL - Set if this DFH is the end of the Device Feature List (DFL).
-  * Next - The offset of the next DFH in the DFL from the start of the DFH.
-  * ID - The ID of the feature if Type is private feature.
+  * EOL - Set if the DFH is the end of the Device Feature List (DFL).
+  * Next - The offset of the next DFH in the DFL from the DFH start.
+  * ID - The feature ID if Type is private feature.
 
 - Offset 0x08
 
-  * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier.
+  * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier.
 
 - Offset 0x10
 
-  * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier.
+  * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier.
 
 - Offset 0x18
 
-  * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits of a 16 bit aligned absolute address of the feature's registers. If Rel bit is clear, then the value is the offset from the start of the DFH of the feature's registers.
+  * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits
+    of a 16-bit aligned absolute address of the feature's registers. Otherwise
+    the value is the offset from the start of the DFH of the feature's
+    registers.
 
 - Offset 0x20
 
   * Reg Size - Size of feature's register set in bytes.
   * Params - Set if DFH has a list of parameter blocks.
-  * Group - Id of group if feature is part of a group.
-  * Instance - Id of instance of feature within a group.
+  * Group - ID of group if feature is part of a group.
+  * Instance - ID of feature instance within a group.
 
 - Offset 0x28 if feature has parameters
 
-  * Next - Offset to the next parameter block in 8 byte words. If EOP set, size in 8 byte words of last parameter.
+  * Next - Offset to the next parameter block in 8 byte words. If EOP set,
+    the value is size in 8 byte words of last parameter.
   * Param Version - Version of Param ID.
   * Param ID - ID of parameter.
 
 - Offset 0x30
 
-  * Parameter Data - Parameter data whose size and format is defined by version and ID of the parameter.
+  * Parameter Data - Parameter data whose size and format is defined by
+    version and ID of the parameter.
 
 Open discussion
 ===============

Thanks.

-- 
An old man doll... just what I always wanted! - Clara

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  reply	other threads:[~2022-12-10  3:17 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-09 21:45 [PATCH v6 0/4] Enhance definition of DFH and use enhancements for UART driver matthew.gerlach
2022-12-09 21:45 ` [PATCH v6 1/4] Documentation: fpga: dfl: Add documentation for DFHv1 matthew.gerlach
2022-12-10  3:17   ` Bagas Sanjaya [this message]
2022-12-13 16:50     ` matthew.gerlach
2022-12-13 19:52       ` Andy Shevchenko
2022-12-13 20:41         ` matthew.gerlach
2022-12-09 21:45 ` [PATCH v6 2/4] fpga: dfl: Add DFHv1 Register Definitions matthew.gerlach
2022-12-09 21:45 ` [PATCH v6 3/4] fpga: dfl: add basic support for DFHv1 matthew.gerlach
2022-12-13  5:26   ` Xu Yilun
2022-12-09 21:45 ` [PATCH v6 4/4] tty: serial: 8250: add DFL bus driver for Altera 16550 matthew.gerlach

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