From: Greg KH <gregkh@linuxfoundation.org>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: hdegoede@redhat.com, mgross@linux.intel.com,
andriy.shevchenko@linux.intel.com, srinivas.pandruvada@intel.com,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org
Subject: Re: [PATCH 2/2] platform/x86: Add Intel Software Defined Silicon driver
Date: Sat, 25 Sep 2021 16:46:51 +0200 [thread overview]
Message-ID: <YU82W8AEvY2Z3viS@kroah.com> (raw)
In-Reply-To: <20210924213157.3584061-2-david.e.box@linux.intel.com>
On Fri, Sep 24, 2021 at 02:31:57PM -0700, David E. Box wrote:
> The SDSi device itself is enumerated as a PCIe VSEC capability on the Intel
> Out Of Band Management Services Module (OOBMSM) device. The SDSi device is
> a cell of the intel_pmt MFD driver and as such has a build dependency on
> CONFIG_MFD_INTEL_PMT.
I don't understand this. It looks like if this driver is loaded it
instantly grabs the first iomem resource it can find and assumes that
this is the device in the system. Where does it check to verify that
the hardware really is present?
And this isn't really a platform device, so why is it written like one?
Just because it is using the mfd subsystem?
PCIe devices are not platform devices, please use the real pci device
structures for this type of thing.
thanks,
greg k-h
prev parent reply other threads:[~2021-09-25 14:46 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-24 21:31 [PATCH 1/2] Documentation: Update ioctl-number.rst for Intel Software Defined Silicon interface David E. Box
2021-09-24 21:31 ` [PATCH 2/2] platform/x86: Add Intel Software Defined Silicon driver David E. Box
2021-09-25 6:27 ` Greg KH
2021-09-27 1:15 ` David E. Box
2021-09-27 4:03 ` Greg KH
2021-09-27 17:53 ` David E. Box
2021-09-28 4:48 ` Greg KH
2021-09-27 4:04 ` Greg KH
2021-09-27 17:27 ` David E. Box
2021-09-27 17:36 ` Greg KH
2021-09-25 14:46 ` Greg KH [this message]
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