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From: Liviu Dudau <liviu.dudau@arm.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: sudeep.holla@arm.com, lorenzo.pieralisi@arm.com,
	linux-arm-kernel@lists.infradead.org,
	Anders Roxell <anders.roxell@linaro.org>
Subject: Re: [PATCH] arm64: dts: juno: Remove GICv2m dma-range
Date: Tue, 25 Jan 2022 15:24:24 +0000	[thread overview]
Message-ID: <YfAWKL86ofCxUYul@e110455-lin.cambridge.arm.com> (raw)
In-Reply-To: <856c3f7192c6c3ce545ba67462f2ce9c86ed6b0c.1643046936.git.robin.murphy@arm.com>

On Mon, Jan 24, 2022 at 05:57:01PM +0000, Robin Murphy wrote:
> Although it is painstakingly honest to describe all 3 PCI windows in
> "dma-ranges", it misses the the subtle distinction that the window for
> the GICv2m range is normally programmed for Device memory attributes
> rather than Normal Cacheable like the DRAM windows. Since MMU-401 only
> offers stage 2 translation, this means that when the PCI SMMU is
> enabled, accesses through that IPA range unexpectedly lose coherency if
> mapped as cacheable at the SMMU, due to the attribute combining rules.
> Since an extra 256KB is neither here nor there when we still have 10GB
> worth of usable address space, rather than attempting to describe and
> cope with this detail let's just remove the offending range. If the SMMU
> is not used then it makes no difference anyway.
> 
> Fixes: 4ac4d146cb63 ("arm64: dts: juno: Describe PCI dma-ranges")
> Reported-by: Anders Roxell <anders.roxell@linaro.org>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>

Looks like a good idea.

Acked-by: Liviu Dudau <liviu.dudau@arm.com>

Sudeep, can you pick this one up through your tree?

Best regards,
Liviu

> ---
> 
> Sorry it took a while to catch up on this...
> 
>  arch/arm64/boot/dts/arm/juno-base.dtsi | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 6288e104a089..a2635b14da30 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -543,8 +543,7 @@ pcie_ctlr: pcie@40000000 {
>  			 <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
>  			 <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
>  		/* Standard AXI Translation entries as programmed by EDK2 */
> -		dma-ranges = <0x02000000 0x0 0x2c1c0000 0x0 0x2c1c0000 0x0 0x00040000>,
> -			     <0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x80000000>,
> +		dma-ranges = <0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x80000000>,
>  			     <0x43000000 0x8 0x00000000 0x8 0x00000000 0x2 0x00000000>;
>  		#interrupt-cells = <1>;
>  		interrupt-map-mask = <0 0 0 7>;
> -- 
> 2.28.0.dirty
> 

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ¯\_(ツ)_/¯

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  reply	other threads:[~2022-01-25 15:36 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-24 17:57 [PATCH] arm64: dts: juno: Remove GICv2m dma-range Robin Murphy
2022-01-25 15:24 ` Liviu Dudau [this message]
2022-01-26 10:26 ` Sudeep Holla

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