From: Rob Herring <robh@kernel.org>
To: Sumit Gupta <sumitg@nvidia.com>
Cc: rafael@kernel.org, viresh.kumar@linaro.org, krzk+dt@kernel.org,
treding@nvidia.com, jonathanh@nvidia.com,
linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
ksitaraman@nvidia.com, sanjayc@nvidia.com, bbasu@nvidia.com
Subject: Re: [Patch v2 2/4] dt-bindings: arm: tegra: Add bindins for nvidia,tegra-ccplex-cluster
Date: Wed, 30 Mar 2022 19:53:44 -0500 [thread overview]
Message-ID: <YkT7mKas3pJF8tVb@robh.at.kernel.org> (raw)
In-Reply-To: <20220330143819.27476-3-sumitg@nvidia.com>
On Wed, Mar 30, 2022 at 08:08:17PM +0530, Sumit Gupta wrote:
> The Tegra CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.
>
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> ---
> .../tegra/nvidia,tegra-ccplex-cluster.yaml | 52 +++++++++++++++++++
> 1 file changed, 52 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
> new file mode 100644
> index 000000000000..74afa06f695e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: NVIDIA Tegra CPU_CLUSTER area device tree bindings
> +
> +maintainers:
> + - Sumit Gupta <sumitg@nvidia.com>
> + - Mikko Perttunen <mperttunen@nvidia.com>
> + - Jon Hunter <jonathanh@nvidia.com>
> + - Thierry Reding <thierry.reding@gmail.com>
> +
> +description: |+
> + The Tegra CCPLEX_CLUSTER area contains memory-mapped
> + registers that initiate CPU frequency/voltage transitions.
> +
> +properties:
> + $nodename:
> + pattern: "ccplex@([0-9a-f]+)$"
> +
> + compatible:
> + enum:
> + - nvidia,tegra186-ccplex-cluster
> + - nvidia,tegra234-ccplex-cluster
> +
> + reg:
> + maxItems: 1
> +
> + nvidia,bpmp:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: |
> + Specifies the bpmp node that needs to be queried to get
> + operating point data for all CPUs.
> +
> +additionalProperties: true
> +
> +required:
> + - compatible
> + - reg
> + - nvidia,bpmp
> + - status
status is never required.
> +
> +examples:
> + - |
> + ccplex@e000000 {
> + compatible = "nvidia,tegra234-ccplex-cluster";
> + reg = <0x0 0x0e000000 0x0 0x5ffff>;
> + nvidia,bpmp = <&bpmp>;
> + status = "okay";
Nor should it be in examples.
> + };
> --
> 2.17.1
>
>
next prev parent reply other threads:[~2022-03-31 0:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-30 14:38 [Patch v2 0/4] Tegra234 cpufreq driver support Sumit Gupta
2022-03-30 14:38 ` [Patch v2 1/4] cpufreq: tegra194: add soc data to support multiple soc Sumit Gupta
2022-03-30 14:38 ` [Patch v2 2/4] dt-bindings: arm: tegra: Add bindins for nvidia,tegra-ccplex-cluster Sumit Gupta
2022-03-31 0:50 ` Rob Herring
2022-03-31 0:53 ` Rob Herring [this message]
2022-03-31 7:00 ` Jon Hunter
2022-03-31 7:58 ` Sumit Gupta
2022-03-30 14:38 ` [Patch v2 3/4] arm64: tegra: add node for tegra234 cpufreq Sumit Gupta
2022-03-30 14:38 ` [Patch v2 4/4] cpufreq: tegra194: Add support for Tegra234 Sumit Gupta
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