All of lore.kernel.org
 help / color / mirror / Atom feed
From: Imre Deak <imre.deak@intel.com>
To: "Kahola, Mika" <mika.kahola@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 02/14] drm/i915/tc: Fix TC port link ref init for DP MST during HW readout
Date: Tue, 21 Mar 2023 16:00:00 +0200	[thread overview]
Message-ID: <ZBm4YInDZnvtx1ix@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <MW4PR11MB7054FE3F9F2904F694633EEEEF819@MW4PR11MB7054.namprd11.prod.outlook.com>

On Tue, Mar 21, 2023 at 02:06:38PM +0200, Kahola, Mika wrote:
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> > Deak
> > Sent: Thursday, March 16, 2023 3:17 PM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 02/14] drm/i915/tc: Fix TC port link ref init for DP
> > MST during HW readout
> >
> > An enabled TC MST port holds one TC port link reference, regardless of the
> > number of enabled streams on it, but the TC port HW readout takes one
> > reference for each active MST stream.
> >
> > Fix the HW readout, taking only one reference for MST ports.
> >
> > This didn't cause an actual problem, since the encoder HW readout doesn't yet
> > support reading out the MST HW state.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_tc.c | 20 +++++++++++---------
> >  1 file changed, 11 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> > b/drivers/gpu/drm/i915/display/intel_tc.c
> > index 050f998284592..0b6fe96ab4759 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -660,11 +660,14 @@ static void intel_tc_port_update_mode(struct
> > intel_digital_port *dig_port,
> >       tc_cold_unblock(dig_port, domain, wref);  }
> >
> > -static void
> > -intel_tc_port_link_init_refcount(struct intel_digital_port *dig_port,
> > -                              int refcount)
> > +static void __intel_tc_port_get_link(struct intel_digital_port
> > +*dig_port)
> >  {
> > -     dig_port->tc_link_refcount = refcount;
> > +     dig_port->tc_link_refcount++;
> > +}
> > +
> > +static void __intel_tc_port_put_link(struct intel_digital_port
> > +*dig_port) {
> > +     dig_port->tc_link_refcount--;
> >  }
> 
> When I read this first time, I had an impression that *_put_link() and
> *_get_link() would do something for the mst streams. However, these
> get/put just increases or decreases the link refcount. Should we
> rename these functions to restore the "refcount" to the function name
> as the replaced function had?

A link ref is taken whenever the port's TC mode should stay unchanged.
This may be because the port is enabled in any mode (DP-SST, -MST or HDMI)
or as here not necessarilty enabled, but not fully initialized yet
(which is done only once intel_tc_port_sanitize_mode() is called).

Based on the above get/put_link here means the same thing as later when
enabling/disabling outputs; hence I added the above functions used in
both cases.

> Otherwise, the patch does what is supposed to do here and looks ok.
> 
> -Mika-
> 
> >
> >  /**
> > @@ -690,7 +693,7 @@ void intel_tc_port_init_mode(struct intel_digital_port
> > *dig_port)
> >
> >       dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> >       /* Prevent changing dig_port->tc_mode until
> > intel_tc_port_sanitize_mode() is called. */
> > -     intel_tc_port_link_init_refcount(dig_port, 1);
> > +     __intel_tc_port_get_link(dig_port);
> >       dig_port->tc_lock_wakeref = tc_cold_block(dig_port, &dig_port-
> > >tc_lock_power_domain);
> >
> >       tc_cold_unblock(dig_port, domain, tc_cold_wref); @@ -726,8 +729,6
> > @@ void intel_tc_port_sanitize_mode(struct intel_digital_port *dig_port)
> >               active_links = to_intel_crtc(encoder->base.crtc)->active;
> >
> >       drm_WARN_ON(&i915->drm, dig_port->tc_link_refcount != 1);
> > -     intel_tc_port_link_init_refcount(dig_port, active_links);
> > -
> >       if (active_links) {
> >               if (!icl_tc_phy_is_connected(dig_port))
> >                       drm_dbg_kms(&i915->drm,
> > @@ -746,6 +747,7 @@ void intel_tc_port_sanitize_mode(struct
> > intel_digital_port *dig_port)
> >                                   dig_port->tc_port_name,
> >                                   tc_port_mode_name(dig_port->tc_mode));
> >               icl_tc_phy_disconnect(dig_port);
> > +             __intel_tc_port_put_link(dig_port);
> >
> >               tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
> >                               fetch_and_zero(&dig_port->tc_lock_wakeref));
> > @@ -864,14 +866,14 @@ void intel_tc_port_get_link(struct intel_digital_port
> > *dig_port,
> >                           int required_lanes)
> >  {
> >       __intel_tc_port_lock(dig_port, required_lanes);
> > -     dig_port->tc_link_refcount++;
> > +     __intel_tc_port_get_link(dig_port);
> >       intel_tc_port_unlock(dig_port);
> >  }
> >
> >  void intel_tc_port_put_link(struct intel_digital_port *dig_port)  {
> >       intel_tc_port_lock(dig_port);
> > -     --dig_port->tc_link_refcount;
> > +     __intel_tc_port_put_link(dig_port);
> >       intel_tc_port_unlock(dig_port);
> >
> >       /*
> > --
> > 2.37.1
> 

  reply	other threads:[~2023-03-21 14:00 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-16 13:17 [Intel-gfx] [PATCH 00/14] drm/i915/tc: Fix a few TypeC / MST issues Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 01/14] drm/i915/tc: Abort DP AUX transfer on a disconnected TC port Imre Deak
2023-03-21 11:09   ` Kahola, Mika
2023-03-21 13:45     ` Imre Deak
2023-03-22 11:19   ` Andrzej Hajda
2023-03-22 12:04     ` Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 02/14] drm/i915/tc: Fix TC port link ref init for DP MST during HW readout Imre Deak
2023-03-21 12:06   ` Kahola, Mika
2023-03-21 14:00     ` Imre Deak [this message]
2023-03-24  7:03       ` Kahola, Mika
2023-03-16 13:17 ` [Intel-gfx] [PATCH 03/14] drm/i915/tc: Fix the ICL PHY ownership check in TC-cold state Imre Deak
2023-03-16 13:51   ` Souza, Jose
2023-03-16 13:17 ` [Intel-gfx] [PATCH 04/14] drm/i915/tc: Fix system resume MST mode restore for DP-alt sinks Imre Deak
2023-03-20 20:16   ` Ville Syrjälä
2023-03-20 21:36     ` Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 05/14] drm/i915/tc: Wait for IOM/FW PHY initialization of legacy TC ports Imre Deak
2023-03-24  8:14   ` Kahola, Mika
2023-03-16 13:17 ` [Intel-gfx] [PATCH 06/14] drm/i915/tc: Factor out helpers converting HPD mask to TC mode Imre Deak
2023-03-24  8:16   ` Kahola, Mika
2023-03-16 13:17 ` [Intel-gfx] [PATCH 07/14] drm/i915/tc: Fix target TC mode for a disconnected legacy port Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 08/14] drm/i915/tc: Fix TC mode for a legacy port if the PHY is not ready Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 09/14] drm/i915/tc: Fix initial TC mode on disabled legacy ports Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 10/14] drm/i915/tc: Make the TC mode readout consistent in all PHY states Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 11/14] drm/i915/tc: Assume a TC port is legacy if VBT says the port has HDMI Imre Deak
2023-03-20 20:01   ` Ville Syrjälä
2023-03-20 21:33     ` Imre Deak
2023-03-21 22:00   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 12/14] drm/i915: Add encoder hook to get the PLL type used by TC ports Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 13/14] drm/i915/tc: Factor out a function querying active links on a TC port Imre Deak
2023-03-20 20:05   ` Ville Syrjälä
2023-03-20 21:34     ` Imre Deak
2023-03-21 22:01   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-03-16 13:17 ` [Intel-gfx] [PATCH 14/14] drm/i915/tc: Check the PLL type used by an enabled " Imre Deak
2023-03-21 22:01   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-03-16 22:27 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tc: Fix a few TypeC / MST issues Patchwork
2023-03-17  8:54   ` Imre Deak
2023-03-20 20:19 ` [Intel-gfx] [PATCH 00/14] " Ville Syrjälä
2023-03-20 21:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix a few TypeC / MST issues (rev2) Patchwork
2023-03-20 21:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-20 21:48 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-20 21:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-21  2:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-03-21 22:16 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/tc: Fix a few TypeC / MST issues (rev5) Patchwork
2023-03-21 22:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: " Patchwork
2023-03-21 22:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-21 22:37 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-03-21 23:43   ` Imre Deak
2023-03-22  9:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix a few TypeC / MST issues (rev6) Patchwork
2023-03-22  9:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-22  9:45 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-22 10:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-22 15:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-03-22 18:38   ` Imre Deak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZBm4YInDZnvtx1ix@ideak-desk.fi.intel.com \
    --to=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=mika.kahola@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.