Re: [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext

From: Richard Henderson <richard.henderson@linaro.org>
To: Warner Losh <imp@bsdimp.com>, qemu-devel@nongnu.org
Cc: Stacey Son <sson@FreeBSD.org>,
	qemu-trivial@nongnu.org, Kyle Evans <kevans@freebsd.org>,
	Michael Tokarev <mjt@tls.msk.ru>,
	Laurent Vivier <laurent@vivier.eu>,
	Philippe Mathieu-Daude <f4bug@amsat.org>
Subject: Re: [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext
Date: Thu, 4 Nov 2021 14:41:17 -0400	[thread overview]
Message-ID: <a4809133-bdae-8c06-511c-0aa9af6f3362@linaro.org> (raw)
In-Reply-To: <20211104140536.42573-24-imp@bsdimp.com>

On 11/4/21 10:05 AM, Warner Losh wrote:
> +    /*
> +     * Make sure T mode matches the PC's notion of thumb mode, although
> +     * FreeBSD lets the processor sort this out, so we may need remove
> +     * this check, or generate a signal...
> +     */
> +    if (!!(tswap32(gr[TARGET_REG_PC]) & 1) != !!(cpsr & CPSR_T)) {
> +        return -TARGET_EINVAL;
> +    }

I've had a read through the Arm ARM for "movs pc, lr", which is how swi_exit returns to 
userspace:

     CPSRWriteByInstr(SPSR[], '1111', TRUE);
     ...
     BranchWritePC(result);

So the CPSR gets written first, which sets the T bit, and thus the result of 
CurrentInstrSet(), then

BranchWritePC(bits(32) address)
   if CurrentInstrSet() == InstrSet_ARM then
     if ArchVersion() < 6 && address<1:0> != '00' then UNPREDICTABLE;
     BranchTo(address<31:2>:'00');
   ...
   else
     BranchTo(address<31:1>:'0');

> +    env->regs[15] = tswap32(gr[TARGET_REG_PC]);

So this should mask the low 1 or 2 bits depending on cpsr & CPSR_T.

r~