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From: Dmitry Osipenko <digetx@gmail.com>
To: Ulf Hansson <ulf.hansson@linaro.org>
Cc: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Viresh Kumar" <vireshk@kernel.org>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Peter De Schrijver" <pdeschrijver@nvidia.com>,
	"Mikko Perttunen" <mperttunen@nvidia.com>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Nishanth Menon" <nm@ti.com>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-mmc@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-clk@vger.kernel.org, "David Heidelberg" <david@ixit.cz>
Subject: Re: [PATCH v14 29/39] soc/tegra: regulators: Prepare for suspend
Date: Wed, 27 Oct 2021 22:39:46 +0300	[thread overview]
Message-ID: <a8280b5b-7347-8995-c97b-10b798cdf057@gmail.com> (raw)
In-Reply-To: <CAPDyKFrQfACqtHtsnbk9fJpfaXWgD6-GEy2HFq8DxMTe4+zZmA@mail.gmail.com>

27.10.2021 18:47, Ulf Hansson пишет:
>> Depending on hardware version, Tegra SoC may require a higher voltages
>> during resume from system suspend, otherwise hardware will crash. Set
>> SoC voltages to a nominal levels during suspend.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> I don't understand the reason why you need to use pm notifiers to
> manage these things. Those are invoked really early during the system
> suspend process and really late during the system resume process.

The suspend/resume time doesn't matter as long as venc genpd resumes
earlier than regulator is unprepared during late resume. Hence early
suspend and late resume suit well.

> In regards to this, you are mentioning the behaviour in genpd around
> system suspend/resume in a comment a few lines below, and that it's
> problematic for the venc domain. Can you perhaps share some more
> information, just to make sure we shouldn't fix the problem in genpd
> instead?

GENPD core force-resumes all domains early during system resume and this
causes odd problem on Tegra20 device in regards to resuming of video
encoder domain where SoC sometimes hangs after couple milliseconds since
the time of ungating the domain if SoC core voltage is low at that time.

Initially I was blaming WiFi driver because somehow this problem didn't
happen if WiFi chip was disabled [1]. I dived into debugging and found
that hang happens after ungating venc early during resume from suspend,
i.e. when genpd core resumes it.

[1] https://www.spinics.net/lists/linux-wireless/msg212116.html

Interestingly, this problem isn't reproducible when system is fully
resumed, i.e. venc can be freely gated/ungated at a low voltage without
any visible problems.

What's also interesting, it's impossible to reproduce hang on a second
resume from suspend if it didn't happen on the first resume. Need to
reboot and try again in that case.

In the end I found that bumping SoC core voltage 100% solves the trouble.

I knew that downstream kernel bumps voltage during suspend, but it
doesn't explain why. I replicated the suspicious behaviour of downstream
kernel and the problem has gone. Could be that this only masks the real
problem, but I don't have more information and the problem is solved.

  reply	other threads:[~2021-10-27 19:39 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-25 22:39 [PATCH v14 00/39] NVIDIA Tegra power management patches for 5.17 Dmitry Osipenko
2021-10-25 22:39 ` [PATCH v14 01/39] soc/tegra: Enable runtime PM during OPP state-syncing Dmitry Osipenko
2021-10-27 15:06   ` Ulf Hansson
2021-10-27 19:32     ` Dmitry Osipenko
2021-10-25 22:39 ` [PATCH v14 02/39] soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() Dmitry Osipenko
2021-10-25 22:39 ` [PATCH v14 03/39] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-10-25 22:39 ` [PATCH v14 04/39] dt-bindings: clock: tegra-car: Document new clock sub-nodes Dmitry Osipenko
2021-10-25 22:39 ` [PATCH v14 05/39] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-10-25 22:39 ` [PATCH v14 06/39] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 07/39] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 08/39] gpu: host1x: Add initial runtime PM and OPP support Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 09/39] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 10/39] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 11/39] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 12/39] drm/tegra: gr2d: Support generic power domain and runtime PM Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 13/39] drm/tegra: gr3d: " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 14/39] drm/tegra: vic: Stop channel on suspend Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 15/39] drm/tegra: nvdec: " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 16/39] drm/tegra: submit: Remove pm_runtime_enabled() checks Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 17/39] drm/tegra: submit: Add missing pm_runtime_mark_last_busy() Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 18/39] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 19/39] bus: tegra-gmi: " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 20/39] pwm: tegra: " Dmitry Osipenko
2021-10-29 15:20   ` Dmitry Osipenko
2021-10-29 15:28     ` Ulf Hansson
2021-10-29 16:28       ` Dmitry Osipenko
2021-10-29 15:56     ` Rafael J. Wysocki
2021-10-29 16:29       ` Dmitry Osipenko
2021-10-29 18:06         ` Rafael J. Wysocki
2021-10-30  0:47           ` Dmitry Osipenko
2021-10-30  1:04             ` Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 21/39] mmc: sdhci-tegra: " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 22/39] mtd: rawnand: tegra: " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 23/39] spi: tegra20-slink: Add " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 24/39] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 25/39] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 26/39] media: staging: tegra-vde: Support generic " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 27/39] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 28/39] soc/tegra: fuse: Use resource-managed helpers Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 29/39] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-10-27 15:47   ` Ulf Hansson
2021-10-27 19:39     ` Dmitry Osipenko [this message]
2021-10-25 22:40 ` [PATCH v14 30/39] soc/tegra: pmc: Rename 3d power domains Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 31/39] soc/tegra: pmc: Rename core power domain Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 32/39] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 33/39] ARM: tegra: Rename CPU and EMC OPP table device-tree nodes Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 34/39] ARM: tegra: Add 500MHz entry to Tegra30 memory OPP table Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 35/39] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 36/39] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 37/39] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 38/39] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-10-25 22:40 ` [PATCH v14 39/39] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko
2021-10-27 16:01 ` [PATCH v14 00/39] NVIDIA Tegra power management patches for 5.17 Ulf Hansson
2021-10-27 19:42   ` Dmitry Osipenko

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