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From: Falk-Moritz Schaefer <falk.schaefer@tu-dortmund.de>
To: ath9k-devel@lists.ath9k.org
Subject: [ath9k-devel] AR9380 MSI
Date: Thu, 19 May 2011 13:06:25 +0200	[thread overview]
Message-ID: <000201cc1614$cee98830$6cbc9890$@tu-dortmund.de> (raw)
In-Reply-To: <F6259B467C2CCE44A8F3D92A9BFE1D3D64BAD4A08A@EAPEX1MAIL1.st.com>

Hi,

I have an AR9382 card (SparkLAN WPEA-121N, 168c:3116 ) in an Lenovo R500
laptop. "pci_enable_msi" returns zero, and the card seems to work fine.
There are lspci outputs below. Hope that helps.

lspci output without "pci_enable_msi":
03:00.0 Network controller: Atheros Communications Inc. Device 0030 (rev 01)
	Subsystem: Atheros Communications Inc. Device 3116
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 17
	Region 0: Memory at f8000000 (64-bit, non-prefetchable) [size=128K]
	[virtual] Expansion ROM@7c400000 [disabled] [size=64K]
	Capabilities: [40] Power Management version 3
		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA
PME(D0+,D1+,D2-,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [50] Message Signalled Interrupts: Mask+ 64bit+
Queue=0/2 Enable-
		Address: 0000000000000000  Data: 0000
		Masking: 00000000  Pending: 00000000
	Capabilities: [70] Express (v2) Endpoint, MSI 00
		DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s
unlimited, L1 <64us
			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal-
Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr-
TransPend-
		LnkCap:	Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1,
Latency L0 <4us, L1 <64us
			ClockPM- Suprise- LLActRep- BwNot-
		LnkCtl:	ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain-
CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+
DLActive- BWMgmt- ABWMgmt-
	Capabilities: [100] Advanced Error Reporting <?>
	Capabilities: [140] Virtual Channel <?>
	Capabilities: [300] Device Serial Number 00-00-00-00-00-00-00-00
	Kernel driver in use: ath9k
	Kernel modules: ath9k

Lspci with "pci_enable_msi":
03:00.0 Network controller: Atheros Communications Inc. Device 0030 (rev 01)
	Subsystem: Atheros Communications Inc. Device 3116
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B- DisINTx+
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 33
	Region 0: Memory at f8000000 (64-bit, non-prefetchable) [size=128K]
	[virtual] Expansion ROM@7c400000 [disabled] [size=64K]
	Capabilities: [40] Power Management version 3
		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA
PME(D0+,D1+,D2-,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [50] Message Signalled Interrupts: Mask+ 64bit+
Queue=0/2 Enable+
		Address: 00000000fee0300c  Data: 41d1
		Masking: 0000000e  Pending: 00000000
	Capabilities: [70] Express (v2) Endpoint, MSI 00
		DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s
unlimited, L1 <64us
			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal-
Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr-
TransPend-
		LnkCap:	Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1,
Latency L0 <4us, L1 <64us
			ClockPM- Suprise- LLActRep- BwNot-
		LnkCtl:	ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain-
CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+
DLActive- BWMgmt- ABWMgmt-
	Capabilities: [100] Advanced Error Reporting <?>
	Capabilities: [140] Virtual Channel <?>
	Capabilities: [300] Device Serial Number 00-00-00-00-00-00-00-00
	Kernel driver in use: ath9k
	Kernel modules: ath9k


> -----Original Message-----
> From: ath9k-devel-bounces at venema.h4ckr.net [mailto:ath9k-devel-
> bounces at venema.h4ckr.net] On Behalf Of Sucheta ROY
> Sent: Thursday, May 19, 2011 10:36 AM
> To: Alex Hacker; ath9k-devel at venema.h4ckr.net
> Subject: Re: [ath9k-devel] AR9380 MSI
> 
> Hi,
> 
> I believe you have AR9380 card installed in your PC?
> 
> You have to build your kernel with CONFIG_PCI_MSI option enabled.
> "CONFIG_PCI_MSI" Depends on: PCI [=y] && ARCH_SUPPORTS_MSI [=y].
> Also you have to include int pci_enable_msi(struct pci_dev *dev)  function
in
> pci.c file of ath9k. This function should be called before the driver
calls
> request_irq().With a successful call the device will be switched from pin-
> based legacy interrupt mode to MSI mode.  The dev->irq number will be
> changed to a new number which represents the message signaled interrupt.
> 
> Also can you please let me know PCI Vendor Id/Device Id of this card ie
> AR9380?
> 
> Thanks in advance for your support.
> 
> Regards,
> Sucheta
> -----Original Message-----
> From: ath9k-devel-bounces at lists.ath9k.org [mailto:ath9k-devel-
> bounces at lists.ath9k.org] On Behalf Of Alex Hacker
> Sent: Thursday, May 19, 2011 11:32 AM
> To: ath9k-devel at venema.h4ckr.net
> Subject: Re: [ath9k-devel] AR9285 MSI
> 
> I have one currently installed on my PC, but do not have much time to
> experimenting with MSI. If you tell me exactly what I should do to enable
it
> I'll report the results.
> 
> On Thu, May 19, 2011 at 12:33:29PM +0800, Sucheta ROY wrote:
> > Hi,
> >
> > I would like to know on what basis it is said AR9380 should work with
MSI.I
> am aware that ath9K Linux driver does not support MSI by default. As you
> are suggesting that certain changes need to be incorporated in the driver.
> What all suggestion I received in previous mail I incorporated but could
not
> make AR9285 work, although it exposes MSI capability structure and cat
> /proc/interrupts show pcie_msi interrupt in the table. So I am afraid
whether
> the same would happen for AR9380!
> >
> > If anybody is having that card, and can make a quick check by enabling
> MSI,that will be of great help. I don't have the card at this moment. If
it is
> ensured that the card works with MSI I will plan to buy one.
> >
> > Thanks and Regards,
> > Sucheta
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
> _______________________________________________
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> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel

  reply	other threads:[~2011-05-19 11:06 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-17 11:16 [ath9k-devel] setting AR_NAV register Andrés García Saavedra
2011-05-17 13:29 ` [ath9k-devel] AR9285 MSI Sucheta ROY
2011-05-17 14:39   ` Mohammed Shafi
2011-05-17 14:41   ` Mohammed Shafi
2011-05-18  1:09     ` Peter Stuge
2011-05-18  2:15       ` Adrian Chadd
2011-05-18  4:28         ` Sucheta ROY
2011-05-18  9:29         ` Sucheta ROY
2011-05-18 10:54           ` Senthilkumar Balasubramanian
2011-05-19  0:32             ` Peter Stuge
2011-05-19  4:33               ` Sucheta ROY
2011-05-19  6:01                 ` Alex Hacker
2011-05-19  8:35                   ` [ath9k-devel] AR9380 MSI Sucheta ROY
2011-05-19 11:06                     ` Falk-Moritz Schaefer [this message]
2011-05-19 12:02                       ` Sucheta ROY
2011-05-19 12:32                         ` Falk-Moritz Schaefer
2011-05-19 12:16                     ` Alex Hacker
2011-05-20  9:30                       ` Sucheta ROY
2011-05-20 10:15                         ` Alex Hacker
2011-05-19  8:41                   ` [ath9k-devel] AR9285 MSI Sucheta ROY
2011-05-18  4:45       ` Mohammed Shafi
2011-05-17 14:27 ` [ath9k-devel] setting AR_NAV register Mohammed Shafi
2011-08-09 12:37   ` Manuel Sáez
2011-06-28 22:12 [ath9k-devel] [RFC/RFT] ath9k: support for multiple beacon intervals Steve Brown
2011-06-29  1:31 ` Adrian Chadd
2011-06-29 13:22   ` Steve Brown
2011-06-29 17:15     ` Adrian Chadd
2011-06-29 18:56       ` [ath9k-devel] AR9380 MSI Matevz Langus
2011-06-30  4:50 Alex Hacker
2011-07-01  9:38 ` Sucheta ROY
2011-07-01 10:18   ` Matevz Langus

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