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Thu, 1 Jul 2021 15:38:52 +0000 Subject: Re: [PATCH v4 1/3] dt-bindings: pwm: Add Xilinx AXI Timer To: Michal Simek , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, =?UTF-8?Q?Uwe_Kleine-K=c3=b6nig?= , Sascha Hauer Cc: linux-kernel@vger.kernel.org, Alvaro Gamez , linux-arm-kernel@lists.infradead.org, Rob Herring References: <20210528214522.617435-1-sean.anderson@seco.com> <13c9345f-b3e5-cc97-437b-c342777fcf3c@monstr.eu> <7a1e89bc-65fc-76b5-2383-19f0613d0a82@xilinx.com> From: Sean Anderson Message-ID: <006fcbf8-d79b-3723-9a9c-03c6350f0a9c@seco.com> Date: Thu, 1 Jul 2021 11:38:47 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 In-Reply-To: <7a1e89bc-65fc-76b5-2383-19f0613d0a82@xilinx.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [50.195.82.171] X-ClientProxiedBy: BL1PR13CA0114.namprd13.prod.outlook.com (2603:10b6:208:2b9::29) To DB7PR03MB4523.eurprd03.prod.outlook.com (2603:10a6:10:19::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [172.27.1.65] (50.195.82.171) by BL1PR13CA0114.namprd13.prod.outlook.com (2603:10b6:208:2b9::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4308.8 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?VkhkY2piOSs5QVN5UUdBZ0t2d3o5Slk3R0c1V3NJc1JCa2loemE1MlZnQ0cw?= =?utf-8?B?TUtsK2w0MDYyMklxeEFkSllONlFsUjZ6T05TZlhaemlOUGF1b0tIbGZqamFQ?= =?utf-8?B?UlZYQVVKeld1QkM5bDllbHZGMi9VK0x2YmNjVkRuWHk5RSt3b3RrVnNkOHYr?= =?utf-8?B?bWNKeXZkS1VPQ1NDMWJKVXg4dmk4c1IySzNtNmd4WU5ZcjVZUXVsUTI2Tlgz?= =?utf-8?B?U0RmcmlYdUFmTVVaWGpiOG44Yk4yKzFLcjRpby9kN3BSM1pkcEpiSWt3NlZl?= =?utf-8?B?VjkxcVpDRE1ZcmlmbkhobWFjdHV3S09aWHIrTDM5WFowNUovbElFcGRlUndh?= =?utf-8?B?RGE0aUh6T3BNY2NXZE91SDlXV1FUU002dGIxQnphSjAyRWNiaVlrb0lUNUFs?= =?utf-8?B?MnNnRlJQZ3AvV3ZJV1A4MEFYSGtuMEIrK0wrSmF1SFk5RTQwMjBYUnNHWThh?= =?utf-8?B?bzE5T0k3UkdLcnVlV2Y0UW9udHUrcXFpQTNkS0J5eTViT3JSK2lWcFA2a0Y3?= =?utf-8?B?YVQvUkFVUGVmeWxYY2VXY3NkdjJZRXE0Y1NOZzV3S3JzdEJlUmRwNDR3Wkxh?= =?utf-8?B?UXFrZ0R1eGFHQ0gxaVpNNWNobllVQWFGbmpyaWRNUVFWZXB0a2JtV0xNOGd6?= =?utf-8?B?UXcrVklwQnFLOWh0Y1lSM0I4dEVpN0NJVFY2d3hRa3hQOTNKc3R5eVlxYlZG?= =?utf-8?B?eU5icmFlejFyWVFjNllGZGZpTFN5S3hEazJDc0I3U0IvYkR5VUVvU1owVUs0?= =?utf-8?B?REdiRGRPRWNhRXcyRnVaZCtDNEx0UEN1ZEw1dHJhMXJOUVYvWEU5UXdOcVhN?= =?utf-8?B?aTVSOWZUZERpRmNIbFB0b2drVjN1YmpiSzRKTkRiQUlPbnc3dURLLzUxTXdX?= =?utf-8?B?SlNWRTcydW9tK1h5VExyVElQZG1tOENSZnlvajQzSUhsb0N2MHZtZXNFeWVY?= =?utf-8?B?TUJ5L3FnVm1MZThVS0NHdTJ4NzhlYUVkWEpKNThhTzJxVEZpcFoxQVZsMnVy?= =?utf-8?B?TWkrOG04SVcrVUtPYlJ1SzA3MzlBQS8yTldrejRDMldoRFdiSWs4Rk9OWkpv?= =?utf-8?B?T1EwZnpPUmtlWW85NEl4U3ZjZWhmckZ4UlpBd1REN2gwYXU5cVI1NDJWVFpP?= =?utf-8?B?aWFUN1JmS3dwVVFidUVxaTZjT3JnRTFhVWt4dE13aGp5cXRYOS9ESEtnTEMz?= =?utf-8?B?Yk5WbWtVd05ySnltdDFEM2x3TGw4cHhSQnlTOVkwVVVvRXE1K2xKZi9BT2hh?= =?utf-8?B?bjdzMFVFcTMvSnpDU3VIS1BZbkdmSDk3a0t0WFdDUzlmUGpoYXBSVnA2dDRz?= =?utf-8?B?aE5CRTZaNGZwRXZpalIrUWhjZlB1SUZ6UGs4MDlQQU9NL0IxYm9obTJ3S05T?= =?utf-8?B?akFsWnpna09odUVIdWdVRXFpa2s1OGc3WHhORU9KNVpDZjMzTE9FTGhpbE1k?= =?utf-8?B?QUZzVHByL0UrcHFMRWt2dlZXZmxqL1JRNStEdWdkQVFHeVFnMmhXcFcwK05x?= =?utf-8?B?eDgwN0ZOMk5vZWlBc1dvOFBHTWZpemsyci9BUWt2a3FpZjltV0tPdWw2SUxi?= =?utf-8?B?c2JRT2FZUnlrSk54c1pwUDdjYTFYV2MrSENwREhKdWxWRTJ5SEZkSVRQQ0Zh?= =?utf-8?B?L1NDckhETnNNMWVDdkNsaTUwdWxmQThub0o0a3ZMTWxzV0lIRklaUjJPOGx0?= =?utf-8?B?S01hNUJIcjdnVHRDcTdkUVZLS1JMai9YQVFNb1NmTUNqak9QNlNZUXU2SmZP?= =?utf-8?Q?3pyklpDLEK0LiZ6XLQnc3fEnbaR19xWMxNWgwHl?= X-OriginatorOrg: seco.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0191e9de-d28e-43d7-1dd4-08d93ca65414 X-MS-Exchange-CrossTenant-AuthSource: DB7PR03MB4523.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2021 15:38:52.3697 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: bebe97c3-6438-442e-ade3-ff17aa50e733 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2/BdH9RSC/QUHRl3xk2m8oruIiUqT6RHtmL7AryqEDCaUGhbxKZYUeIGeKY1mqYRaqZ0nfzu/5kYDprhecF8ww== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR03MB7196 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/30/21 9:58 AM, Michal Simek wrote: > > > On 6/30/21 3:47 PM, Michal Simek wrote: >> >> >> On 5/28/21 11:45 PM, Sean Anderson wrote: >>> This adds a binding for the Xilinx LogiCORE IP AXI Timer. This device is >>> a "soft" block, so it has many parameters which would not be >>> configurable in most hardware. This binding is usually automatically >>> generated by Xilinx's tools, so the names and values of some properties >>> must be kept as they are. Replacement properties have been provided for >>> new device trees. >>> >>> Because we need to init timer devices so early in boot, the easiest way >>> to configure things is to use a device tree property. For the moment >>> this is 'xlnx,pwm', but this could be extended/renamed/etc. in the >>> future if these is a need for a generic property. >>> >>> Signed-off-by: Sean Anderson >>> --- >>> >>> Changes in v4: >>> - Remove references to generate polarity so this can get merged >>> - Predicate PWM driver on the presence of #pwm-cells >>> - Make some properties optional for clocksource drivers >>> >>> Changes in v3: >>> - Mark all boolean-as-int properties as deprecated >>> - Add xlnx,pwm and xlnx,gen?-active-low properties. >>> - Make newer replacement properties mutually-exclusive with what they >>> replace >>> - Add an example with non-deprecated properties only. >>> >>> Changes in v2: >>> - Use 32-bit addresses for example binding >>> >>> .../bindings/pwm/xlnx,axi-timer.yaml | 85 +++++++++++++++++++ >>> 1 file changed, 85 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml b/Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml >>> new file mode 100644 >>> index 000000000000..48a280f96e63 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml >> >> I don't think this is the right location for this. >> >> I have done some grepping and I think this should be done in a different >> way. I pretty much like solution around "ti,omap3430-timer" which is >> calling dmtimer_systimer_select_best() and later dmtimer_is_preferred() >> which in this case would allow us to get rid of cases which are not >> suitable for clocksource and clockevent. >> >> And there is drivers/pwm/pwm-omap-dmtimer.c which has link to timer >> which is providing functions for it's functionality. >> >> I have also looked at >> Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml which is also >> the same device. >> >> And sort of curious if you look at >> https://www.xilinx.com/support/documentation/ip_documentation/axi_timer/v2_0/pg079-axi-timer.pdf >> ( Figure 1-1) >> that PWM is taking input from generate out 0 and generate out 1 which is >> maybe can be modeled is any output and pwm driver can register inputs >> for pwm driver. >> >> >>> @@ -0,0 +1,85 @@ >>> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/pwm/xlnx,axi-timer.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Xilinx LogiCORE IP AXI Timer Device Tree Binding >>> + >>> +maintainers: >>> + - Sean Anderson >>> + >>> +properties: >>> + compatible: >>> + oneOf: >>> + - items: >>> + - const: xlnx,axi-timer-2.0 > > I am not quite sure if make sense also to list 2.0 version. > There were likely also 1.0 version which is compatible with origin xps > version which IIRC was PLB based. And the same driver was using in past > with OPB bus. It's required to list all compatible properties which may be used in a binding. And AFAIK it is good practice to add a new compatible string for new releases of an IP, in case incompatibilities are discovered. --Sean From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BFF1C11F64 for ; Thu, 1 Jul 2021 15:41:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 19CBA61406 for ; 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charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/30/21 9:58 AM, Michal Simek wrote: > > > On 6/30/21 3:47 PM, Michal Simek wrote: >> >> >> On 5/28/21 11:45 PM, Sean Anderson wrote: >>> This adds a binding for the Xilinx LogiCORE IP AXI Timer. This device is >>> a "soft" block, so it has many parameters which would not be >>> configurable in most hardware. This binding is usually automatically >>> generated by Xilinx's tools, so the names and values of some properties >>> must be kept as they are. Replacement properties have been provided for >>> new device trees. >>> >>> Because we need to init timer devices so early in boot, the easiest way >>> to configure things is to use a device tree property. For the moment >>> this is 'xlnx,pwm', but this could be extended/renamed/etc. in the >>> future if these is a need for a generic property. >>> >>> Signed-off-by: Sean Anderson >>> --- >>> >>> Changes in v4: >>> - Remove references to generate polarity so this can get merged >>> - Predicate PWM driver on the presence of #pwm-cells >>> - Make some properties optional for clocksource drivers >>> >>> Changes in v3: >>> - Mark all boolean-as-int properties as deprecated >>> - Add xlnx,pwm and xlnx,gen?-active-low properties. >>> - Make newer replacement properties mutually-exclusive with what they >>> replace >>> - Add an example with non-deprecated properties only. >>> >>> Changes in v2: >>> - Use 32-bit addresses for example binding >>> >>> .../bindings/pwm/xlnx,axi-timer.yaml | 85 +++++++++++++++++++ >>> 1 file changed, 85 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml b/Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml >>> new file mode 100644 >>> index 000000000000..48a280f96e63 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/pwm/xlnx,axi-timer.yaml >> >> I don't think this is the right location for this. >> >> I have done some grepping and I think this should be done in a different >> way. I pretty much like solution around "ti,omap3430-timer" which is >> calling dmtimer_systimer_select_best() and later dmtimer_is_preferred() >> which in this case would allow us to get rid of cases which are not >> suitable for clocksource and clockevent. >> >> And there is drivers/pwm/pwm-omap-dmtimer.c which has link to timer >> which is providing functions for it's functionality. >> >> I have also looked at >> Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml which is also >> the same device. >> >> And sort of curious if you look at >> https://www.xilinx.com/support/documentation/ip_documentation/axi_timer/v2_0/pg079-axi-timer.pdf >> ( Figure 1-1) >> that PWM is taking input from generate out 0 and generate out 1 which is >> maybe can be modeled is any output and pwm driver can register inputs >> for pwm driver. >> >> >>> @@ -0,0 +1,85 @@ >>> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/pwm/xlnx,axi-timer.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Xilinx LogiCORE IP AXI Timer Device Tree Binding >>> + >>> +maintainers: >>> + - Sean Anderson >>> + >>> +properties: >>> + compatible: >>> + oneOf: >>> + - items: >>> + - const: xlnx,axi-timer-2.0 > > I am not quite sure if make sense also to list 2.0 version. > There were likely also 1.0 version which is compatible with origin xps > version which IIRC was PLB based. And the same driver was using in past > with OPB bus. It's required to list all compatible properties which may be used in a binding. And AFAIK it is good practice to add a new compatible string for new releases of an IP, in case incompatibilities are discovered. --Sean _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel