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From: Pavel Fedin <p.fedin@samsung.com>
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Date: Fri, 22 May 2015 09:49:18 +0300
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Subject: Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr
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To: 'Shlomo Pongratz' <shlomopongratz@gmail.com>
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org, 'Ashok Kumar' <ashoks@broadcom.com>, 'Shlomo Pongratz' <shlomo.pongratz@huawei.com>

 Hello!

> The GIC-500 provides registers for managing interrupt sources, =
interrupt behavior, and interrupt
> routing to one or more cores. It supports:
> =E2=80=A2 Multiprocessor environments with up to 128 cores.
> =E2=80=A2 Up to 32 affinity-level 1 clusters.
> =E2=80=A2 Up to eight cores for each cluster.

> I guess your hardware uses different GIC.

 Heh, yes, looks like that. And perhaps it's somewhat non-standard...
 I will study kvmtool and try to come up with some good solution.

 By the way, since you're referring to documentation... TRM you have =
mentioned contains references to "GIC architecture reference manual =
v3.0", which i was unable to find. On ARM resource center i see only v2 =
of the manual. And it looks like you have it because otherwise you would =
not get description of many registers. Can you point me at a correct =
place ?

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia