From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E70AC433EF for ; Mon, 20 Jun 2022 03:20:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237826AbiFTDUK (ORCPT ); Sun, 19 Jun 2022 23:20:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235397AbiFTDUC (ORCPT ); Sun, 19 Jun 2022 23:20:02 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DF9F10CA; Sun, 19 Jun 2022 20:20:00 -0700 (PDT) X-UUID: 7c99e118934a420bb01eab6ae12e0839-20220620 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:f795e7a4-37fb-4631-af63-77ff37674d67,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:b14ad71,CLOUDID:99847d2d-1756-4fa3-be7f-474a6e4be921,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 7c99e118934a420bb01eab6ae12e0839-20220620 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1048510094; Mon, 20 Jun 2022 11:19:54 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 20 Jun 2022 11:19:52 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 20 Jun 2022 11:19:52 +0800 Message-ID: <017bb546af028e881ccd914fad5ac00030199199.camel@mediatek.com> Subject: Re: [PATCH v11 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver From: CK Hu To: Bo-Chen Chen , , , , , , , , , , CC: , , , , , , , , , , , Date: Mon, 20 Jun 2022 11:19:52 +0800 In-Reply-To: <7a0630c68f2754343521daf7b638a20b44e55624.camel@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> <20220610105522.13449-6-rex-bc.chen@mediatek.com> <7a0630c68f2754343521daf7b638a20b44e55624.camel@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2022-06-20 at 11:12 +0800, CK Hu wrote: > On Fri, 2022-06-10 at 18:55 +0800, Bo-Chen Chen wrote: > > From: Markus Schneider-Pargmann > > > > This patch adds a embedded displayport driver for the MediaTek > > mt8195 > > SoC. > > > > It supports the MT8195, the embedded DisplayPort units. It offers > > DisplayPort 1.4 with up to 4 lanes. > > > > The driver creates a child device for the phy. The child device > > will > > never exist without the parent being active. As they are sharing a > > register range, the parent passes a regmap pointer to the child so > > that > > both can work with the same register range. The phy driver sets > > device > > data that is read by the parent to get the phy device that can be > > used > > to control the phy properties. > > > > This driver is based on an initial version by > > Jitao shi > > > > Signed-off-by: Markus Schneider-Pargmann > > Signed-off-by: Guillaume Ranquet > > [Bo-Chen: Cleanup the drivers and modify comments from reviewers] > > Signed-off-by: Bo-Chen Chen > > --- > > [snip] > > > + > > +static void mtk_dp_calculate_pixrate(struct mtk_dp *mtk_dp) > > +{ > > + u8 target_frame_rate = 60; > > + u32 target_pixel_clk; > > + struct drm_display_mode mode; > > + struct mtk_dp_timings *timings = &mtk_dp->info.timings; > > + > > + drm_display_mode_from_videomode(&timings->vm, &mode); > > + > > + if (mtk_dp->info.timings.frame_rate > 0) { > > + target_frame_rate = mtk_dp->info.timings.frame_rate; > > + target_pixel_clk = mode.htotal * mode.vtotal * > > + target_frame_rate; > > + } else if (mtk_dp->info.timings.pix_rate_khz > 0) { > > + target_pixel_clk = mtk_dp->info.timings.pix_rate_khz * > > 1000; > > + } else { > > + target_pixel_clk = mode.htotal * mode.vtotal * > > + target_frame_rate; > > + } > > + > > + mtk_dp->info.timings.pix_rate_khz = target_pixel_clk / 1000; > > It seems that pix_rate_khz is used only here and does not used in > another place, so pix_rate_khz is useless, remove it. It seems that frame_rate is also redundant, so remove it. Regards, CK > > Regards, > CK > > > +} > > + From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4DD6BC43334 for ; Mon, 20 Jun 2022 03:20:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 738DB10F119; Mon, 20 Jun 2022 03:20:02 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id EBE5510F119 for ; Mon, 20 Jun 2022 03:20:00 +0000 (UTC) X-UUID: 7c99e118934a420bb01eab6ae12e0839-20220620 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6, REQID:f795e7a4-37fb-4631-af63-77ff37674d67, OB:0, LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:b14ad71, CLOUDID:99847d2d-1756-4fa3-be7f-474a6e4be921, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 7c99e118934a420bb01eab6ae12e0839-20220620 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1048510094; Mon, 20 Jun 2022 11:19:54 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 20 Jun 2022 11:19:52 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 20 Jun 2022 11:19:52 +0800 Message-ID: <017bb546af028e881ccd914fad5ac00030199199.camel@mediatek.com> Subject: Re: [PATCH v11 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver From: CK Hu To: Bo-Chen Chen , , , , , , , , , , Date: Mon, 20 Jun 2022 11:19:52 +0800 In-Reply-To: <7a0630c68f2754343521daf7b638a20b44e55624.camel@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> <20220610105522.13449-6-rex-bc.chen@mediatek.com> <7a0630c68f2754343521daf7b638a20b44e55624.camel@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-fbdev@vger.kernel.org, granquet@baylibre.com, jitao.shi@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, msp@baylibre.com, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, wenst@chromium.org, linux-arm-kernel@lists.infradead.org, angelogioacchino.delregno@collabora.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, 2022-06-20 at 11:12 +0800, CK Hu wrote: > On Fri, 2022-06-10 at 18:55 +0800, Bo-Chen Chen wrote: > > From: Markus Schneider-Pargmann > > > > This patch adds a embedded displayport driver for the MediaTek > > mt8195 > > SoC. > > > > It supports the MT8195, the embedded DisplayPort units. It offers > > DisplayPort 1.4 with up to 4 lanes. > > > > The driver creates a child device for the phy. The child device > > will > > never exist without the parent being active. As they are sharing a > > register range, the parent passes a regmap pointer to the child so > > that > > both can work with the same register range. The phy driver sets > > device > > data that is read by the parent to get the phy device that can be > > used > > to control the phy properties. > > > > This driver is based on an initial version by > > Jitao shi > > > > Signed-off-by: Markus Schneider-Pargmann > > Signed-off-by: Guillaume Ranquet > > [Bo-Chen: Cleanup the drivers and modify comments from reviewers] > > Signed-off-by: Bo-Chen Chen > > --- > > [snip] > > > + > > +static void mtk_dp_calculate_pixrate(struct mtk_dp *mtk_dp) > > +{ > > + u8 target_frame_rate = 60; > > + u32 target_pixel_clk; > > + struct drm_display_mode mode; > > + struct mtk_dp_timings *timings = &mtk_dp->info.timings; > > + > > + drm_display_mode_from_videomode(&timings->vm, &mode); > > + > > + if (mtk_dp->info.timings.frame_rate > 0) { > > + target_frame_rate = mtk_dp->info.timings.frame_rate; > > + target_pixel_clk = mode.htotal * mode.vtotal * > > + target_frame_rate; > > + } else if (mtk_dp->info.timings.pix_rate_khz > 0) { > > + target_pixel_clk = mtk_dp->info.timings.pix_rate_khz * > > 1000; > > + } else { > > + target_pixel_clk = mode.htotal * mode.vtotal * > > + target_frame_rate; > > + } > > + > > + mtk_dp->info.timings.pix_rate_khz = target_pixel_clk / 1000; > > It seems that pix_rate_khz is used only here and does not used in > another place, so pix_rate_khz is useless, remove it. It seems that frame_rate is also redundant, so remove it. Regards, CK > > Regards, > CK > > > +} > > + From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 667ADC43334 for ; Mon, 20 Jun 2022 03:24:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bn2qgoWFTMOHl38EzWS4jy8VdsgF8flM23pOWFOOinM=; b=qfy4SiktAtS5sy 2hp2JiNPMDdm1R6nOe731q35UqM2jKKB6GRL3Ojw+DLRTUIY61Xg2+CmCHxubk/Z018ipKBSsUuBL OFypWOcjP4KnJjVF2aHkBAlJSpsASJwOVpi4c4OtFEXj28nXnBQel7NwJ86L0WM/tOhjTn7VBM8z9 fs5Bcq99Hchx59b95pcdS3xkM1uEcAU2qbnMng/zs7UL+ZDLBMq7n+IUnPsPJEhTEMlXkrI4Uysfw mpubD1TqgBRBOROPjm+3sbQX2XKB9ZBuP/DThPRq91FGy+RWX2RVPrTDPS5RBPN8k1kD/zDH6XQVA FEYIe7X03AbOs/xj2DRQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o380A-00Fxyh-Vp; Mon, 20 Jun 2022 03:22:59 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3807-00FxyG-JB; Mon, 20 Jun 2022 03:22:56 +0000 X-UUID: 9b58af5cf33348669246303d15121acb-20220619 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:c99a4dd1-98da-499c-b3f5-abb76494970d,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:b14ad71,CLOUDID:c520253d-9948-4b2a-a784-d8a6c1086106,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 9b58af5cf33348669246303d15121acb-20220619 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2009003259; Sun, 19 Jun 2022 20:22:45 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 19 Jun 2022 20:19:54 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 20 Jun 2022 11:19:52 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 20 Jun 2022 11:19:52 +0800 Message-ID: <017bb546af028e881ccd914fad5ac00030199199.camel@mediatek.com> Subject: Re: [PATCH v11 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver From: CK Hu To: Bo-Chen Chen , , , , , , , , , , CC: , , , , , , , , , , , Date: Mon, 20 Jun 2022 11:19:52 +0800 In-Reply-To: <7a0630c68f2754343521daf7b638a20b44e55624.camel@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> <20220610105522.13449-6-rex-bc.chen@mediatek.com> <7a0630c68f2754343521daf7b638a20b44e55624.camel@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220619_202255_667008_1C067A23 X-CRM114-Status: GOOD ( 24.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2022-06-20 at 11:12 +0800, CK Hu wrote: > On Fri, 2022-06-10 at 18:55 +0800, Bo-Chen Chen wrote: > > From: Markus Schneider-Pargmann > > > > This patch adds a embedded displayport driver for the MediaTek > > mt8195 > > SoC. > > > > It supports the MT8195, the embedded DisplayPort units. It offers > > DisplayPort 1.4 with up to 4 lanes. > > > > The driver creates a child device for the phy. The child device > > will > > never exist without the parent being active. As they are sharing a > > register range, the parent passes a regmap pointer to the child so > > that > > both can work with the same register range. The phy driver sets > > device > > data that is read by the parent to get the phy device that can be > > used > > to control the phy properties. > > > > This driver is based on an initial version by > > Jitao shi > > > > Signed-off-by: Markus Schneider-Pargmann > > Signed-off-by: Guillaume Ranquet > > [Bo-Chen: Cleanup the drivers and modify comments from reviewers] > > Signed-off-by: Bo-Chen Chen > > --- > > [snip] > > > + > > +static void mtk_dp_calculate_pixrate(struct mtk_dp *mtk_dp) > > +{ > > + u8 target_frame_rate = 60; > > + u32 target_pixel_clk; > > + struct drm_display_mode mode; > > + struct mtk_dp_timings *timings = &mtk_dp->info.timings; > > + > > + drm_display_mode_from_videomode(&timings->vm, &mode); > > + > > + if (mtk_dp->info.timings.frame_rate > 0) { > > + target_frame_rate = mtk_dp->info.timings.frame_rate; > > + target_pixel_clk = mode.htotal * mode.vtotal * > > + target_frame_rate; > > + } else if (mtk_dp->info.timings.pix_rate_khz > 0) { > > + target_pixel_clk = mtk_dp->info.timings.pix_rate_khz * > > 1000; > > + } else { > > + target_pixel_clk = mode.htotal * mode.vtotal * > > + target_frame_rate; > > + } > > + > > + mtk_dp->info.timings.pix_rate_khz = target_pixel_clk / 1000; > > It seems that pix_rate_khz is used only here and does not used in > another place, so pix_rate_khz is useless, remove it. It seems that frame_rate is also redundant, so remove it. Regards, CK > > Regards, > CK > > > +} > > + _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel