From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60044) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YrhIQ-0008F2-JX for qemu-devel@nongnu.org; Mon, 11 May 2015 02:34:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YrhE2-00033r-OI for qemu-devel@nongnu.org; Mon, 11 May 2015 02:30:08 -0400 Received: from mail-pd0-x230.google.com ([2607:f8b0:400e:c02::230]:34797) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YrhE2-00033b-Hi for qemu-devel@nongnu.org; Mon, 11 May 2015 02:30:02 -0400 Received: by pdbqa5 with SMTP id qa5so136591345pdb.1 for ; Sun, 10 May 2015 23:30:01 -0700 (PDT) From: Peter Crosthwaite Date: Sun, 10 May 2015 23:29:13 -0700 Message-Id: <021c9b586dfa5736fd2d6aa1eb44204e6601dae6.1431322749.git.crosthwaite.peter@gmail.com> In-Reply-To: References: In-Reply-To: References: Subject: [Qemu-devel] [RFC PATCH 10/34] HACK: microblaze: rename clz helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, edgari@xilinx.com, sorenb@xilinx.com, afaerber@suse.de, rth@twiddle.net To avoid namespace collision with ARM helper of the same name. Marking hack, as really all helpers should be consistently renamed or something should be figured out to allow per-target separation of the helper.h namespace. Signed-off-by: Peter Crosthwaite --- target-microblaze/helper.h | 2 +- target-microblaze/op_helper.c | 2 +- target-microblaze/translate.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target-microblaze/helper.h b/target-microblaze/helper.h index bd13826..c7d1c9e 100644 --- a/target-microblaze/helper.h +++ b/target-microblaze/helper.h @@ -3,7 +3,7 @@ DEF_HELPER_1(debug, void, env) DEF_HELPER_FLAGS_3(carry, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) DEF_HELPER_2(cmp, i32, i32, i32) DEF_HELPER_2(cmpu, i32, i32, i32) -DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, i32, i32) +DEF_HELPER_FLAGS_1(mb_clz, TCG_CALL_NO_RWG_SE, i32, i32) DEF_HELPER_3(divs, i32, env, i32, i32) DEF_HELPER_3(divu, i32, env, i32, i32) diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c index 1e7db6a..df2d74f 100644 --- a/target-microblaze/op_helper.c +++ b/target-microblaze/op_helper.c @@ -144,7 +144,7 @@ uint32_t helper_cmpu(uint32_t a, uint32_t b) return t; } -uint32_t helper_clz(uint32_t t0) +uint32_t helper_mb_clz(uint32_t t0) { return clz32(t0); } diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index b199d1d..ec655fd 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -821,7 +821,7 @@ static void dec_bit(DisasContext *dc) t_gen_raise_exception(dc, MB_EXCP_HW_EXCP); } if (dc->cpu->env.pvr.regs[2] & PVR2_USE_PCMP_INSTR) { - gen_helper_clz(cpu_R[dc->rd], cpu_R[dc->ra]); + gen_helper_mb_clz(cpu_R[dc->rd], cpu_R[dc->ra]); } break; case 0x1e0: -- 1.9.1