Re: [PATCH 08/11] brcmfmac: 4373 save-restore support

From: Arend van Spriel <arend.vanspriel@broadcom.com>
To: Chi-Hsien Lin <Chi-Hsien.Lin@cypress.com>,
	"linux-wireless@vger.kernel.org" <linux-wireless@vger.kernel.org>
Cc: "brcm80211-dev-list@broadcom.com"
	<brcm80211-dev-list@broadcom.com>,
	brcm80211-dev-list <brcm80211-dev-list@cypress.com>,
	Franky Lin <franky.lin@broadcom.com>,
	Hante Meuleman <hante.meuleman@broadcom.com>,
	Wright Feng <Wright.Feng@cypress.com>,
	Kalle Valo <kvalo@codeaurora.org>
Subject: Re: [PATCH 08/11] brcmfmac: 4373 save-restore support
Date: Thu, 8 Nov 2018 12:54:06 +0100	[thread overview]
Message-ID: <023710dd-0b93-e1d4-f145-d877136627ba@broadcom.com> (raw)
In-Reply-To: <1541476188-75475-9-git-send-email-chi-hsien.lin@cypress.com>

On 11/6/2018 4:50 AM, Chi-Hsien Lin wrote:
> Use sr_eng_en bit to check 4373 sr support.

Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com>
> Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com>
> ---
>  drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
> index a8d3b96b727f..dfc2af943bff 100644
> --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
> +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
> @@ -1332,7 +1332,7 @@ bool brcmf_chip_set_active(struct brcmf_chip *pub, u32 rstvec)
>
>  bool brcmf_chip_sr_capable(struct brcmf_chip *pub)
>  {
> -	u32 base, addr, reg, pmu_cc3_mask = ~0;
> +	u32 base, addr, reg, sr_eng_en, pmu_cc3_mask = ~0;
>  	struct brcmf_chip_priv *chip;
>  	struct brcmf_core *pmu = brcmf_chip_get_pmu(pub);
>
> @@ -1365,6 +1365,12 @@ bool brcmf_chip_sr_capable(struct brcmf_chip *pub)
>  		addr = CORE_CC_REG(base, sr_control1);
>  		reg = chip->ops->read32(chip->ctx, addr);
>  		return reg != 0;
> +	case CY_CC_4373_CHIP_ID:
> +		/* explicitly check SR engine enable bit */
> +		sr_eng_en = BIT(0);
> +		addr = CORE_CC_REG(base, sr_control0);
> +		reg = chip->ops->read32(chip->ctx, addr);
> +		return (reg & sr_eng_en) != 0;

Drop the variable and just do (reg & BIT(0)).