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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id n6-20020a2e8786000000b0024f3d1daee3sm115913lji.107.2022.05.21.07.20.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 May 2022 07:20:24 -0700 (PDT) Message-ID: <023e6b0c-26a8-1563-1861-9a5cfe715c1f@linaro.org> Date: Sat, 21 May 2022 16:20:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCHv2 2/6] thermal: exynos: Reorder the gpu clock initialization for exynos5420 SoC Content-Language: en-US To: Anand Moon Cc: Bartlomiej Zolnierkiewicz , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Alim Akhtar , Linux PM list , linux-samsung-soc@vger.kernel.org, linux-arm-kernel , Linux Kernel References: <20220515064126.1424-1-linux.amoon@gmail.com> <20220515064126.1424-3-linux.amoon@gmail.com> <68969550-e18b-3c27-d449-1478b314e129@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/05/2022 11:51, Anand Moon wrote: > Hi Krzysztof, > > On Wed, 18 May 2022 at 12:58, Krzysztof Kozlowski > wrote: >> >> On 17/05/2022 20:43, Anand Moon wrote: >>> Hi Krzysztof, >>> >>> On Sun, 15 May 2022 at 15:11, Krzysztof Kozlowski >>> wrote: >>>> >>>> On 15/05/2022 08:41, Anand Moon wrote: >>>>> Reorder the tmu_gpu clock initialization for exynos5422 SoC. >>>> >>>> Why? >>> It just code reorder >> >> I know what it is. I asked why. The answer in English to question "Why" >> is starting with "Because". >> >> You repeated again the argument what are you doing to my question "Why >> are you doing it". >> > tmu_triminfo_apbif is not a core driver to all the Exynos SOC board > it is only used by the Exynos542x SOC family > > If we look into the original code its place in between > the devm_clk_get(data->clk) and clk_prepare(data->clk) > after this change, the code is in the correct order of initialization > of the clock. What was wrong with original order? You still did not explain it. > >> It was the same before, many, many times. It's a waste of reviewers >> time, because you receive a review and you do not implement the feedback. >> >>>> >>>>> >>>>> Cc: Bartlomiej Zolnierkiewicz >>>>> Signed-off-by: Anand Moon >>>>> --- >>>>> v1: split the changes and improve the commit messages >>>>> --- >>>>> drivers/thermal/samsung/exynos_tmu.c | 43 ++++++++++++++-------------- >>>>> 1 file changed, 21 insertions(+), 22 deletions(-) >>>>> >>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c >>>>> index 75b3afadb5be..1ef90dc52c08 100644 >>>>> --- a/drivers/thermal/samsung/exynos_tmu.c >>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c >>>>> @@ -1044,42 +1044,41 @@ static int exynos_tmu_probe(struct platform_device *pdev) >>>>> dev_err(&pdev->dev, "Failed to get clock\n"); >>>>> ret = PTR_ERR(data->clk); >>>>> goto err_sensor; >>>>> - } >>>>> - >>>>> - data->clk_sec = devm_clk_get(&pdev->dev, "tmu_triminfo_apbif"); >>>>> - if (IS_ERR(data->clk_sec)) { >>>>> - if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) { >>>>> - dev_err(&pdev->dev, "Failed to get triminfo clock\n"); >>>>> - ret = PTR_ERR(data->clk_sec); >>>>> - goto err_sensor; >>>>> - } >>>>> } else { >>>>> - ret = clk_prepare_enable(data->clk_sec); >>>>> + ret = clk_prepare_enable(data->clk); >>>> >>>> This looks a bit odd. The clock was before taken unconditionally, not >>>> within "else" branch... >>> >>> The whole *clk_sec* ie tmu_triminfo_apbif clock enable is being moved >>> down to the switch case. >>> tmu_triminfo_apbif clock is not used by Exynos4412 and Exynos5433 and >>> Exynos7 SoC. >> >> This is not the answer. Why are you preparing data->clk within else{} >> branch? >> > After cleanly applying the patches I see the below changes. > if you want me to remove the else part below and keep > the original code I am ok. > > data->clk = devm_clk_get(&pdev->dev, "tmu_apbif"); > if (IS_ERR(data->clk)) { > dev_err(&pdev->dev, "Failed to get clock\n"); > ret = PTR_ERR(data->clk); > goto err_sensor; > } else { > ret = clk_prepare_enable(data->clk); Which is wrong and does not make any sense. This is third question - why the main clock is prepared within 'else' branch? Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C2C0C433F5 for ; Sat, 21 May 2022 14:21:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=l1NsZnRW+e+aWed0KQ0VVKlmVPnec6tb4JKqCUwlP6g=; b=1CQ0X6wRjdgJLg NBnL+6XRxDa+M02J8hC9kSjjxod5VpsjGLBnT3mJuP7uaRKXX/liDer47ZnNNKYCme79Pl8k1NDXt 6PzxblZu/nJQUoVIMSyygMf9RHgF1sVVe5MsKwBEwnJE/ZQr8W6oexdv6MB2xLilA60fnv4E8ntBv ZyNJPxFT47bLmen9CcqONaGh8Sq4kOiXMTNCPhAe1zO3PwJJaLy80jmbgEUIppkThF1FW/k/EvFkv +kQInc75UStZBx1dk/fI8ylN5O3467sTczu38CUcq65OlGqCxWgopQLXbnzQu8prHVvzFWvL5UqOb m51cmtv+04Zsocr8Qwbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nsPy5-00GiwF-1L; Sat, 21 May 2022 14:20:33 +0000 Received: from mail-lj1-x22d.google.com ([2a00:1450:4864:20::22d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nsPy1-00GivR-Ee for linux-arm-kernel@lists.infradead.org; Sat, 21 May 2022 14:20:30 +0000 Received: by mail-lj1-x22d.google.com with SMTP id q1so2735508ljb.5 for ; Sat, 21 May 2022 07:20:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=message-id:date:mime-version:user-agent:subject:content-language:to :cc:references:from:in-reply-to:content-transfer-encoding; bh=xrVvgGpFwC0qfTU8CkXMR2gz4gvqWYcjZfKq5E02l7I=; b=eIz2Zhyd7jFETbpfLY2ODuuP0mBnfCi4/JRwZmkwhGV8pAooU3w7uazeCICpmUBuCq Sk337CsQwzwG/8tPIY2OWFXjCh53+TBmWNdblYb7sMppqOStOhU99LVr7P6Gu8Bx855N wNBp/A9wiXOexdfSLN2KY84Jy0zm5SAOjSSrbMEvXgfKjdE+PhCrPLLcGD+ulbDUZQGK hg4jlt4BmrREyepjX7y5DcKT2kZKUkhQSHhiHVhA/hBPIDkpyKR14jFdiJBK8elV7nOL 0uPeY+PJQpIc8s8F8fKDhVvfYEnoMrR1igEwThKq2kkbRsaaoZK3G3lVDSFmLWKKm1uP NM+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=xrVvgGpFwC0qfTU8CkXMR2gz4gvqWYcjZfKq5E02l7I=; b=SRfO4wwBL4C2C91H4hX0LlM0bSlOLum5EnCmO4a1ZHwgdiWFY2nPQKOy0pSDZGuKxl ExOTeY+RTuJywuR96OpgC+4x6ySez0exF4wM2OGzsYMAULe68w9S52tRKyNA/vgnRl3B 3xDGEO+QfnT0uiSIn/8fqFdile/eIGXg/kt1ioa9ZbAZnFSqSVTHgwjjJiJKFFAk5G2i LEhU5hbl6Lg9sQZHY56sp1Z+QF79h+bFb/1T9Do3CaztaJeT8Q+PM+t1ZfPJYARZrftj v/OyOZw7MImJVRS52C7hVaG+VYNENTgZFOvpqwuBbf55Rx6hhGuiGvfQ9H1eerLKGpSu DMYw== X-Gm-Message-State: AOAM531YbiaBeeY+9vUyQ7CEfEN90aJL6xmFxJt4nD0p/A2m53eaABkm p6eGyAZ9uAgI0ELUtAejmGwHpQ== X-Google-Smtp-Source: ABdhPJwwnngd/0Mx/PI34JuKwmKYxubLU9MWgXgvRgl9EQbWdC5uXxSWXIe1139D4SRIrwVAX0KfsQ== X-Received: by 2002:a2e:b1c7:0:b0:253:dfbf:56cf with SMTP id e7-20020a2eb1c7000000b00253dfbf56cfmr3680430lja.513.1653142824967; Sat, 21 May 2022 07:20:24 -0700 (PDT) Received: from [192.168.0.17] (78-11-189-27.static.ip.netia.com.pl. [78.11.189.27]) by smtp.gmail.com with ESMTPSA id n6-20020a2e8786000000b0024f3d1daee3sm115913lji.107.2022.05.21.07.20.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 21 May 2022 07:20:24 -0700 (PDT) Message-ID: <023e6b0c-26a8-1563-1861-9a5cfe715c1f@linaro.org> Date: Sat, 21 May 2022 16:20:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCHv2 2/6] thermal: exynos: Reorder the gpu clock initialization for exynos5420 SoC Content-Language: en-US To: Anand Moon Cc: Bartlomiej Zolnierkiewicz , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Alim Akhtar , Linux PM list , linux-samsung-soc@vger.kernel.org, linux-arm-kernel , Linux Kernel References: <20220515064126.1424-1-linux.amoon@gmail.com> <20220515064126.1424-3-linux.amoon@gmail.com> <68969550-e18b-3c27-d449-1478b314e129@linaro.org> From: Krzysztof Kozlowski In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220521_072029_547294_0B030C32 X-CRM114-Status: GOOD ( 28.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 21/05/2022 11:51, Anand Moon wrote: > Hi Krzysztof, > > On Wed, 18 May 2022 at 12:58, Krzysztof Kozlowski > wrote: >> >> On 17/05/2022 20:43, Anand Moon wrote: >>> Hi Krzysztof, >>> >>> On Sun, 15 May 2022 at 15:11, Krzysztof Kozlowski >>> wrote: >>>> >>>> On 15/05/2022 08:41, Anand Moon wrote: >>>>> Reorder the tmu_gpu clock initialization for exynos5422 SoC. >>>> >>>> Why? >>> It just code reorder >> >> I know what it is. I asked why. The answer in English to question "Why" >> is starting with "Because". >> >> You repeated again the argument what are you doing to my question "Why >> are you doing it". >> > tmu_triminfo_apbif is not a core driver to all the Exynos SOC board > it is only used by the Exynos542x SOC family > > If we look into the original code its place in between > the devm_clk_get(data->clk) and clk_prepare(data->clk) > after this change, the code is in the correct order of initialization > of the clock. What was wrong with original order? You still did not explain it. > >> It was the same before, many, many times. It's a waste of reviewers >> time, because you receive a review and you do not implement the feedback. >> >>>> >>>>> >>>>> Cc: Bartlomiej Zolnierkiewicz >>>>> Signed-off-by: Anand Moon >>>>> --- >>>>> v1: split the changes and improve the commit messages >>>>> --- >>>>> drivers/thermal/samsung/exynos_tmu.c | 43 ++++++++++++++-------------- >>>>> 1 file changed, 21 insertions(+), 22 deletions(-) >>>>> >>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c >>>>> index 75b3afadb5be..1ef90dc52c08 100644 >>>>> --- a/drivers/thermal/samsung/exynos_tmu.c >>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c >>>>> @@ -1044,42 +1044,41 @@ static int exynos_tmu_probe(struct platform_device *pdev) >>>>> dev_err(&pdev->dev, "Failed to get clock\n"); >>>>> ret = PTR_ERR(data->clk); >>>>> goto err_sensor; >>>>> - } >>>>> - >>>>> - data->clk_sec = devm_clk_get(&pdev->dev, "tmu_triminfo_apbif"); >>>>> - if (IS_ERR(data->clk_sec)) { >>>>> - if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) { >>>>> - dev_err(&pdev->dev, "Failed to get triminfo clock\n"); >>>>> - ret = PTR_ERR(data->clk_sec); >>>>> - goto err_sensor; >>>>> - } >>>>> } else { >>>>> - ret = clk_prepare_enable(data->clk_sec); >>>>> + ret = clk_prepare_enable(data->clk); >>>> >>>> This looks a bit odd. The clock was before taken unconditionally, not >>>> within "else" branch... >>> >>> The whole *clk_sec* ie tmu_triminfo_apbif clock enable is being moved >>> down to the switch case. >>> tmu_triminfo_apbif clock is not used by Exynos4412 and Exynos5433 and >>> Exynos7 SoC. >> >> This is not the answer. Why are you preparing data->clk within else{} >> branch? >> > After cleanly applying the patches I see the below changes. > if you want me to remove the else part below and keep > the original code I am ok. > > data->clk = devm_clk_get(&pdev->dev, "tmu_apbif"); > if (IS_ERR(data->clk)) { > dev_err(&pdev->dev, "Failed to get clock\n"); > ret = PTR_ERR(data->clk); > goto err_sensor; > } else { > ret = clk_prepare_enable(data->clk); Which is wrong and does not make any sense. This is third question - why the main clock is prepared within 'else' branch? Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel