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([2001:b07:6468:f312:a0d1:fc42:c610:f977]) by smtp.gmail.com with ESMTPSA id h11sm33850848wrb.68.2020.08.17.23.38.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Aug 2020 23:38:40 -0700 (PDT) Subject: Re: [kvm-unit-tests PATCH] x86: svm: low CR3 bits are not MBZ To: Krish Sadhukhan , Jim Mattson Cc: Nadav Amit , "kvm@vger.kernel.org" References: <20200713043908.39605-1-namit@vmware.com> <6CD095D7-EF7F-49C2-98EF-F72D019817B2@vmware.com> <9DC37B0B-597A-4B31-8397-B6E4764EEA37@vmware.com> <4bb7c975-70dd-0247-3824-973229f3337b@oracle.com> From: Paolo Bonzini Message-ID: <02cab471-0023-08f9-1722-2d42a3686a50@redhat.com> Date: Tue, 18 Aug 2020 08:38:39 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <4bb7c975-70dd-0247-3824-973229f3337b@oracle.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 05/08/20 01:13, Krish Sadhukhan wrote: >> > > I did some experiments on the processor behavior on an Epyc 2 system via > KVM: > >    1. MBZ bits:  VMRUN passes even if these bits are set to 1 and > guest is exiting with exit code of            SVM_EXIT_VMMCALL. > According to the APM, this settting should constitute an invalid guest > state and hence I should get and exit code of SVM_EXIT_ERR. There's no > KVM check in place for these CR3 bits, so the check is all done in > hardware. > >    2. non-MBZ reserved bits:  Based on Nadav Amit's suggestion, I set > the 'not present' bit in an upper level NPT in order to trigger an NPF > and I did get an exit code of SVM_EXIT_NPF when I set any of these bits. > I am hoping that the processor has done the consistency check before it > tripped on NPF and not the other way around, so that our test is useful : > >     In PAE-legacy and non-PAE-legacy modes, the guest doesn't exit > with SVM_EXIT_VMMCALL when these bits are set to 0. I am not sure if I > am missing any special setting for the PAE-legacy and non-PAE-legacy > modes. In long-mode, however, the processor seems to behave as per APM, > i.e., guest exits with SVM_EXIT_VMMCALL when these bits are set to 0. Are you going to send patches for this? Thanks, Paolo