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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?wVnnd2bSgPQvbmxnMAY8zmjQZs6nLsoEzPmS0Gy3ljCaDRrzpDLOSO7klq2N?= =?us-ascii?Q?0wVfHlZGtb6VGHiL2quqK9FjykzkqeykL234nWMrvqSaxkNlHqsem/PWGuLf?= =?us-ascii?Q?2DinjGQ+qsyy+rgFOuFR/mWrCLkviJsNOO4y/RV8GzMW2JJ3xc7okKyhmac7?= =?us-ascii?Q?HIocpTyky57+CjalbmxhQwXiBt6FHCAZh3mXj9B2ebIB4NEsdeFe409jPpqL?= =?us-ascii?Q?nbbiIb7Z95OZb2DTZdJJfmgda+maxwKXOqHgmfcXwgBulDljN66eHFaLYH/u?= =?us-ascii?Q?UQ3mcIE35Ul6YmhGetnX4yke+x3Si5+DclFuMR/eSlUDS71LCRH5Pt2utn1I?= =?us-ascii?Q?ZHLzgQZR+6tg+F9u4POS5CtMT0xSJk+eYB23Z1jLW+Z0++IXm9XNAf/9X7YN?= =?us-ascii?Q?OPi2g8kYFlG3yCmyyg5rVbKK2aKXICsgRUztrFFi+izzFpX/muyDDX+eiX2f?= =?us-ascii?Q?yEdu7eIzoqkF2Pn2PUMtvH+YiUvsH9rrDrd7tXlxF2Vds0Bjvf/wjTxUYEcE?= =?us-ascii?Q?0DAmF4Lwu0BdcG6f7etEfRy7vYOczn326fJdUUJan5DANdGZksneJ4LKkowb?= =?us-ascii?Q?W5nqPKjpM7wbzApf6IiypNgxydp01Wcf7D4sMZbjXY96SDk7VdXjcud+Ubmi?= =?us-ascii?Q?V9SuCJKwpvu09WP5Xp0yXoqDohp8+9ucmrsvByE5Ju4JafOM6qJga48CkEaW?= =?us-ascii?Q?SMHClg7K5JgHnopdlF4pYZJrftSG4xWkdABMVAshAv8rz3kEktPim+ppw3OL?= =?us-ascii?Q?lOJqFaC6i/DYTcG6H3LZQocJDETeU7D+KOaP/9pZaNY0Wf9OrIXSUWt4bG3v?= =?us-ascii?Q?XxS3qK88mr/R47vVpdnVpZozvybZ+I8vMcTGeYm7VTDp66qa7e6c8zc6xvrq?= =?us-ascii?Q?KN6bD/ymUvLMdDsl+WfHnogsBo8wTDk+KjyaSugmWq4/bWM1IJ80x9AZMLhi?= =?us-ascii?Q?fWdEq3bk70mvYMtXrMPLNcsUiiBaTugXofUR4KNefdk0SLT1yiGK+rAHnLLB?= =?us-ascii?Q?spgTbUew8LQEEHFixi0eaGMVsWthp0Wf/Lq9hGaWLDS5ZZwb7YzdL4dvSXmw?= =?us-ascii?Q?2GoRydlb3X4+nrlnc6eTcoll8HABBBr5Z/QTpv9p/iozzFEuu/cjUsDBlltT?= =?us-ascii?Q?0XFu51xedj65c8YBRhKiwde/g/o6rLR5utt6q/IwLv/qV7J0ZKtZz5GLeXMS?= =?us-ascii?Q?pSofRt4NfJCFk5yrgJQLcJZJiLxdXmFSbiHM6qeYRqsxZEahtXtwDiOXJmyR?= =?us-ascii?Q?x+WimqAFfRxdjrG6uB0qQdERx7KdkmSNBBhjSjT6iwvbAG2xdWgpsGNun7Z5?= =?us-ascii?Q?fiLcoAI/PeOrK+vJDbGMQFkc?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 51b04212-5cc8-4806-2c02-08d9608b2f3e X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5600.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Aug 2021 07:55:15.9729 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +7JVJHvX70kaqvS/jB9OND3PUz8mMfqeacNkR3WMir74Ia8bCvVworhyzM6X6YkP61SZ7KwlbO7BgbudqxQIWQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB4848 On 13.08.2021 20:31, Marek Marczykowski-G=C3=B3recki wrote: > Besides standard UART setup, this device needs enabling > (vendor-specific) "Enhanced Control Bits" - otherwise disabling hardware > control flow (MCR[2]) is ignored. Add appropriate quirk to the > ns16550_setup_preirq(), similar to the handle_dw_usr_busy_quirk(). The > new function act on Exar cards only (based on vendor ID). While on IRC you did say you have a datasheet or alike for the specific card you have in use, may I ask that you clarify why the logic is applicable to all (past, present, and future) Exar cards? > @@ -169,6 +170,21 @@ static void handle_dw_usr_busy_quirk(struct ns16550 = *uart) > } > } > =20 > +static void enable_exar_enhanced_bits(struct ns16550 *uart) > +{ > +#ifdef NS16550_PCI > + if ( uart->bar && > + pci_conf_read16(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[2], > + uart->ps_bdf[2]), PCI_VENDOR_ID) =3D=3D PCI_VEN= DOR_ID_EXAR ) > + { > + /* Exar cards ignores setting MCR[2] (hardware flow control) unl= ess > + * "Enhanced control bits" is enabled. > + */ Style nit: /* belongs on its own line as per ./CODING_STYLE. > + ns_write_reg(uart, UART_XR_EFR, UART_EFR_ECB); Wouldn't this better be a read-modify-write operation? > --- a/xen/include/xen/8250-uart.h > +++ b/xen/include/xen/8250-uart.h > @@ -121,6 +121,10 @@ > /* Frequency of external clock source. This definition assumes PC platfo= rm. */ > #define UART_CLOCK_HZ 1843200 > =20 > +/* Exar specific */ > +#define UART_XR_EFR 0x09 > +#define UART_EFR_ECB 0x10 Please move the former into the group after the "/* Register offsets */" comment and extend the comment on the latter to establish a link to UART_XR_EFR. Jan