From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81DF1C433EF for ; Wed, 11 May 2022 05:14:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234823AbiEKFOy (ORCPT ); Wed, 11 May 2022 01:14:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229628AbiEKFOv (ORCPT ); Wed, 11 May 2022 01:14:51 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FDF92300F9; Tue, 10 May 2022 22:14:48 -0700 (PDT) X-UUID: beee08a62f404659a32f9fd4986f979c-20220511 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:a73148ee-d71a-41e4-93fd-dacb4aad9279,OB:0,LO B:0,IP:0,URL:8,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:8 X-CID-META: VersionHash:faefae9,CLOUDID:c24a60b3-56b5-4c9e-8d83-0070b288eb6a,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: beee08a62f404659a32f9fd4986f979c-20220511 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 609984931; Wed, 11 May 2022 13:14:42 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Wed, 11 May 2022 13:14:41 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 May 2022 13:14:41 +0800 Message-ID: <0360e5dd5780a8ec6e729e3e2186108f1b465ad0.camel@mediatek.com> Subject: Re: [PATCH v3 2/2] PM / devfreq: mediatek: Introduce MediaTek CCI devfreq driver From: Johnson Wang To: Chanwoo Choi , , , , CC: , , , , , , , Date: Wed, 11 May 2022 13:14:41 +0800 In-Reply-To: <72396dec-d418-e732-11a8-a92e89692dd1@gmail.com> References: <20220425125546.4129-1-johnson.wang@mediatek.com> <20220425125546.4129-3-johnson.wang@mediatek.com> <06ed1edc7ae30104ca05e4e3958d7b11b7c7f706.camel@mediatek.com> <72396dec-d418-e732-11a8-a92e89692dd1@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2022-05-09 at 20:51 +0900, Chanwoo Choi wrote: > On 22. 5. 9. 14:57, Johnson Wang wrote: > > On Sat, 2022-05-07 at 22:53 +0900, Chanwoo Choi wrote: > > > On 22. 5. 6. 20:38, Johnson Wang wrote: > > > > On Mon, 2022-04-25 at 20:55 +0800, Johnson Wang wrote: > > > > > We introduce a devfreq driver for the MediaTek Cache Coherent > > > > > Interconnect > > > > > (CCI) used by some MediaTek SoCs. > > > > > > > > > > In this driver, we use the passive devfreq driver to get > > > > > target > > > > > frequencies > > > > > and adjust voltages accordingly. In MT8183 and MT8186, the > > > > > MediaTek > > > > > CCI > > > > > is supplied by the same regulators with the little core CPUs. > > > > > > > > > > Signed-off-by: Johnson Wang > > > > > Signed-off-by: Jia-Wei Chang > > > > > --- > > > > > This patch depends on "devfreq-testing"[1]. > > > > > [1] > > > > > > > > > https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git/log/?h=devfreq-testing__;!!CTRNKA9wMg0ARbw!wnTkI_sh3TsliBPFP70DFwtSZGtKyPinFu9h2BwULWX-xrWF0C21rLV-n1HhstfmLw42$ > > > > > > > > > > --- > > > > > drivers/devfreq/Kconfig | 10 + > > > > > drivers/devfreq/Makefile | 1 + > > > > > drivers/devfreq/mtk-cci-devfreq.c | 474 > > > > > ++++++++++++++++++++++++++++++ > > > > > 3 files changed, 485 insertions(+) > > > > > create mode 100644 drivers/devfreq/mtk-cci-devfreq.c > > > > > > > > > > diff --git a/drivers/devfreq/Kconfig > > > > > b/drivers/devfreq/Kconfig > > > > > index 87eb2b837e68..9754d8b31621 100644 > > > > > --- a/drivers/devfreq/Kconfig > > > > > +++ b/drivers/devfreq/Kconfig > > > > > @@ -120,6 +120,16 @@ config ARM_TEGRA_DEVFREQ > > > > > It reads ACTMON counters of memory controllers and > > > > > adjusts > > > > > the > > > > > operating frequencies and voltages with OPP support. > > > > > > > > > > +config ARM_MEDIATEK_CCI_DEVFREQ > > > > > + tristate "MEDIATEK CCI DEVFREQ Driver" > > > > > + depends on ARM_MEDIATEK_CPUFREQ || COMPILE_TEST > > > > > + select DEVFREQ_GOV_PASSIVE > > > > > + help > > > > > + This adds a devfreq driver for MediaTek Cache > > > > > Coherent > > > > > Interconnect > > > > > + which is shared the same regulators with the cpu > > > > > cluster. It > > > > > can track > > > > > + buck voltages and update a proper CCI frequency. Use > > > > > the > > > > > notification > > > > > + to get the regulator status. > > > > > + > > > > > config ARM_RK3399_DMC_DEVFREQ > > > > > tristate "ARM RK3399 DMC DEVFREQ Driver" > > > > > depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ > > > > > diff --git a/drivers/devfreq/Makefile > > > > > b/drivers/devfreq/Makefile > > > > > index 0b6be92a25d9..bf40d04928d0 100644 > > > > > --- a/drivers/devfreq/Makefile > > > > > +++ b/drivers/devfreq/Makefile > > > > > @@ -11,6 +11,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += > > > > > governor_passive.o > > > > > obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o > > > > > obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o > > > > > obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o > > > > > +obj-$(CONFIG_ARM_MEDIATEK_CCI_DEVFREQ) += mtk-cci- > > > > > devfreq.o > > > > > obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o > > > > > obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33- > > > > > mbus.o > > > > > obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30- > > > > > devfreq.o > > > > > diff --git a/drivers/devfreq/mtk-cci-devfreq.c > > > > > b/drivers/devfreq/mtk- > > > > > cci-devfreq.c > > > > > new file mode 100644 > > > > > index 000000000000..b3e31c45a57c > > > > > --- /dev/null > > > > > +++ b/drivers/devfreq/mtk-cci-devfreq.c > > > > > @@ -0,0 +1,474 @@ > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > +/* > > > > > + * Copyright (C) 2022 MediaTek Inc. > > > > > + */ > > > > > + > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > + > > > > > +struct mtk_ccifreq_platform_data { > > > > > + int min_volt_shift; > > > > > + int max_volt_shift; > > > > > + int proc_max_volt; > > > > > + int sram_min_volt; > > > > > + int sram_max_volt; > > > > > +}; > > > > > + > > > > > +struct mtk_ccifreq_drv { > > > > > + struct device *dev; > > > > > + struct devfreq *devfreq; > > > > > + struct regulator *proc_reg; > > > > > + struct regulator *sram_reg; > > > > > + struct clk *cci_clk; > > > > > + struct clk *inter_clk; > > > > > + int inter_voltage; > > > > > + int pre_voltage; > > > > > + unsigned long pre_freq; > > > > > + /* Avoid race condition for regulators between notify > > > > > and > > > > > policy */ > > > > > + struct mutex reg_lock; > > > > > + struct notifier_block opp_nb; > > > > > + const struct mtk_ccifreq_platform_data *soc_data; > > > > > + int vtrack_max; > > > > > +}; > > > > > + > > > > > +static int mtk_ccifreq_set_voltage(struct mtk_ccifreq_drv > > > > > *drv, > > > > > int > > > > > new_voltage) > > > > > +{ > > > > > + const struct mtk_ccifreq_platform_data *soc_data = drv- > > > > > > soc_data; > > > > > > > > > > + struct device *dev = drv->dev; > > > > > + int pre_voltage, pre_vsram, new_vsram, vsram, voltage, > > > > > ret; > > > > > + int retry_max = drv->vtrack_max; > > > > > + > > > > > + if (!drv->sram_reg) { > > > > > + ret = regulator_set_voltage(drv->proc_reg, > > > > > new_voltage, > > > > > + drv->soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + goto out_set_voltage; > > > > > + } > > > > > + > > > > > + pre_voltage = regulator_get_voltage(drv->proc_reg); > > > > > + if (pre_voltage < 0) { > > > > > + dev_err(dev, "invalid vproc value: %d\n", > > > > > pre_voltage); > > > > > + return pre_voltage; > > > > > + } > > > > > + > > > > > + pre_vsram = regulator_get_voltage(drv->sram_reg); > > > > > + if (pre_vsram < 0) { > > > > > + dev_err(dev, "invalid vsram value: %d\n", > > > > > pre_vsram); > > > > > + return pre_vsram; > > > > > + } > > > > > + > > > > > + new_vsram = clamp(new_voltage + soc_data- > > > > > >min_volt_shift, > > > > > + soc_data->sram_min_volt, soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + > > > > > + do { > > > > > + if (pre_voltage <= new_voltage) { > > > > > + vsram = clamp(pre_voltage + soc_data- > > > > > > max_volt_shift, > > > > > > > > > > + soc_data->sram_min_volt, > > > > > new_vsram); > > > > > + ret = regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > + if (vsram == soc_data->sram_max_volt || > > > > > + new_vsram == soc_data- > > > > > >sram_min_volt) > > > > > + voltage = new_voltage; > > > > > + else > > > > > + voltage = vsram - soc_data- > > > > > > min_volt_shift; > > > > > > > > > > + > > > > > + ret = regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + if (ret) { > > > > > + regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > pre_vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + return ret; > > > > > + } > > > > > + } else if (pre_voltage > new_voltage) { > > > > > + voltage = max(new_voltage, > > > > > + pre_vsram - soc_data- > > > > > > max_volt_shift); > > > > > > > > > > + ret = regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > + if (voltage == new_voltage) > > > > > + vsram = new_vsram; > > > > > + else > > > > > + vsram = max(new_vsram, > > > > > + voltage + soc_data- > > > > > > min_volt_shift); > > > > > > > > > > + > > > > > + ret = regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + if (ret) { > > > > > + regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > pre_voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + return ret; > > > > > + } > > > > > + } > > > > > + > > > > > + pre_voltage = voltage; > > > > > + pre_vsram = vsram; > > > > > + > > > > > + if (--retry_max < 0) { > > > > > + dev_err(dev, > > > > > + "over loop count, failed to set > > > > > voltage\n"); > > > > > + return -EINVAL; > > > > > + } > > > > > + } while (voltage != new_voltage || vsram != new_vsram); > > > > > + > > > > > +out_set_voltage: > > > > > + if (!ret) > > > > > + drv->pre_voltage = new_voltage; > > > > > + > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_target(struct device *dev, unsigned > > > > > long > > > > > *freq, > > > > > + u32 flags) > > > > > +{ > > > > > + struct mtk_ccifreq_drv *drv = dev_get_drvdata(dev); > > > > > + struct clk *cci_pll = clk_get_parent(drv->cci_clk); > > > > > + struct dev_pm_opp *opp; > > > > > + unsigned long opp_rate; > > > > > + int voltage, pre_voltage, inter_voltage, > > > > > target_voltage, ret; > > > > > + > > > > > + if (!drv) > > > > > + return -EINVAL; > > > > > + > > > > > + if (drv->pre_freq == *freq) > > > > > + return 0; > > > > > + > > > > > + inter_voltage = drv->inter_voltage; > > > > > + > > > > > + opp_rate = *freq; > > > > > + opp = devfreq_recommended_opp(dev, &opp_rate, 1); > > > > > + if (IS_ERR(opp)) { > > > > > + dev_err(dev, "failed to find opp for freq: > > > > > %ld\n", > > > > > opp_rate); > > > > > + return PTR_ERR(opp); > > > > > + } > > > > > + > > > > > + mutex_lock(&drv->reg_lock); > > > > > + > > > > > + voltage = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + > > > > > + if (unlikely(drv->pre_voltage <= 0)) > > > > > + pre_voltage = regulator_get_voltage(drv- > > > > > >proc_reg); > > > > > + else > > > > > + pre_voltage = drv->pre_voltage; > > > > > + > > > > > + if (pre_voltage < 0) { > > > > > + dev_err(dev, "invalid vproc value: %d\n", > > > > > pre_voltage); > > > > > + return pre_voltage; > > > > > + } > > > > > + > > > > > + /* scale up: set voltage first then freq. */ > > > > > + target_voltage = max(inter_voltage, voltage); > > > > > + if (pre_voltage <= target_voltage) { > > > > > + ret = mtk_ccifreq_set_voltage(drv, > > > > > target_voltage); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale up > > > > > voltage\n"); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + } > > > > > + > > > > > + /* switch the cci clock to intermediate clock source. > > > > > */ > > > > > + ret = clk_set_parent(drv->cci_clk, drv->inter_clk); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to re-parent cci > > > > > clock\n"); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + > > > > > + /* set the original clock to target rate. */ > > > > > + ret = clk_set_rate(cci_pll, *freq); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to set cci pll rate: > > > > > %d\n", ret); > > > > > + clk_set_parent(drv->cci_clk, cci_pll); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + > > > > > + /* switch the cci clock back to the original clock > > > > > source. */ > > > > > + ret = clk_set_parent(drv->cci_clk, cci_pll); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to re-parent cci > > > > > clock\n"); > > > > > + mtk_ccifreq_set_voltage(drv, inter_voltage); > > > > > + goto out_unlock; > > > > > + } > > > > > + > > > > > + /* > > > > > + * If the new voltage is lower than the intermediate > > > > > voltage or > > > > > the > > > > > + * original voltage, scale down to the new voltage. > > > > > + */ > > > > > + if (voltage < inter_voltage || voltage < pre_voltage) { > > > > > + ret = mtk_ccifreq_set_voltage(drv, voltage); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale down > > > > > voltage\n"); > > > > > + goto out_unlock; > > > > > + } > > > > > + } > > > > > + > > > > > + drv->pre_freq = *freq; > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + > > > > > + return 0; > > > > > + > > > > > +out_restore_voltage: > > > > > + mtk_ccifreq_set_voltage(drv, pre_voltage); > > > > > + > > > > > +out_unlock: > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_opp_notifier(struct notifier_block > > > > > *nb, > > > > > + unsigned long event, void > > > > > *data) > > > > > +{ > > > > > + struct dev_pm_opp *opp = data; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + unsigned long freq, volt; > > > > > + > > > > > + drv = container_of(nb, struct mtk_ccifreq_drv, opp_nb); > > > > > + > > > > > + if (event == OPP_EVENT_ADJUST_VOLTAGE) { > > > > > + freq = dev_pm_opp_get_freq(opp); > > > > > + > > > > > + mutex_lock(&drv->reg_lock); > > > > > + /* current opp item is changed */ > > > > > + if (freq == drv->pre_freq) { > > > > > + volt = dev_pm_opp_get_voltage(opp); > > > > > + mtk_ccifreq_set_voltage(drv, volt); > > > > > + } > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + } > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static struct devfreq_dev_profile mtk_ccifreq_profile = { > > > > > + .target = mtk_ccifreq_target, > > > > > +}; > > > > > + > > > > > +static int mtk_ccifreq_probe(struct platform_device *pdev) > > > > > +{ > > > > > + struct device *dev = &pdev->dev; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + struct devfreq_passive_data *passive_data; > > > > > + struct dev_pm_opp *opp; > > > > > + unsigned long rate, opp_volt; > > > > > + int ret; > > > > > + > > > > > + drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL); > > > > > + if (!drv) > > > > > + return -ENOMEM; > > > > > + > > > > > + drv->dev = dev; > > > > > + drv->soc_data = (const struct mtk_ccifreq_platform_data > > > > > *) > > > > > + of_device_get_match_data(&pdev- > > > > > >dev); > > > > > + mutex_init(&drv->reg_lock); > > > > > + platform_set_drvdata(pdev, drv); > > > > > + > > > > > + drv->cci_clk = devm_clk_get(dev, "cci"); > > > > > + if (IS_ERR(drv->cci_clk)) { > > > > > + ret = PTR_ERR(drv->cci_clk); > > > > > + return dev_err_probe(dev, ret, > > > > > + "failed to get cci clk: > > > > > %d\n", > > > > > ret); > > > > > + } > > > > > + > > > > > + drv->inter_clk = devm_clk_get(dev, "intermediate"); > > > > > + if (IS_ERR(drv->inter_clk)) { > > > > > + ret = PTR_ERR(drv->inter_clk); > > > > > + dev_err_probe(dev, ret, > > > > > + "failed to get intermediate clk: > > > > > %d\n", > > > > > ret); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + drv->proc_reg = devm_regulator_get_optional(dev, > > > > > "proc"); > > > > > + if (IS_ERR(drv->proc_reg)) { > > > > > + ret = PTR_ERR(drv->proc_reg); > > > > > + dev_err_probe(dev, ret, > > > > > + "failed to get proc regulator: > > > > > %d\n", > > > > > ret); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + ret = regulator_enable(drv->proc_reg); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to enable proc > > > > > regulator\n"); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + drv->sram_reg = regulator_get_optional(dev, "sram"); > > > > > + if (IS_ERR(drv->sram_reg)) > > > > > + drv->sram_reg = NULL; > > > > > + else { > > > > > + ret = regulator_enable(drv->sram_reg); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to enable sram > > > > > regulator\n"); > > > > > + goto out_free_resources; > > > > > + } > > > > > + } > > > > > + > > > > > + /* > > > > > + * We assume min voltage is 0 and tracking target > > > > > voltage using > > > > > + * min_volt_shift for each iteration. > > > > > + * The retry_max is 3 times of expeted iteration count. > > > > > + */ > > > > > + drv->vtrack_max = 3 * DIV_ROUND_UP(max(drv->soc_data- > > > > > > sram_max_volt, > > > > > > > > > > + drv->soc_data- > > > > > > proc_max_volt), > > > > > > > > > > + drv->soc_data- > > > > > > min_volt_shift); > > > > > > > > > > + > > > > > + ret = clk_prepare_enable(drv->cci_clk); > > > > > + if (ret) > > > > > + goto out_free_resources; > > > > > + > > > > > + ret = clk_prepare_enable(drv->inter_clk); > > > > > + if (ret) > > > > > + goto out_disable_cci_clk; > > > > > + > > > > > + ret = dev_pm_opp_of_add_table(dev); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to add opp table: %d\n", > > > > > ret); > > > > > + goto out_disable_inter_clk; > > > > > + } > > > > > + > > > > > + rate = clk_get_rate(drv->inter_clk); > > > > > + opp = dev_pm_opp_find_freq_ceil(dev, &rate); > > > > > + if (IS_ERR(opp)) { > > > > > + ret = PTR_ERR(opp); > > > > > + dev_err(dev, "failed to get intermediate opp: > > > > > %d\n", > > > > > ret); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + drv->inter_voltage = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + > > > > > + rate = U32_MAX; > > > > > + opp = dev_pm_opp_find_freq_floor(drv->dev, &rate); > > > > > + if (IS_ERR(opp)) { > > > > > + dev_err(dev, "failed to get opp\n"); > > > > > + ret = PTR_ERR(opp); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + opp_volt = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + ret = mtk_ccifreq_set_voltage(drv, opp_volt); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale to highest > > > > > voltage %lu in > > > > > proc_reg\n", > > > > > + opp_volt); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + passive_data = devm_kzalloc(dev, sizeof(struct > > > > > devfreq_passive_data), > > > > > + GFP_KERNEL); > > > > > + if (!passive_data) { > > > > > + ret = -ENOMEM; > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + passive_data->parent_type = CPUFREQ_PARENT_DEV; > > > > > + drv->devfreq = devm_devfreq_add_device(dev, > > > > > &mtk_ccifreq_profile, > > > > > + DEVFREQ_GOV_PASS > > > > > IVE, > > > > > + passive_data); > > > > > + if (IS_ERR(drv->devfreq)) { > > > > > + ret = -EPROBE_DEFER; > > > > > + dev_err(dev, "failed to add devfreq device: > > > > > %d\n", > > > > > + PTR_ERR(drv->devfreq)); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + drv->opp_nb.notifier_call = mtk_ccifreq_opp_notifier; > > > > > + ret = dev_pm_opp_register_notifier(dev, &drv->opp_nb); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to register opp notifier: > > > > > %d\n", > > > > > ret); > > > > > + goto out_remove_devfreq_device; > > > > > + } > > > > > + return 0; > > > > > + > > > > > +out_remove_devfreq_device: > > > > > + devm_devfreq_remove_device(dev, drv->devfreq); > > > > > + > > > > > +out_remove_opp_table: > > > > > + dev_pm_opp_of_remove_table(dev); > > > > > + > > > > > +out_disable_inter_clk: > > > > > + clk_disable_unprepare(drv->inter_clk); > > > > > + > > > > > +out_disable_cci_clk: > > > > > + clk_disable_unprepare(drv->cci_clk); > > > > > + > > > > > +out_free_resources: > > > > > + if (regulator_is_enabled(drv->proc_reg)) > > > > > + regulator_disable(drv->proc_reg); > > > > > + if (drv->sram_reg && regulator_is_enabled(drv- > > > > > >sram_reg)) > > > > > + regulator_disable(drv->sram_reg); > > > > > + > > > > > + if (!IS_ERR(drv->proc_reg)) > > > > > + regulator_put(drv->proc_reg); > > > > > + if (!IS_ERR(drv->sram_reg)) > > > > > + regulator_put(drv->sram_reg); > > > > > + if (!IS_ERR(drv->cci_clk)) > > > > > + clk_put(drv->cci_clk); > > > > > + if (!IS_ERR(drv->inter_clk)) > > > > > + clk_put(drv->inter_clk); > > > > > + > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_remove(struct platform_device *pdev) > > > > > +{ > > > > > + struct device *dev = &pdev->dev; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + > > > > > + drv = platform_get_drvdata(pdev); > > > > > + > > > > > + dev_pm_opp_unregister_notifier(dev, &drv->opp_nb); > > > > > + dev_pm_opp_of_remove_table(dev); > > > > > + clk_disable_unprepare(drv->inter_clk); > > > > > + clk_disable_unprepare(drv->cci_clk); > > > > > + regulator_disable(drv->proc_reg); > > > > > + if (drv->sram_reg) > > > > > + regulator_disable(drv->sram_reg); > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static const struct mtk_ccifreq_platform_data > > > > > mt8183_platform_data = > > > > > { > > > > > + .min_volt_shift = 100000, > > > > > + .max_volt_shift = 200000, > > > > > + .proc_max_volt = 1150000, > > > > > + .sram_min_volt = 0, > > > > > + .sram_max_volt = 1150000, > > > > > +}; > > > > > + > > > > > +static const struct mtk_ccifreq_platform_data > > > > > mt8186_platform_data = > > > > > { > > > > > + .min_volt_shift = 100000, > > > > > + .max_volt_shift = 250000, > > > > > + .proc_max_volt = 1118750, > > > > > + .sram_min_volt = 850000, > > > > > + .sram_max_volt = 1118750, > > > > > +}; > > > > > + > > > > > +static const struct of_device_id mtk_ccifreq_machines[] = { > > > > > + { .compatible = "mediatek,mt8183-cci", .data = > > > > > &mt8183_platform_data }, > > > > > + { .compatible = "mediatek,mt8186-cci", .data = > > > > > &mt8186_platform_data }, > > > > > + { }, > > > > > +}; > > > > > +MODULE_DEVICE_TABLE(of, mtk_ccifreq_machines); > > > > > + > > > > > +static struct platform_driver mtk_ccifreq_platdrv = { > > > > > + .probe = mtk_ccifreq_probe, > > > > > + .remove = mtk_ccifreq_remove, > > > > > + .driver = { > > > > > + .name = "mtk-ccifreq", > > > > > + .of_match_table = mtk_ccifreq_machines, > > > > > + }, > > > > > +}; > > > > > +module_platform_driver(mtk_ccifreq_platdrv); > > > > > + > > > > > +MODULE_DESCRIPTION("MediaTek CCI devfreq driver"); > > > > > +MODULE_AUTHOR("Jia-Wei Chang "); > > > > > +MODULE_LICENSE("GPL v2"); > > > > > > > > Hi Chanwoo, > > > > > > > > Just a kindly ping. > > > > Could you please give me some suggestion on this patch? > > > > Thanks! > > > > > > > > BRs, > > > > Johnson Wang > > > > > > > > > > Hi Johnson, > > > > > > Sorry for late reply.But I replied it yesterday as following: > > > Maybe, this reply[1] has not yet arrrived at your mail box. > > > [1] > > > > > > > https://lore.kernel.org/lkml/0846a062-2ea2-e6d4-03c8-992c2f2e24a0@gmail.com/T/#m3bc609d805d6e74ec7a105be0511926b4afbbaef > > > > > > As I described on reply[1], I updated the patches on devfreq- > > > testing > > > branch. Could you please test your patches based on devfreq- > > > testing > > > branch? > > > > > > > Hi Chanwoo, > > > > Thanks for your information. > > I've tested this patch based on the latest devfreq-testing branch. > > It encounters the same crash as Chen-Yu mentioned[1]. > > > > [1] > > https://lore.kernel.org/linux-pm/YniX1w+oI1eOCmCx@google.com/T/#u > > Hi Johnson, > > Thanks for the test. I'll drop the last patch caused of crash. > And I'll send v3 patchset right now. > > Hi Chanwoo, With your v3 patchset, this CCI devfreq driver works properly on the target. Thanks! BRs, Johnson Wang From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2DEE4C433EF for ; Wed, 11 May 2022 05:22:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tuPXMmCqYhKngzv83iiU1M/5qE4S8zFzPdK/4sKCrXc=; b=XrMNC2M5vCw2e5 NJabVLfdS7mmTojOWfebAhqhJhPLRiXq7/C61ygvgy6GKhHvBXAoRVvNvCl1C/2CX20HY5pM9F9F8 3sMr5vQ1CxDq0EFSL8JUVF+pCDrfFDQ1OcJc2gohr0c/U/L9BzRD7081y73TNE6qFL/OipRdCaJ/u gqdRq/b3CNVE+tG/3SIrYxHiaqszAmQaeD8W4CiumODNetCPTI2atA+jDCTJFQpdVPR8k/T6E+yQI hrQVP3bEPRvtkUyyy6zDxfMsnyjVil/mhoyYdnuiRY3S9obUNuqLrWVVsJ+uPyuyxu1ru2n6RlxfZ 9wDxpfJ9r1qrYAXPLD+g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noeoE-005FwS-Vt; Wed, 11 May 2022 05:22:51 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noeo2-005FtT-My; Wed, 11 May 2022 05:22:41 +0000 X-UUID: c5b853564ec54869bc0b8b6cb1a106d3-20220510 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4, REQID:96aa4c99-f8ab-4525-808d-2856e3e8aab8, OB:0, LO B:0,IP:0,URL:8,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:8 X-CID-META: VersionHash:faefae9, CLOUDID:838d60b3-56b5-4c9e-8d83-0070b288eb6a, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: c5b853564ec54869bc0b8b6cb1a106d3-20220510 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1250373713; Tue, 10 May 2022 22:22:31 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 May 2022 22:14:43 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Wed, 11 May 2022 13:14:41 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 May 2022 13:14:41 +0800 Message-ID: <0360e5dd5780a8ec6e729e3e2186108f1b465ad0.camel@mediatek.com> Subject: Re: [PATCH v3 2/2] PM / devfreq: mediatek: Introduce MediaTek CCI devfreq driver From: Johnson Wang To: Chanwoo Choi , , , , CC: , , , , , , , Date: Wed, 11 May 2022 13:14:41 +0800 In-Reply-To: <72396dec-d418-e732-11a8-a92e89692dd1@gmail.com> References: <20220425125546.4129-1-johnson.wang@mediatek.com> <20220425125546.4129-3-johnson.wang@mediatek.com> <06ed1edc7ae30104ca05e4e3958d7b11b7c7f706.camel@mediatek.com> <72396dec-d418-e732-11a8-a92e89692dd1@gmail.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220510_222238_797919_56D36E8B X-CRM114-Status: GOOD ( 41.55 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Mon, 2022-05-09 at 20:51 +0900, Chanwoo Choi wrote: > On 22. 5. 9. 14:57, Johnson Wang wrote: > > On Sat, 2022-05-07 at 22:53 +0900, Chanwoo Choi wrote: > > > On 22. 5. 6. 20:38, Johnson Wang wrote: > > > > On Mon, 2022-04-25 at 20:55 +0800, Johnson Wang wrote: > > > > > We introduce a devfreq driver for the MediaTek Cache Coherent > > > > > Interconnect > > > > > (CCI) used by some MediaTek SoCs. > > > > > > > > > > In this driver, we use the passive devfreq driver to get > > > > > target > > > > > frequencies > > > > > and adjust voltages accordingly. In MT8183 and MT8186, the > > > > > MediaTek > > > > > CCI > > > > > is supplied by the same regulators with the little core CPUs. > > > > > > > > > > Signed-off-by: Johnson Wang > > > > > Signed-off-by: Jia-Wei Chang > > > > > --- > > > > > This patch depends on "devfreq-testing"[1]. > > > > > [1] > > > > > > > > > https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git/log/?h=devfreq-testing__;!!CTRNKA9wMg0ARbw!wnTkI_sh3TsliBPFP70DFwtSZGtKyPinFu9h2BwULWX-xrWF0C21rLV-n1HhstfmLw42$ > > > > > > > > > > --- > > > > > drivers/devfreq/Kconfig | 10 + > > > > > drivers/devfreq/Makefile | 1 + > > > > > drivers/devfreq/mtk-cci-devfreq.c | 474 > > > > > ++++++++++++++++++++++++++++++ > > > > > 3 files changed, 485 insertions(+) > > > > > create mode 100644 drivers/devfreq/mtk-cci-devfreq.c > > > > > > > > > > diff --git a/drivers/devfreq/Kconfig > > > > > b/drivers/devfreq/Kconfig > > > > > index 87eb2b837e68..9754d8b31621 100644 > > > > > --- a/drivers/devfreq/Kconfig > > > > > +++ b/drivers/devfreq/Kconfig > > > > > @@ -120,6 +120,16 @@ config ARM_TEGRA_DEVFREQ > > > > > It reads ACTMON counters of memory controllers and > > > > > adjusts > > > > > the > > > > > operating frequencies and voltages with OPP support. > > > > > > > > > > +config ARM_MEDIATEK_CCI_DEVFREQ > > > > > + tristate "MEDIATEK CCI DEVFREQ Driver" > > > > > + depends on ARM_MEDIATEK_CPUFREQ || COMPILE_TEST > > > > > + select DEVFREQ_GOV_PASSIVE > > > > > + help > > > > > + This adds a devfreq driver for MediaTek Cache > > > > > Coherent > > > > > Interconnect > > > > > + which is shared the same regulators with the cpu > > > > > cluster. It > > > > > can track > > > > > + buck voltages and update a proper CCI frequency. Use > > > > > the > > > > > notification > > > > > + to get the regulator status. > > > > > + > > > > > config ARM_RK3399_DMC_DEVFREQ > > > > > tristate "ARM RK3399 DMC DEVFREQ Driver" > > > > > depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ > > > > > diff --git a/drivers/devfreq/Makefile > > > > > b/drivers/devfreq/Makefile > > > > > index 0b6be92a25d9..bf40d04928d0 100644 > > > > > --- a/drivers/devfreq/Makefile > > > > > +++ b/drivers/devfreq/Makefile > > > > > @@ -11,6 +11,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += > > > > > governor_passive.o > > > > > obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o > > > > > obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o > > > > > obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o > > > > > +obj-$(CONFIG_ARM_MEDIATEK_CCI_DEVFREQ) += mtk-cci- > > > > > devfreq.o > > > > > obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o > > > > > obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33- > > > > > mbus.o > > > > > obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30- > > > > > devfreq.o > > > > > diff --git a/drivers/devfreq/mtk-cci-devfreq.c > > > > > b/drivers/devfreq/mtk- > > > > > cci-devfreq.c > > > > > new file mode 100644 > > > > > index 000000000000..b3e31c45a57c > > > > > --- /dev/null > > > > > +++ b/drivers/devfreq/mtk-cci-devfreq.c > > > > > @@ -0,0 +1,474 @@ > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > +/* > > > > > + * Copyright (C) 2022 MediaTek Inc. > > > > > + */ > > > > > + > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > + > > > > > +struct mtk_ccifreq_platform_data { > > > > > + int min_volt_shift; > > > > > + int max_volt_shift; > > > > > + int proc_max_volt; > > > > > + int sram_min_volt; > > > > > + int sram_max_volt; > > > > > +}; > > > > > + > > > > > +struct mtk_ccifreq_drv { > > > > > + struct device *dev; > > > > > + struct devfreq *devfreq; > > > > > + struct regulator *proc_reg; > > > > > + struct regulator *sram_reg; > > > > > + struct clk *cci_clk; > > > > > + struct clk *inter_clk; > > > > > + int inter_voltage; > > > > > + int pre_voltage; > > > > > + unsigned long pre_freq; > > > > > + /* Avoid race condition for regulators between notify > > > > > and > > > > > policy */ > > > > > + struct mutex reg_lock; > > > > > + struct notifier_block opp_nb; > > > > > + const struct mtk_ccifreq_platform_data *soc_data; > > > > > + int vtrack_max; > > > > > +}; > > > > > + > > > > > +static int mtk_ccifreq_set_voltage(struct mtk_ccifreq_drv > > > > > *drv, > > > > > int > > > > > new_voltage) > > > > > +{ > > > > > + const struct mtk_ccifreq_platform_data *soc_data = drv- > > > > > > soc_data; > > > > > > > > > > + struct device *dev = drv->dev; > > > > > + int pre_voltage, pre_vsram, new_vsram, vsram, voltage, > > > > > ret; > > > > > + int retry_max = drv->vtrack_max; > > > > > + > > > > > + if (!drv->sram_reg) { > > > > > + ret = regulator_set_voltage(drv->proc_reg, > > > > > new_voltage, > > > > > + drv->soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + goto out_set_voltage; > > > > > + } > > > > > + > > > > > + pre_voltage = regulator_get_voltage(drv->proc_reg); > > > > > + if (pre_voltage < 0) { > > > > > + dev_err(dev, "invalid vproc value: %d\n", > > > > > pre_voltage); > > > > > + return pre_voltage; > > > > > + } > > > > > + > > > > > + pre_vsram = regulator_get_voltage(drv->sram_reg); > > > > > + if (pre_vsram < 0) { > > > > > + dev_err(dev, "invalid vsram value: %d\n", > > > > > pre_vsram); > > > > > + return pre_vsram; > > > > > + } > > > > > + > > > > > + new_vsram = clamp(new_voltage + soc_data- > > > > > >min_volt_shift, > > > > > + soc_data->sram_min_volt, soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + > > > > > + do { > > > > > + if (pre_voltage <= new_voltage) { > > > > > + vsram = clamp(pre_voltage + soc_data- > > > > > > max_volt_shift, > > > > > > > > > > + soc_data->sram_min_volt, > > > > > new_vsram); > > > > > + ret = regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > + if (vsram == soc_data->sram_max_volt || > > > > > + new_vsram == soc_data- > > > > > >sram_min_volt) > > > > > + voltage = new_voltage; > > > > > + else > > > > > + voltage = vsram - soc_data- > > > > > > min_volt_shift; > > > > > > > > > > + > > > > > + ret = regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + if (ret) { > > > > > + regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > pre_vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + return ret; > > > > > + } > > > > > + } else if (pre_voltage > new_voltage) { > > > > > + voltage = max(new_voltage, > > > > > + pre_vsram - soc_data- > > > > > > max_volt_shift); > > > > > > > > > > + ret = regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > + if (voltage == new_voltage) > > > > > + vsram = new_vsram; > > > > > + else > > > > > + vsram = max(new_vsram, > > > > > + voltage + soc_data- > > > > > > min_volt_shift); > > > > > > > > > > + > > > > > + ret = regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + if (ret) { > > > > > + regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > pre_voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + return ret; > > > > > + } > > > > > + } > > > > > + > > > > > + pre_voltage = voltage; > > > > > + pre_vsram = vsram; > > > > > + > > > > > + if (--retry_max < 0) { > > > > > + dev_err(dev, > > > > > + "over loop count, failed to set > > > > > voltage\n"); > > > > > + return -EINVAL; > > > > > + } > > > > > + } while (voltage != new_voltage || vsram != new_vsram); > > > > > + > > > > > +out_set_voltage: > > > > > + if (!ret) > > > > > + drv->pre_voltage = new_voltage; > > > > > + > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_target(struct device *dev, unsigned > > > > > long > > > > > *freq, > > > > > + u32 flags) > > > > > +{ > > > > > + struct mtk_ccifreq_drv *drv = dev_get_drvdata(dev); > > > > > + struct clk *cci_pll = clk_get_parent(drv->cci_clk); > > > > > + struct dev_pm_opp *opp; > > > > > + unsigned long opp_rate; > > > > > + int voltage, pre_voltage, inter_voltage, > > > > > target_voltage, ret; > > > > > + > > > > > + if (!drv) > > > > > + return -EINVAL; > > > > > + > > > > > + if (drv->pre_freq == *freq) > > > > > + return 0; > > > > > + > > > > > + inter_voltage = drv->inter_voltage; > > > > > + > > > > > + opp_rate = *freq; > > > > > + opp = devfreq_recommended_opp(dev, &opp_rate, 1); > > > > > + if (IS_ERR(opp)) { > > > > > + dev_err(dev, "failed to find opp for freq: > > > > > %ld\n", > > > > > opp_rate); > > > > > + return PTR_ERR(opp); > > > > > + } > > > > > + > > > > > + mutex_lock(&drv->reg_lock); > > > > > + > > > > > + voltage = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + > > > > > + if (unlikely(drv->pre_voltage <= 0)) > > > > > + pre_voltage = regulator_get_voltage(drv- > > > > > >proc_reg); > > > > > + else > > > > > + pre_voltage = drv->pre_voltage; > > > > > + > > > > > + if (pre_voltage < 0) { > > > > > + dev_err(dev, "invalid vproc value: %d\n", > > > > > pre_voltage); > > > > > + return pre_voltage; > > > > > + } > > > > > + > > > > > + /* scale up: set voltage first then freq. */ > > > > > + target_voltage = max(inter_voltage, voltage); > > > > > + if (pre_voltage <= target_voltage) { > > > > > + ret = mtk_ccifreq_set_voltage(drv, > > > > > target_voltage); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale up > > > > > voltage\n"); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + } > > > > > + > > > > > + /* switch the cci clock to intermediate clock source. > > > > > */ > > > > > + ret = clk_set_parent(drv->cci_clk, drv->inter_clk); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to re-parent cci > > > > > clock\n"); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + > > > > > + /* set the original clock to target rate. */ > > > > > + ret = clk_set_rate(cci_pll, *freq); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to set cci pll rate: > > > > > %d\n", ret); > > > > > + clk_set_parent(drv->cci_clk, cci_pll); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + > > > > > + /* switch the cci clock back to the original clock > > > > > source. */ > > > > > + ret = clk_set_parent(drv->cci_clk, cci_pll); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to re-parent cci > > > > > clock\n"); > > > > > + mtk_ccifreq_set_voltage(drv, inter_voltage); > > > > > + goto out_unlock; > > > > > + } > > > > > + > > > > > + /* > > > > > + * If the new voltage is lower than the intermediate > > > > > voltage or > > > > > the > > > > > + * original voltage, scale down to the new voltage. > > > > > + */ > > > > > + if (voltage < inter_voltage || voltage < pre_voltage) { > > > > > + ret = mtk_ccifreq_set_voltage(drv, voltage); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale down > > > > > voltage\n"); > > > > > + goto out_unlock; > > > > > + } > > > > > + } > > > > > + > > > > > + drv->pre_freq = *freq; > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + > > > > > + return 0; > > > > > + > > > > > +out_restore_voltage: > > > > > + mtk_ccifreq_set_voltage(drv, pre_voltage); > > > > > + > > > > > +out_unlock: > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_opp_notifier(struct notifier_block > > > > > *nb, > > > > > + unsigned long event, void > > > > > *data) > > > > > +{ > > > > > + struct dev_pm_opp *opp = data; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + unsigned long freq, volt; > > > > > + > > > > > + drv = container_of(nb, struct mtk_ccifreq_drv, opp_nb); > > > > > + > > > > > + if (event == OPP_EVENT_ADJUST_VOLTAGE) { > > > > > + freq = dev_pm_opp_get_freq(opp); > > > > > + > > > > > + mutex_lock(&drv->reg_lock); > > > > > + /* current opp item is changed */ > > > > > + if (freq == drv->pre_freq) { > > > > > + volt = dev_pm_opp_get_voltage(opp); > > > > > + mtk_ccifreq_set_voltage(drv, volt); > > > > > + } > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + } > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static struct devfreq_dev_profile mtk_ccifreq_profile = { > > > > > + .target = mtk_ccifreq_target, > > > > > +}; > > > > > + > > > > > +static int mtk_ccifreq_probe(struct platform_device *pdev) > > > > > +{ > > > > > + struct device *dev = &pdev->dev; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + struct devfreq_passive_data *passive_data; > > > > > + struct dev_pm_opp *opp; > > > > > + unsigned long rate, opp_volt; > > > > > + int ret; > > > > > + > > > > > + drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL); > > > > > + if (!drv) > > > > > + return -ENOMEM; > > > > > + > > > > > + drv->dev = dev; > > > > > + drv->soc_data = (const struct mtk_ccifreq_platform_data > > > > > *) > > > > > + of_device_get_match_data(&pdev- > > > > > >dev); > > > > > + mutex_init(&drv->reg_lock); > > > > > + platform_set_drvdata(pdev, drv); > > > > > + > > > > > + drv->cci_clk = devm_clk_get(dev, "cci"); > > > > > + if (IS_ERR(drv->cci_clk)) { > > > > > + ret = PTR_ERR(drv->cci_clk); > > > > > + return dev_err_probe(dev, ret, > > > > > + "failed to get cci clk: > > > > > %d\n", > > > > > ret); > > > > > + } > > > > > + > > > > > + drv->inter_clk = devm_clk_get(dev, "intermediate"); > > > > > + if (IS_ERR(drv->inter_clk)) { > > > > > + ret = PTR_ERR(drv->inter_clk); > > > > > + dev_err_probe(dev, ret, > > > > > + "failed to get intermediate clk: > > > > > %d\n", > > > > > ret); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + drv->proc_reg = devm_regulator_get_optional(dev, > > > > > "proc"); > > > > > + if (IS_ERR(drv->proc_reg)) { > > > > > + ret = PTR_ERR(drv->proc_reg); > > > > > + dev_err_probe(dev, ret, > > > > > + "failed to get proc regulator: > > > > > %d\n", > > > > > ret); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + ret = regulator_enable(drv->proc_reg); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to enable proc > > > > > regulator\n"); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + drv->sram_reg = regulator_get_optional(dev, "sram"); > > > > > + if (IS_ERR(drv->sram_reg)) > > > > > + drv->sram_reg = NULL; > > > > > + else { > > > > > + ret = regulator_enable(drv->sram_reg); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to enable sram > > > > > regulator\n"); > > > > > + goto out_free_resources; > > > > > + } > > > > > + } > > > > > + > > > > > + /* > > > > > + * We assume min voltage is 0 and tracking target > > > > > voltage using > > > > > + * min_volt_shift for each iteration. > > > > > + * The retry_max is 3 times of expeted iteration count. > > > > > + */ > > > > > + drv->vtrack_max = 3 * DIV_ROUND_UP(max(drv->soc_data- > > > > > > sram_max_volt, > > > > > > > > > > + drv->soc_data- > > > > > > proc_max_volt), > > > > > > > > > > + drv->soc_data- > > > > > > min_volt_shift); > > > > > > > > > > + > > > > > + ret = clk_prepare_enable(drv->cci_clk); > > > > > + if (ret) > > > > > + goto out_free_resources; > > > > > + > > > > > + ret = clk_prepare_enable(drv->inter_clk); > > > > > + if (ret) > > > > > + goto out_disable_cci_clk; > > > > > + > > > > > + ret = dev_pm_opp_of_add_table(dev); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to add opp table: %d\n", > > > > > ret); > > > > > + goto out_disable_inter_clk; > > > > > + } > > > > > + > > > > > + rate = clk_get_rate(drv->inter_clk); > > > > > + opp = dev_pm_opp_find_freq_ceil(dev, &rate); > > > > > + if (IS_ERR(opp)) { > > > > > + ret = PTR_ERR(opp); > > > > > + dev_err(dev, "failed to get intermediate opp: > > > > > %d\n", > > > > > ret); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + drv->inter_voltage = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + > > > > > + rate = U32_MAX; > > > > > + opp = dev_pm_opp_find_freq_floor(drv->dev, &rate); > > > > > + if (IS_ERR(opp)) { > > > > > + dev_err(dev, "failed to get opp\n"); > > > > > + ret = PTR_ERR(opp); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + opp_volt = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + ret = mtk_ccifreq_set_voltage(drv, opp_volt); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale to highest > > > > > voltage %lu in > > > > > proc_reg\n", > > > > > + opp_volt); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + passive_data = devm_kzalloc(dev, sizeof(struct > > > > > devfreq_passive_data), > > > > > + GFP_KERNEL); > > > > > + if (!passive_data) { > > > > > + ret = -ENOMEM; > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + passive_data->parent_type = CPUFREQ_PARENT_DEV; > > > > > + drv->devfreq = devm_devfreq_add_device(dev, > > > > > &mtk_ccifreq_profile, > > > > > + DEVFREQ_GOV_PASS > > > > > IVE, > > > > > + passive_data); > > > > > + if (IS_ERR(drv->devfreq)) { > > > > > + ret = -EPROBE_DEFER; > > > > > + dev_err(dev, "failed to add devfreq device: > > > > > %d\n", > > > > > + PTR_ERR(drv->devfreq)); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + drv->opp_nb.notifier_call = mtk_ccifreq_opp_notifier; > > > > > + ret = dev_pm_opp_register_notifier(dev, &drv->opp_nb); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to register opp notifier: > > > > > %d\n", > > > > > ret); > > > > > + goto out_remove_devfreq_device; > > > > > + } > > > > > + return 0; > > > > > + > > > > > +out_remove_devfreq_device: > > > > > + devm_devfreq_remove_device(dev, drv->devfreq); > > > > > + > > > > > +out_remove_opp_table: > > > > > + dev_pm_opp_of_remove_table(dev); > > > > > + > > > > > +out_disable_inter_clk: > > > > > + clk_disable_unprepare(drv->inter_clk); > > > > > + > > > > > +out_disable_cci_clk: > > > > > + clk_disable_unprepare(drv->cci_clk); > > > > > + > > > > > +out_free_resources: > > > > > + if (regulator_is_enabled(drv->proc_reg)) > > > > > + regulator_disable(drv->proc_reg); > > > > > + if (drv->sram_reg && regulator_is_enabled(drv- > > > > > >sram_reg)) > > > > > + regulator_disable(drv->sram_reg); > > > > > + > > > > > + if (!IS_ERR(drv->proc_reg)) > > > > > + regulator_put(drv->proc_reg); > > > > > + if (!IS_ERR(drv->sram_reg)) > > > > > + regulator_put(drv->sram_reg); > > > > > + if (!IS_ERR(drv->cci_clk)) > > > > > + clk_put(drv->cci_clk); > > > > > + if (!IS_ERR(drv->inter_clk)) > > > > > + clk_put(drv->inter_clk); > > > > > + > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_remove(struct platform_device *pdev) > > > > > +{ > > > > > + struct device *dev = &pdev->dev; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + > > > > > + drv = platform_get_drvdata(pdev); > > > > > + > > > > > + dev_pm_opp_unregister_notifier(dev, &drv->opp_nb); > > > > > + dev_pm_opp_of_remove_table(dev); > > > > > + clk_disable_unprepare(drv->inter_clk); > > > > > + clk_disable_unprepare(drv->cci_clk); > > > > > + regulator_disable(drv->proc_reg); > > > > > + if (drv->sram_reg) > > > > > + regulator_disable(drv->sram_reg); > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static const struct mtk_ccifreq_platform_data > > > > > mt8183_platform_data = > > > > > { > > > > > + .min_volt_shift = 100000, > > > > > + .max_volt_shift = 200000, > > > > > + .proc_max_volt = 1150000, > > > > > + .sram_min_volt = 0, > > > > > + .sram_max_volt = 1150000, > > > > > +}; > > > > > + > > > > > +static const struct mtk_ccifreq_platform_data > > > > > mt8186_platform_data = > > > > > { > > > > > + .min_volt_shift = 100000, > > > > > + .max_volt_shift = 250000, > > > > > + .proc_max_volt = 1118750, > > > > > + .sram_min_volt = 850000, > > > > > + .sram_max_volt = 1118750, > > > > > +}; > > > > > + > > > > > +static const struct of_device_id mtk_ccifreq_machines[] = { > > > > > + { .compatible = "mediatek,mt8183-cci", .data = > > > > > &mt8183_platform_data }, > > > > > + { .compatible = "mediatek,mt8186-cci", .data = > > > > > &mt8186_platform_data }, > > > > > + { }, > > > > > +}; > > > > > +MODULE_DEVICE_TABLE(of, mtk_ccifreq_machines); > > > > > + > > > > > +static struct platform_driver mtk_ccifreq_platdrv = { > > > > > + .probe = mtk_ccifreq_probe, > > > > > + .remove = mtk_ccifreq_remove, > > > > > + .driver = { > > > > > + .name = "mtk-ccifreq", > > > > > + .of_match_table = mtk_ccifreq_machines, > > > > > + }, > > > > > +}; > > > > > +module_platform_driver(mtk_ccifreq_platdrv); > > > > > + > > > > > +MODULE_DESCRIPTION("MediaTek CCI devfreq driver"); > > > > > +MODULE_AUTHOR("Jia-Wei Chang "); > > > > > +MODULE_LICENSE("GPL v2"); > > > > > > > > Hi Chanwoo, > > > > > > > > Just a kindly ping. > > > > Could you please give me some suggestion on this patch? > > > > Thanks! > > > > > > > > BRs, > > > > Johnson Wang > > > > > > > > > > Hi Johnson, > > > > > > Sorry for late reply.But I replied it yesterday as following: > > > Maybe, this reply[1] has not yet arrrived at your mail box. > > > [1] > > > > > > > https://lore.kernel.org/lkml/0846a062-2ea2-e6d4-03c8-992c2f2e24a0@gmail.com/T/#m3bc609d805d6e74ec7a105be0511926b4afbbaef > > > > > > As I described on reply[1], I updated the patches on devfreq- > > > testing > > > branch. Could you please test your patches based on devfreq- > > > testing > > > branch? > > > > > > > Hi Chanwoo, > > > > Thanks for your information. > > I've tested this patch based on the latest devfreq-testing branch. > > It encounters the same crash as Chen-Yu mentioned[1]. > > > > [1] > > https://lore.kernel.org/linux-pm/YniX1w+oI1eOCmCx@google.com/T/#u > > Hi Johnson, > > Thanks for the test. I'll drop the last patch caused of crash. > And I'll send v3 patchset right now. > > Hi Chanwoo, With your v3 patchset, this CCI devfreq driver works properly on the target. Thanks! BRs, Johnson Wang _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE4E1C433F5 for ; Wed, 11 May 2022 05:23:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rjoWGggbEQz8lHOrsg+ZKdFzvHWKgWM0Z1Ss/rgHi7c=; b=OfTafiAtUIy/jd 4/sXEt66fQrTOzU4ebXhTNVJtDHsHYwkqcW5bs1Wrxf0/eP+3zCuauY2a2GORGNfZYpAcupgvKtoe X+5aScos3EZKUMGQcQsQ4nXZf3Qmbk5qvO/whVAuTEk70Y8LQow3jF3JPP+fiydQ/edopHoL8qr5u 4APj7NsNy7evyUWe/8CI5KFiP7ReuIBizNUYxnsCgpEvls8wOCuWjwZMl1/H7mS6AN6JQwHnwEmmO ZvLzR/udf3OUQq9niawhwVpxseKfZ9XfUlTfVNBiNEhls/GUsYTYNQSXvTFQHXYwiEPhW26rQkLsR NEu8a5AbDmOM39rBHwTQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noeo7-005Fu8-8F; Wed, 11 May 2022 05:22:43 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noeo2-005FtT-My; Wed, 11 May 2022 05:22:41 +0000 X-UUID: c5b853564ec54869bc0b8b6cb1a106d3-20220510 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4, REQID:96aa4c99-f8ab-4525-808d-2856e3e8aab8, OB:0, LO B:0,IP:0,URL:8,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:8 X-CID-META: VersionHash:faefae9, CLOUDID:838d60b3-56b5-4c9e-8d83-0070b288eb6a, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: c5b853564ec54869bc0b8b6cb1a106d3-20220510 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1250373713; Tue, 10 May 2022 22:22:31 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 May 2022 22:14:43 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Wed, 11 May 2022 13:14:41 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 11 May 2022 13:14:41 +0800 Message-ID: <0360e5dd5780a8ec6e729e3e2186108f1b465ad0.camel@mediatek.com> Subject: Re: [PATCH v3 2/2] PM / devfreq: mediatek: Introduce MediaTek CCI devfreq driver From: Johnson Wang To: Chanwoo Choi , , , , CC: , , , , , , , Date: Wed, 11 May 2022 13:14:41 +0800 In-Reply-To: <72396dec-d418-e732-11a8-a92e89692dd1@gmail.com> References: <20220425125546.4129-1-johnson.wang@mediatek.com> <20220425125546.4129-3-johnson.wang@mediatek.com> <06ed1edc7ae30104ca05e4e3958d7b11b7c7f706.camel@mediatek.com> <72396dec-d418-e732-11a8-a92e89692dd1@gmail.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220510_222238_797919_56D36E8B X-CRM114-Status: GOOD ( 41.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2022-05-09 at 20:51 +0900, Chanwoo Choi wrote: > On 22. 5. 9. 14:57, Johnson Wang wrote: > > On Sat, 2022-05-07 at 22:53 +0900, Chanwoo Choi wrote: > > > On 22. 5. 6. 20:38, Johnson Wang wrote: > > > > On Mon, 2022-04-25 at 20:55 +0800, Johnson Wang wrote: > > > > > We introduce a devfreq driver for the MediaTek Cache Coherent > > > > > Interconnect > > > > > (CCI) used by some MediaTek SoCs. > > > > > > > > > > In this driver, we use the passive devfreq driver to get > > > > > target > > > > > frequencies > > > > > and adjust voltages accordingly. In MT8183 and MT8186, the > > > > > MediaTek > > > > > CCI > > > > > is supplied by the same regulators with the little core CPUs. > > > > > > > > > > Signed-off-by: Johnson Wang > > > > > Signed-off-by: Jia-Wei Chang > > > > > --- > > > > > This patch depends on "devfreq-testing"[1]. > > > > > [1] > > > > > > > > > https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git/log/?h=devfreq-testing__;!!CTRNKA9wMg0ARbw!wnTkI_sh3TsliBPFP70DFwtSZGtKyPinFu9h2BwULWX-xrWF0C21rLV-n1HhstfmLw42$ > > > > > > > > > > --- > > > > > drivers/devfreq/Kconfig | 10 + > > > > > drivers/devfreq/Makefile | 1 + > > > > > drivers/devfreq/mtk-cci-devfreq.c | 474 > > > > > ++++++++++++++++++++++++++++++ > > > > > 3 files changed, 485 insertions(+) > > > > > create mode 100644 drivers/devfreq/mtk-cci-devfreq.c > > > > > > > > > > diff --git a/drivers/devfreq/Kconfig > > > > > b/drivers/devfreq/Kconfig > > > > > index 87eb2b837e68..9754d8b31621 100644 > > > > > --- a/drivers/devfreq/Kconfig > > > > > +++ b/drivers/devfreq/Kconfig > > > > > @@ -120,6 +120,16 @@ config ARM_TEGRA_DEVFREQ > > > > > It reads ACTMON counters of memory controllers and > > > > > adjusts > > > > > the > > > > > operating frequencies and voltages with OPP support. > > > > > > > > > > +config ARM_MEDIATEK_CCI_DEVFREQ > > > > > + tristate "MEDIATEK CCI DEVFREQ Driver" > > > > > + depends on ARM_MEDIATEK_CPUFREQ || COMPILE_TEST > > > > > + select DEVFREQ_GOV_PASSIVE > > > > > + help > > > > > + This adds a devfreq driver for MediaTek Cache > > > > > Coherent > > > > > Interconnect > > > > > + which is shared the same regulators with the cpu > > > > > cluster. It > > > > > can track > > > > > + buck voltages and update a proper CCI frequency. Use > > > > > the > > > > > notification > > > > > + to get the regulator status. > > > > > + > > > > > config ARM_RK3399_DMC_DEVFREQ > > > > > tristate "ARM RK3399 DMC DEVFREQ Driver" > > > > > depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ > > > > > diff --git a/drivers/devfreq/Makefile > > > > > b/drivers/devfreq/Makefile > > > > > index 0b6be92a25d9..bf40d04928d0 100644 > > > > > --- a/drivers/devfreq/Makefile > > > > > +++ b/drivers/devfreq/Makefile > > > > > @@ -11,6 +11,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += > > > > > governor_passive.o > > > > > obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o > > > > > obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o > > > > > obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o > > > > > +obj-$(CONFIG_ARM_MEDIATEK_CCI_DEVFREQ) += mtk-cci- > > > > > devfreq.o > > > > > obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o > > > > > obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33- > > > > > mbus.o > > > > > obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30- > > > > > devfreq.o > > > > > diff --git a/drivers/devfreq/mtk-cci-devfreq.c > > > > > b/drivers/devfreq/mtk- > > > > > cci-devfreq.c > > > > > new file mode 100644 > > > > > index 000000000000..b3e31c45a57c > > > > > --- /dev/null > > > > > +++ b/drivers/devfreq/mtk-cci-devfreq.c > > > > > @@ -0,0 +1,474 @@ > > > > > +// SPDX-License-Identifier: GPL-2.0-only > > > > > +/* > > > > > + * Copyright (C) 2022 MediaTek Inc. > > > > > + */ > > > > > + > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > +#include > > > > > + > > > > > +struct mtk_ccifreq_platform_data { > > > > > + int min_volt_shift; > > > > > + int max_volt_shift; > > > > > + int proc_max_volt; > > > > > + int sram_min_volt; > > > > > + int sram_max_volt; > > > > > +}; > > > > > + > > > > > +struct mtk_ccifreq_drv { > > > > > + struct device *dev; > > > > > + struct devfreq *devfreq; > > > > > + struct regulator *proc_reg; > > > > > + struct regulator *sram_reg; > > > > > + struct clk *cci_clk; > > > > > + struct clk *inter_clk; > > > > > + int inter_voltage; > > > > > + int pre_voltage; > > > > > + unsigned long pre_freq; > > > > > + /* Avoid race condition for regulators between notify > > > > > and > > > > > policy */ > > > > > + struct mutex reg_lock; > > > > > + struct notifier_block opp_nb; > > > > > + const struct mtk_ccifreq_platform_data *soc_data; > > > > > + int vtrack_max; > > > > > +}; > > > > > + > > > > > +static int mtk_ccifreq_set_voltage(struct mtk_ccifreq_drv > > > > > *drv, > > > > > int > > > > > new_voltage) > > > > > +{ > > > > > + const struct mtk_ccifreq_platform_data *soc_data = drv- > > > > > > soc_data; > > > > > > > > > > + struct device *dev = drv->dev; > > > > > + int pre_voltage, pre_vsram, new_vsram, vsram, voltage, > > > > > ret; > > > > > + int retry_max = drv->vtrack_max; > > > > > + > > > > > + if (!drv->sram_reg) { > > > > > + ret = regulator_set_voltage(drv->proc_reg, > > > > > new_voltage, > > > > > + drv->soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + goto out_set_voltage; > > > > > + } > > > > > + > > > > > + pre_voltage = regulator_get_voltage(drv->proc_reg); > > > > > + if (pre_voltage < 0) { > > > > > + dev_err(dev, "invalid vproc value: %d\n", > > > > > pre_voltage); > > > > > + return pre_voltage; > > > > > + } > > > > > + > > > > > + pre_vsram = regulator_get_voltage(drv->sram_reg); > > > > > + if (pre_vsram < 0) { > > > > > + dev_err(dev, "invalid vsram value: %d\n", > > > > > pre_vsram); > > > > > + return pre_vsram; > > > > > + } > > > > > + > > > > > + new_vsram = clamp(new_voltage + soc_data- > > > > > >min_volt_shift, > > > > > + soc_data->sram_min_volt, soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + > > > > > + do { > > > > > + if (pre_voltage <= new_voltage) { > > > > > + vsram = clamp(pre_voltage + soc_data- > > > > > > max_volt_shift, > > > > > > > > > > + soc_data->sram_min_volt, > > > > > new_vsram); > > > > > + ret = regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > + if (vsram == soc_data->sram_max_volt || > > > > > + new_vsram == soc_data- > > > > > >sram_min_volt) > > > > > + voltage = new_voltage; > > > > > + else > > > > > + voltage = vsram - soc_data- > > > > > > min_volt_shift; > > > > > > > > > > + > > > > > + ret = regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + if (ret) { > > > > > + regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > pre_vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + return ret; > > > > > + } > > > > > + } else if (pre_voltage > new_voltage) { > > > > > + voltage = max(new_voltage, > > > > > + pre_vsram - soc_data- > > > > > > max_volt_shift); > > > > > > > > > > + ret = regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > + if (voltage == new_voltage) > > > > > + vsram = new_vsram; > > > > > + else > > > > > + vsram = max(new_vsram, > > > > > + voltage + soc_data- > > > > > > min_volt_shift); > > > > > > > > > > + > > > > > + ret = regulator_set_voltage(drv- > > > > > >sram_reg, > > > > > vsram, > > > > > + soc_data- > > > > > > sram_max_volt); > > > > > > > > > > + if (ret) { > > > > > + regulator_set_voltage(drv- > > > > > >proc_reg, > > > > > pre_voltage, > > > > > + soc_data- > > > > > > proc_max_volt); > > > > > > > > > > + return ret; > > > > > + } > > > > > + } > > > > > + > > > > > + pre_voltage = voltage; > > > > > + pre_vsram = vsram; > > > > > + > > > > > + if (--retry_max < 0) { > > > > > + dev_err(dev, > > > > > + "over loop count, failed to set > > > > > voltage\n"); > > > > > + return -EINVAL; > > > > > + } > > > > > + } while (voltage != new_voltage || vsram != new_vsram); > > > > > + > > > > > +out_set_voltage: > > > > > + if (!ret) > > > > > + drv->pre_voltage = new_voltage; > > > > > + > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_target(struct device *dev, unsigned > > > > > long > > > > > *freq, > > > > > + u32 flags) > > > > > +{ > > > > > + struct mtk_ccifreq_drv *drv = dev_get_drvdata(dev); > > > > > + struct clk *cci_pll = clk_get_parent(drv->cci_clk); > > > > > + struct dev_pm_opp *opp; > > > > > + unsigned long opp_rate; > > > > > + int voltage, pre_voltage, inter_voltage, > > > > > target_voltage, ret; > > > > > + > > > > > + if (!drv) > > > > > + return -EINVAL; > > > > > + > > > > > + if (drv->pre_freq == *freq) > > > > > + return 0; > > > > > + > > > > > + inter_voltage = drv->inter_voltage; > > > > > + > > > > > + opp_rate = *freq; > > > > > + opp = devfreq_recommended_opp(dev, &opp_rate, 1); > > > > > + if (IS_ERR(opp)) { > > > > > + dev_err(dev, "failed to find opp for freq: > > > > > %ld\n", > > > > > opp_rate); > > > > > + return PTR_ERR(opp); > > > > > + } > > > > > + > > > > > + mutex_lock(&drv->reg_lock); > > > > > + > > > > > + voltage = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + > > > > > + if (unlikely(drv->pre_voltage <= 0)) > > > > > + pre_voltage = regulator_get_voltage(drv- > > > > > >proc_reg); > > > > > + else > > > > > + pre_voltage = drv->pre_voltage; > > > > > + > > > > > + if (pre_voltage < 0) { > > > > > + dev_err(dev, "invalid vproc value: %d\n", > > > > > pre_voltage); > > > > > + return pre_voltage; > > > > > + } > > > > > + > > > > > + /* scale up: set voltage first then freq. */ > > > > > + target_voltage = max(inter_voltage, voltage); > > > > > + if (pre_voltage <= target_voltage) { > > > > > + ret = mtk_ccifreq_set_voltage(drv, > > > > > target_voltage); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale up > > > > > voltage\n"); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + } > > > > > + > > > > > + /* switch the cci clock to intermediate clock source. > > > > > */ > > > > > + ret = clk_set_parent(drv->cci_clk, drv->inter_clk); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to re-parent cci > > > > > clock\n"); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + > > > > > + /* set the original clock to target rate. */ > > > > > + ret = clk_set_rate(cci_pll, *freq); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to set cci pll rate: > > > > > %d\n", ret); > > > > > + clk_set_parent(drv->cci_clk, cci_pll); > > > > > + goto out_restore_voltage; > > > > > + } > > > > > + > > > > > + /* switch the cci clock back to the original clock > > > > > source. */ > > > > > + ret = clk_set_parent(drv->cci_clk, cci_pll); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to re-parent cci > > > > > clock\n"); > > > > > + mtk_ccifreq_set_voltage(drv, inter_voltage); > > > > > + goto out_unlock; > > > > > + } > > > > > + > > > > > + /* > > > > > + * If the new voltage is lower than the intermediate > > > > > voltage or > > > > > the > > > > > + * original voltage, scale down to the new voltage. > > > > > + */ > > > > > + if (voltage < inter_voltage || voltage < pre_voltage) { > > > > > + ret = mtk_ccifreq_set_voltage(drv, voltage); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale down > > > > > voltage\n"); > > > > > + goto out_unlock; > > > > > + } > > > > > + } > > > > > + > > > > > + drv->pre_freq = *freq; > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + > > > > > + return 0; > > > > > + > > > > > +out_restore_voltage: > > > > > + mtk_ccifreq_set_voltage(drv, pre_voltage); > > > > > + > > > > > +out_unlock: > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_opp_notifier(struct notifier_block > > > > > *nb, > > > > > + unsigned long event, void > > > > > *data) > > > > > +{ > > > > > + struct dev_pm_opp *opp = data; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + unsigned long freq, volt; > > > > > + > > > > > + drv = container_of(nb, struct mtk_ccifreq_drv, opp_nb); > > > > > + > > > > > + if (event == OPP_EVENT_ADJUST_VOLTAGE) { > > > > > + freq = dev_pm_opp_get_freq(opp); > > > > > + > > > > > + mutex_lock(&drv->reg_lock); > > > > > + /* current opp item is changed */ > > > > > + if (freq == drv->pre_freq) { > > > > > + volt = dev_pm_opp_get_voltage(opp); > > > > > + mtk_ccifreq_set_voltage(drv, volt); > > > > > + } > > > > > + mutex_unlock(&drv->reg_lock); > > > > > + } > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static struct devfreq_dev_profile mtk_ccifreq_profile = { > > > > > + .target = mtk_ccifreq_target, > > > > > +}; > > > > > + > > > > > +static int mtk_ccifreq_probe(struct platform_device *pdev) > > > > > +{ > > > > > + struct device *dev = &pdev->dev; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + struct devfreq_passive_data *passive_data; > > > > > + struct dev_pm_opp *opp; > > > > > + unsigned long rate, opp_volt; > > > > > + int ret; > > > > > + > > > > > + drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL); > > > > > + if (!drv) > > > > > + return -ENOMEM; > > > > > + > > > > > + drv->dev = dev; > > > > > + drv->soc_data = (const struct mtk_ccifreq_platform_data > > > > > *) > > > > > + of_device_get_match_data(&pdev- > > > > > >dev); > > > > > + mutex_init(&drv->reg_lock); > > > > > + platform_set_drvdata(pdev, drv); > > > > > + > > > > > + drv->cci_clk = devm_clk_get(dev, "cci"); > > > > > + if (IS_ERR(drv->cci_clk)) { > > > > > + ret = PTR_ERR(drv->cci_clk); > > > > > + return dev_err_probe(dev, ret, > > > > > + "failed to get cci clk: > > > > > %d\n", > > > > > ret); > > > > > + } > > > > > + > > > > > + drv->inter_clk = devm_clk_get(dev, "intermediate"); > > > > > + if (IS_ERR(drv->inter_clk)) { > > > > > + ret = PTR_ERR(drv->inter_clk); > > > > > + dev_err_probe(dev, ret, > > > > > + "failed to get intermediate clk: > > > > > %d\n", > > > > > ret); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + drv->proc_reg = devm_regulator_get_optional(dev, > > > > > "proc"); > > > > > + if (IS_ERR(drv->proc_reg)) { > > > > > + ret = PTR_ERR(drv->proc_reg); > > > > > + dev_err_probe(dev, ret, > > > > > + "failed to get proc regulator: > > > > > %d\n", > > > > > ret); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + ret = regulator_enable(drv->proc_reg); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to enable proc > > > > > regulator\n"); > > > > > + goto out_free_resources; > > > > > + } > > > > > + > > > > > + drv->sram_reg = regulator_get_optional(dev, "sram"); > > > > > + if (IS_ERR(drv->sram_reg)) > > > > > + drv->sram_reg = NULL; > > > > > + else { > > > > > + ret = regulator_enable(drv->sram_reg); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to enable sram > > > > > regulator\n"); > > > > > + goto out_free_resources; > > > > > + } > > > > > + } > > > > > + > > > > > + /* > > > > > + * We assume min voltage is 0 and tracking target > > > > > voltage using > > > > > + * min_volt_shift for each iteration. > > > > > + * The retry_max is 3 times of expeted iteration count. > > > > > + */ > > > > > + drv->vtrack_max = 3 * DIV_ROUND_UP(max(drv->soc_data- > > > > > > sram_max_volt, > > > > > > > > > > + drv->soc_data- > > > > > > proc_max_volt), > > > > > > > > > > + drv->soc_data- > > > > > > min_volt_shift); > > > > > > > > > > + > > > > > + ret = clk_prepare_enable(drv->cci_clk); > > > > > + if (ret) > > > > > + goto out_free_resources; > > > > > + > > > > > + ret = clk_prepare_enable(drv->inter_clk); > > > > > + if (ret) > > > > > + goto out_disable_cci_clk; > > > > > + > > > > > + ret = dev_pm_opp_of_add_table(dev); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to add opp table: %d\n", > > > > > ret); > > > > > + goto out_disable_inter_clk; > > > > > + } > > > > > + > > > > > + rate = clk_get_rate(drv->inter_clk); > > > > > + opp = dev_pm_opp_find_freq_ceil(dev, &rate); > > > > > + if (IS_ERR(opp)) { > > > > > + ret = PTR_ERR(opp); > > > > > + dev_err(dev, "failed to get intermediate opp: > > > > > %d\n", > > > > > ret); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + drv->inter_voltage = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + > > > > > + rate = U32_MAX; > > > > > + opp = dev_pm_opp_find_freq_floor(drv->dev, &rate); > > > > > + if (IS_ERR(opp)) { > > > > > + dev_err(dev, "failed to get opp\n"); > > > > > + ret = PTR_ERR(opp); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + opp_volt = dev_pm_opp_get_voltage(opp); > > > > > + dev_pm_opp_put(opp); > > > > > + ret = mtk_ccifreq_set_voltage(drv, opp_volt); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to scale to highest > > > > > voltage %lu in > > > > > proc_reg\n", > > > > > + opp_volt); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + passive_data = devm_kzalloc(dev, sizeof(struct > > > > > devfreq_passive_data), > > > > > + GFP_KERNEL); > > > > > + if (!passive_data) { > > > > > + ret = -ENOMEM; > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + passive_data->parent_type = CPUFREQ_PARENT_DEV; > > > > > + drv->devfreq = devm_devfreq_add_device(dev, > > > > > &mtk_ccifreq_profile, > > > > > + DEVFREQ_GOV_PASS > > > > > IVE, > > > > > + passive_data); > > > > > + if (IS_ERR(drv->devfreq)) { > > > > > + ret = -EPROBE_DEFER; > > > > > + dev_err(dev, "failed to add devfreq device: > > > > > %d\n", > > > > > + PTR_ERR(drv->devfreq)); > > > > > + goto out_remove_opp_table; > > > > > + } > > > > > + > > > > > + drv->opp_nb.notifier_call = mtk_ccifreq_opp_notifier; > > > > > + ret = dev_pm_opp_register_notifier(dev, &drv->opp_nb); > > > > > + if (ret) { > > > > > + dev_err(dev, "failed to register opp notifier: > > > > > %d\n", > > > > > ret); > > > > > + goto out_remove_devfreq_device; > > > > > + } > > > > > + return 0; > > > > > + > > > > > +out_remove_devfreq_device: > > > > > + devm_devfreq_remove_device(dev, drv->devfreq); > > > > > + > > > > > +out_remove_opp_table: > > > > > + dev_pm_opp_of_remove_table(dev); > > > > > + > > > > > +out_disable_inter_clk: > > > > > + clk_disable_unprepare(drv->inter_clk); > > > > > + > > > > > +out_disable_cci_clk: > > > > > + clk_disable_unprepare(drv->cci_clk); > > > > > + > > > > > +out_free_resources: > > > > > + if (regulator_is_enabled(drv->proc_reg)) > > > > > + regulator_disable(drv->proc_reg); > > > > > + if (drv->sram_reg && regulator_is_enabled(drv- > > > > > >sram_reg)) > > > > > + regulator_disable(drv->sram_reg); > > > > > + > > > > > + if (!IS_ERR(drv->proc_reg)) > > > > > + regulator_put(drv->proc_reg); > > > > > + if (!IS_ERR(drv->sram_reg)) > > > > > + regulator_put(drv->sram_reg); > > > > > + if (!IS_ERR(drv->cci_clk)) > > > > > + clk_put(drv->cci_clk); > > > > > + if (!IS_ERR(drv->inter_clk)) > > > > > + clk_put(drv->inter_clk); > > > > > + > > > > > + return ret; > > > > > +} > > > > > + > > > > > +static int mtk_ccifreq_remove(struct platform_device *pdev) > > > > > +{ > > > > > + struct device *dev = &pdev->dev; > > > > > + struct mtk_ccifreq_drv *drv; > > > > > + > > > > > + drv = platform_get_drvdata(pdev); > > > > > + > > > > > + dev_pm_opp_unregister_notifier(dev, &drv->opp_nb); > > > > > + dev_pm_opp_of_remove_table(dev); > > > > > + clk_disable_unprepare(drv->inter_clk); > > > > > + clk_disable_unprepare(drv->cci_clk); > > > > > + regulator_disable(drv->proc_reg); > > > > > + if (drv->sram_reg) > > > > > + regulator_disable(drv->sram_reg); > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static const struct mtk_ccifreq_platform_data > > > > > mt8183_platform_data = > > > > > { > > > > > + .min_volt_shift = 100000, > > > > > + .max_volt_shift = 200000, > > > > > + .proc_max_volt = 1150000, > > > > > + .sram_min_volt = 0, > > > > > + .sram_max_volt = 1150000, > > > > > +}; > > > > > + > > > > > +static const struct mtk_ccifreq_platform_data > > > > > mt8186_platform_data = > > > > > { > > > > > + .min_volt_shift = 100000, > > > > > + .max_volt_shift = 250000, > > > > > + .proc_max_volt = 1118750, > > > > > + .sram_min_volt = 850000, > > > > > + .sram_max_volt = 1118750, > > > > > +}; > > > > > + > > > > > +static const struct of_device_id mtk_ccifreq_machines[] = { > > > > > + { .compatible = "mediatek,mt8183-cci", .data = > > > > > &mt8183_platform_data }, > > > > > + { .compatible = "mediatek,mt8186-cci", .data = > > > > > &mt8186_platform_data }, > > > > > + { }, > > > > > +}; > > > > > +MODULE_DEVICE_TABLE(of, mtk_ccifreq_machines); > > > > > + > > > > > +static struct platform_driver mtk_ccifreq_platdrv = { > > > > > + .probe = mtk_ccifreq_probe, > > > > > + .remove = mtk_ccifreq_remove, > > > > > + .driver = { > > > > > + .name = "mtk-ccifreq", > > > > > + .of_match_table = mtk_ccifreq_machines, > > > > > + }, > > > > > +}; > > > > > +module_platform_driver(mtk_ccifreq_platdrv); > > > > > + > > > > > +MODULE_DESCRIPTION("MediaTek CCI devfreq driver"); > > > > > +MODULE_AUTHOR("Jia-Wei Chang "); > > > > > +MODULE_LICENSE("GPL v2"); > > > > > > > > Hi Chanwoo, > > > > > > > > Just a kindly ping. > > > > Could you please give me some suggestion on this patch? > > > > Thanks! > > > > > > > > BRs, > > > > Johnson Wang > > > > > > > > > > Hi Johnson, > > > > > > Sorry for late reply.But I replied it yesterday as following: > > > Maybe, this reply[1] has not yet arrrived at your mail box. > > > [1] > > > > > > > https://lore.kernel.org/lkml/0846a062-2ea2-e6d4-03c8-992c2f2e24a0@gmail.com/T/#m3bc609d805d6e74ec7a105be0511926b4afbbaef > > > > > > As I described on reply[1], I updated the patches on devfreq- > > > testing > > > branch. Could you please test your patches based on devfreq- > > > testing > > > branch? > > > > > > > Hi Chanwoo, > > > > Thanks for your information. > > I've tested this patch based on the latest devfreq-testing branch. > > It encounters the same crash as Chen-Yu mentioned[1]. > > > > [1] > > https://lore.kernel.org/linux-pm/YniX1w+oI1eOCmCx@google.com/T/#u > > Hi Johnson, > > Thanks for the test. I'll drop the last patch caused of crash. > And I'll send v3 patchset right now. > > Hi Chanwoo, With your v3 patchset, this CCI devfreq driver works properly on the target. Thanks! BRs, Johnson Wang _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel