From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Mon, 23 Jul 2018 11:31:07 +0200 Subject: [U-Boot] [PATCH 1/3] Revert "ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK" In-Reply-To: <1530775428-19269-1-git-send-email-lzenz@dh-electronics.de> References: <1530775428-19269-1-git-send-email-lzenz@dh-electronics.de> Message-ID: <036ef753-192c-31bb-b553-3795ce9cf626@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 05/07/2018 09:23, lzenz at dh-electronics.de wrote: > From: Ludwig Zenz > > This reverts commit a637fe6f27fd4c19ef9f43a5f871c244581422ac. > > The DDR DRAM calibration was enhanced by write leveling correction code. > It can be used with T-topology now. > > Signed-off-by: Ludwig Zenz > --- > board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c > index dffe4eb..beda389 100644 > --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c > +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c > @@ -384,6 +384,10 @@ void board_init_f(ulong dummy) > &dhcom6sdl_grp_ioregs); > mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr); > > + /* Perform DDR DRAM calibration */ > + udelay(100); > + mmdc_do_dqs_calibration(&dhcom_ddr_info); > + > /* Clear the BSS. */ > memset(__bss_start, 0, __bss_end - __bss_start); > > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================