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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id b9-20020a056512024900b0047255d21148sm1999270lfo.119.2022.05.23.07.16.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 May 2022 07:16:48 -0700 (PDT) Message-ID: <03f0e3b5-8007-2731-62be-6e9fd18b949b@linaro.org> Date: Mon, 23 May 2022 16:16:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH v1 17/19] arm64: dts: nuvoton: Add initial NPCM8XX device tree Content-Language: en-US To: Geert Uytterhoeven Cc: Tomer Maimon , Avi Fishman , Tali Perry , Joel Stanley , Patrick Venture , Nancy Yuen , Benjamin Fair , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Philipp Zabel , Greg KH , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson , Jiri Slaby , Shawn Guo , =?UTF-8?Q?Bj=c3=b6rn_Andersson?= , Geert Uytterhoeven , Marcel Ziswiler , Vinod , Biju Das , Nobuhiro Iwamatsu , Robert Hancock , =?UTF-8?Q?Jonathan_Neusch=c3=a4fer?= , Lubomir Rintel , arm-soc , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , linux-clk , "open list:SERIAL DRIVERS" , Linux Watchdog Mailing List , Linux ARM References: <20220522155046.260146-1-tmaimon77@gmail.com> <20220522155046.260146-18-tmaimon77@gmail.com> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/05/2022 15:58, Geert Uytterhoeven wrote: > Hi Krzysztof, > > On Mon, May 23, 2022 at 11:08 AM Krzysztof Kozlowski > wrote: >> On 22/05/2022 17:50, Tomer Maimon wrote: >>> This adds initial device tree support for the >>> Nuvoton NPCM845 Board Management controller (BMC) SoC family. >> >> Thank you for your patch. There is something to discuss/improve. >> >>> The NPCM845 based quad-core Cortex-A35 ARMv8 architecture and >>> have various peripheral IPs. >>> >>> Signed-off-by: Tomer Maimon > >>> + l2: l2-cache { >>> + compatible = "cache"; >> >> Is this a real compatible? What bindings are you using here? > > The compatible value and related properties are defined in the > Devicetree Specification, v0.4-rc1, Section 3.9 ("Multi-level and > Shared Cache Nodes (/cpus/cpu*/l?-cache)"). Indeed, thanks! > > The properties are handled by > dtschema/schemas/cache-controller.yaml, but the latter seems to lack > any checking on the compatible value? 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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id b9-20020a056512024900b0047255d21148sm1999270lfo.119.2022.05.23.07.16.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 May 2022 07:16:48 -0700 (PDT) Message-ID: <03f0e3b5-8007-2731-62be-6e9fd18b949b@linaro.org> Date: Mon, 23 May 2022 16:16:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH v1 17/19] arm64: dts: nuvoton: Add initial NPCM8XX device tree Content-Language: en-US To: Geert Uytterhoeven Cc: Tomer Maimon , Avi Fishman , Tali Perry , Joel Stanley , Patrick Venture , Nancy Yuen , Benjamin Fair , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Philipp Zabel , Greg KH , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson , Jiri Slaby , Shawn Guo , =?UTF-8?Q?Bj=c3=b6rn_Andersson?= , Geert Uytterhoeven , Marcel Ziswiler , Vinod , Biju Das , Nobuhiro Iwamatsu , Robert Hancock , =?UTF-8?Q?Jonathan_Neusch=c3=a4fer?= , Lubomir Rintel , arm-soc , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , linux-clk , "open list:SERIAL DRIVERS" , Linux Watchdog Mailing List , Linux ARM References: <20220522155046.260146-1-tmaimon77@gmail.com> <20220522155046.260146-18-tmaimon77@gmail.com> From: Krzysztof Kozlowski In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220523_071652_755132_3F77252C X-CRM114-Status: GOOD ( 18.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 23/05/2022 15:58, Geert Uytterhoeven wrote: > Hi Krzysztof, > > On Mon, May 23, 2022 at 11:08 AM Krzysztof Kozlowski > wrote: >> On 22/05/2022 17:50, Tomer Maimon wrote: >>> This adds initial device tree support for the >>> Nuvoton NPCM845 Board Management controller (BMC) SoC family. >> >> Thank you for your patch. There is something to discuss/improve. >> >>> The NPCM845 based quad-core Cortex-A35 ARMv8 architecture and >>> have various peripheral IPs. >>> >>> Signed-off-by: Tomer Maimon > >>> + l2: l2-cache { >>> + compatible = "cache"; >> >> Is this a real compatible? What bindings are you using here? > > The compatible value and related properties are defined in the > Devicetree Specification, v0.4-rc1, Section 3.9 ("Multi-level and > Shared Cache Nodes (/cpus/cpu*/l?-cache)"). Indeed, thanks! > > The properties are handled by > dtschema/schemas/cache-controller.yaml, but the latter seems to lack > any checking on the compatible value? Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel