From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 034A6C433FE for ; Tue, 8 Nov 2022 18:12:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234749AbiKHSMF (ORCPT ); Tue, 8 Nov 2022 13:12:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234762AbiKHSLs (ORCPT ); Tue, 8 Nov 2022 13:11:48 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2294859FEC for ; Tue, 8 Nov 2022 10:11:47 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id g12so22228603wrs.10 for ; Tue, 08 Nov 2022 10:11:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=oNbuvhNf/Wvi9KDrdhQiQ7CIoY1oS0/eXau3bWTCZqo=; b=aAo97Lk7t8HYJYAQH+EepvDRsg9bR5P+VV7s+6T1YBRXmvxQRjh7gy++zo+Y+ZXRdx YR9BZg+ULLNQeeJVYoaatkdckzPUcE0/ceV66dSZsMwNKONY/6kM/jP3VLVs24YYnzPx p4duRRADFem32dEbRqMt4nQCyjzjIAzAiYZniLuqT1966rGL6dHzHveRqJVBNucWCO+5 nm0uG8+s+TzJddl9DjklHuDeY46/wHBJuthagt1wwW/d2SqF0kCQApgZAzJI44U2hE6Z 5JMz72qjeEnloIK8AFnGf9m2mIsTGytswmW5LtfKpffbnH+Bog4GUbSx/LQk97AMnILo s1EA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=oNbuvhNf/Wvi9KDrdhQiQ7CIoY1oS0/eXau3bWTCZqo=; b=Umhq/++5CAy/e4YNfCRVMcgADzLpqGc0RCa4ZIcV+o3i8fF+U6k6vNdy1AfHUaUQlu rCAd+8lSRxe2rasFLpWPo28cF2wHYWLq/2d8nlhDN1hH3LWQNoaJc+NWOCsCkm10pdZa WZgCzeY5svUSPPQPNJYzNTF86d+mi7l7kNqIzv6CYhku+turEv+tpQk3ZCNFmMLcg+b7 nIEnSz/QUcQj3uYls8IGCjMN06ebP2YXdWY2OeUYDd08HAvclmbhMZEaZ++bQwTAa/oj QQ1x9WwCjqFz0JXHwjKVU+CZByn8r99EzV3kyn2yoigUSy1Hcz6gH3BY0Th96hyh0rPP YO5w== X-Gm-Message-State: ACrzQf0SwexRFpJbWJfTI6Ea5H8WnXZL7dxYurYd8yKwN8QC12TNcxDr kQNiBysrXAByFZJ38wcmZFA= X-Google-Smtp-Source: AMsMyM6ErS/0hA9t6B9+8Qsgjup9o1jMSAt9VpHujCwfERrvF9rKCdB4Y0IaSRtElie7ycelM0GySg== X-Received: by 2002:a5d:5270:0:b0:236:60c6:6e80 with SMTP id l16-20020a5d5270000000b0023660c66e80mr35179041wrc.140.1667931105355; Tue, 08 Nov 2022 10:11:45 -0800 (PST) Received: from [192.168.0.25] ([37.222.251.204]) by smtp.gmail.com with ESMTPSA id iv9-20020a05600c548900b003cf87623c16sm17256080wmb.4.2022.11.08.10.11.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 08 Nov 2022 10:11:44 -0800 (PST) Message-ID: <03fdf45d-be93-206a-8c9c-17d31010162f@gmail.com> Date: Tue, 8 Nov 2022 19:11:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [PATCH v13,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func Content-Language: en-US To: xinlei.lee@mediatek.com, rex-bc.chen@mediatek.com, angelogioacchino.delregno@collabora.com, jason-jh.lin@mediatek.com, nfraprado@collabora.com, chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Project_Global_Chrome_Upstream_Group@mediatek.com References: <1666577099-3859-1-git-send-email-xinlei.lee@mediatek.com> <1666577099-3859-2-git-send-email-xinlei.lee@mediatek.com> From: Matthias Brugger In-Reply-To: <1666577099-3859-2-git-send-email-xinlei.lee@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Xinlei, Can you please fix the threading of this patches. I can see that this 1/3 but I'm not able to find 3/3 in the series. The first two look good, the third, I don't know. Regards, Matthias On 24/10/2022 04:04, xinlei.lee@mediatek.com wrote: > From: Xinlei Lee > > The difference between MT8186 and other ICs is that when modifying the > output format, we need to modify the mmsys_base+0x400 register to take > effect. So when setting the dpi output format, we need to call > mtk_mmsys_ddp_dpi_fmt_config to set it to MT8186 synchronously. > > Commit a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi > output for MT8186") lacked some of the possible output formats and also > had a wrong bitmask. > > Add the missing output formats and fix the bitmask. > > While at it, also update mtk_mmsys_ddp_dpi_fmt_config() to use generic > formats, so that it is slightly easier to extend for other platforms. > > Fixes: a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi output for MT8186") > Signed-off-by: Xinlei Lee > Reviewed-by: AngeloGioacchino Del Regno > Reviewed-by: CK Hu > Reviewed-by: Nícolas F. R. A. Prado > --- > drivers/soc/mediatek/mt8186-mmsys.h | 8 +++++--- > drivers/soc/mediatek/mtk-mmsys.c | 27 ++++++++++++++++++++------ > include/linux/soc/mediatek/mtk-mmsys.h | 7 +++++++ > 3 files changed, 33 insertions(+), 9 deletions(-) > > diff --git a/drivers/soc/mediatek/mt8186-mmsys.h b/drivers/soc/mediatek/mt8186-mmsys.h > index 09b1ccbc0093..279d4138525b 100644 > --- a/drivers/soc/mediatek/mt8186-mmsys.h > +++ b/drivers/soc/mediatek/mt8186-mmsys.h > @@ -5,9 +5,11 @@ > > /* Values for DPI configuration in MMSYS address space */ > #define MT8186_MMSYS_DPI_OUTPUT_FORMAT 0x400 > -#define DPI_FORMAT_MASK 0x1 > -#define DPI_RGB888_DDR_CON BIT(0) > -#define DPI_RGB565_SDR_CON BIT(1) > +#define MT8186_DPI_FORMAT_MASK GENMASK(1, 0) > +#define MT8186_DPI_RGB888_SDR_CON 0 > +#define MT8186_DPI_RGB888_DDR_CON 1 > +#define MT8186_DPI_RGB565_SDR_CON 2 > +#define MT8186_DPI_RGB565_DDR_CON 3 > > #define MT8186_MMSYS_OVL_CON 0xF04 > #define MT8186_MMSYS_OVL0_CON_MASK 0x3 > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > index 2e20b24da363..16cd924d8973 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -238,12 +238,27 @@ static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, > > void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val) > { > - if (val) > - mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT, > - DPI_RGB888_DDR_CON, DPI_FORMAT_MASK); > - else > - mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT, > - DPI_RGB565_SDR_CON, DPI_FORMAT_MASK); > + struct mtk_mmsys *mmsys = dev_get_drvdata(dev); > + > + switch (val) { > + case MTK_DPI_RGB888_SDR_CON: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB888_SDR_CON); > + break; > + case MTK_DPI_RGB565_SDR_CON: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB565_SDR_CON); > + break; > + case MTK_DPI_RGB565_DDR_CON: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB565_DDR_CON); > + break; > + case MTK_DPI_RGB888_DDR_CON: > + default: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB888_DDR_CON); > + break; > + } > } > EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config); > > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h > index d2b02bb43768..b85f66db33e1 100644 > --- a/include/linux/soc/mediatek/mtk-mmsys.h > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > @@ -9,6 +9,13 @@ > enum mtk_ddp_comp_id; > struct device; > > +enum mtk_dpi_out_format_con { > + MTK_DPI_RGB888_SDR_CON, > + MTK_DPI_RGB888_DDR_CON, > + MTK_DPI_RGB565_SDR_CON, > + MTK_DPI_RGB565_DDR_CON > +}; > + > enum mtk_ddp_comp_id { > DDP_COMPONENT_AAL0, > DDP_COMPONENT_AAL1, From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9B5D3C433FE for ; Tue, 8 Nov 2022 18:11:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 52A9A10E194; Tue, 8 Nov 2022 18:11:49 +0000 (UTC) Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by gabe.freedesktop.org (Postfix) with ESMTPS id E97E810E194 for ; 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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [PATCH v13,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func Content-Language: en-US To: xinlei.lee@mediatek.com, rex-bc.chen@mediatek.com, angelogioacchino.delregno@collabora.com, jason-jh.lin@mediatek.com, nfraprado@collabora.com, chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch References: <1666577099-3859-1-git-send-email-xinlei.lee@mediatek.com> <1666577099-3859-2-git-send-email-xinlei.lee@mediatek.com> From: Matthias Brugger In-Reply-To: <1666577099-3859-2-git-send-email-xinlei.lee@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Xinlei, Can you please fix the threading of this patches. I can see that this 1/3 but I'm not able to find 3/3 in the series. The first two look good, the third, I don't know. Regards, Matthias On 24/10/2022 04:04, xinlei.lee@mediatek.com wrote: > From: Xinlei Lee > > The difference between MT8186 and other ICs is that when modifying the > output format, we need to modify the mmsys_base+0x400 register to take > effect. So when setting the dpi output format, we need to call > mtk_mmsys_ddp_dpi_fmt_config to set it to MT8186 synchronously. > > Commit a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi > output for MT8186") lacked some of the possible output formats and also > had a wrong bitmask. > > Add the missing output formats and fix the bitmask. > > While at it, also update mtk_mmsys_ddp_dpi_fmt_config() to use generic > formats, so that it is slightly easier to extend for other platforms. > > Fixes: a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi output for MT8186") > Signed-off-by: Xinlei Lee > Reviewed-by: AngeloGioacchino Del Regno > Reviewed-by: CK Hu > Reviewed-by: Nícolas F. R. A. Prado > --- > drivers/soc/mediatek/mt8186-mmsys.h | 8 +++++--- > drivers/soc/mediatek/mtk-mmsys.c | 27 ++++++++++++++++++++------ > include/linux/soc/mediatek/mtk-mmsys.h | 7 +++++++ > 3 files changed, 33 insertions(+), 9 deletions(-) > > diff --git a/drivers/soc/mediatek/mt8186-mmsys.h b/drivers/soc/mediatek/mt8186-mmsys.h > index 09b1ccbc0093..279d4138525b 100644 > --- a/drivers/soc/mediatek/mt8186-mmsys.h > +++ b/drivers/soc/mediatek/mt8186-mmsys.h > @@ -5,9 +5,11 @@ > > /* Values for DPI configuration in MMSYS address space */ > #define MT8186_MMSYS_DPI_OUTPUT_FORMAT 0x400 > -#define DPI_FORMAT_MASK 0x1 > -#define DPI_RGB888_DDR_CON BIT(0) > -#define DPI_RGB565_SDR_CON BIT(1) > +#define MT8186_DPI_FORMAT_MASK GENMASK(1, 0) > +#define MT8186_DPI_RGB888_SDR_CON 0 > +#define MT8186_DPI_RGB888_DDR_CON 1 > +#define MT8186_DPI_RGB565_SDR_CON 2 > +#define MT8186_DPI_RGB565_DDR_CON 3 > > #define MT8186_MMSYS_OVL_CON 0xF04 > #define MT8186_MMSYS_OVL0_CON_MASK 0x3 > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > index 2e20b24da363..16cd924d8973 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -238,12 +238,27 @@ static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, > > void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val) > { > - if (val) > - mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT, > - DPI_RGB888_DDR_CON, DPI_FORMAT_MASK); > - else > - mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT, > - DPI_RGB565_SDR_CON, DPI_FORMAT_MASK); > + struct mtk_mmsys *mmsys = dev_get_drvdata(dev); > + > + switch (val) { > + case MTK_DPI_RGB888_SDR_CON: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB888_SDR_CON); > + break; > + case MTK_DPI_RGB565_SDR_CON: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB565_SDR_CON); > + break; > + case MTK_DPI_RGB565_DDR_CON: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB565_DDR_CON); > + break; > + case MTK_DPI_RGB888_DDR_CON: > + default: > + mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT, > + MT8186_DPI_FORMAT_MASK, MT8186_DPI_RGB888_DDR_CON); > + break; > + } > } > EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config); > > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h > index d2b02bb43768..b85f66db33e1 100644 > --- a/include/linux/soc/mediatek/mtk-mmsys.h > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > @@ -9,6 +9,13 @@ > enum mtk_ddp_comp_id; > struct device; > > +enum mtk_dpi_out_format_con { > + MTK_DPI_RGB888_SDR_CON, > + MTK_DPI_RGB888_DDR_CON, > + MTK_DPI_RGB565_SDR_CON, > + MTK_DPI_RGB565_DDR_CON > +}; > + > enum mtk_ddp_comp_id { > DDP_COMPONENT_AAL0, > DDP_COMPONENT_AAL1, From mboxrd@z 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rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [PATCH v13,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func Content-Language: en-US To: xinlei.lee@mediatek.com, rex-bc.chen@mediatek.com, angelogioacchino.delregno@collabora.com, jason-jh.lin@mediatek.com, nfraprado@collabora.com, chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Project_Global_Chrome_Upstream_Group@mediatek.com References: <1666577099-3859-1-git-send-email-xinlei.lee@mediatek.com> <1666577099-3859-2-git-send-email-xinlei.lee@mediatek.com> From: Matthias Brugger In-Reply-To: <1666577099-3859-2-git-send-email-xinlei.lee@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221108_101148_507876_B2B0B108 X-CRM114-Status: GOOD ( 25.71 ) X-BeenThere: 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LiBTbyB3aGVuIHNldHRpbmcgdGhlIGRwaSBvdXRwdXQgZm9ybWF0LCB3ZSBuZWVkIHRvIGNhbGwK PiBtdGtfbW1zeXNfZGRwX2RwaV9mbXRfY29uZmlnIHRvIHNldCBpdCB0byBNVDgxODYgc3luY2hy b25vdXNseS4KPiAgICAKPiBDb21taXQgYTA3MWU1MmY3NWQxICgic29jOiBtZWRpYXRlazogQWRk IG1tc3lzIGZ1bmMgdG8gYWRhcHQgdG8gZHBpCj4gb3V0cHV0IGZvciBNVDgxODYiKSBsYWNrZWQg c29tZSBvZiB0aGUgcG9zc2libGUgb3V0cHV0IGZvcm1hdHMgYW5kIGFsc28KPiBoYWQgYSB3cm9u ZyBiaXRtYXNrLgo+IAo+IEFkZCB0aGUgbWlzc2luZyBvdXRwdXQgZm9ybWF0cyBhbmQgZml4IHRo ZSBiaXRtYXNrLgo+ICAgIAo+IFdoaWxlIGF0IGl0LCBhbHNvIHVwZGF0ZSBtdGtfbW1zeXNfZGRw X2RwaV9mbXRfY29uZmlnKCkgdG8gdXNlIGdlbmVyaWMKPiBmb3JtYXRzLCBzbyB0aGF0IGl0IGlz IHNsaWdodGx5IGVhc2llciB0byBleHRlbmQgZm9yIG90aGVyIHBsYXRmb3Jtcy4KPiAgICAKPiBG aXhlczogYTA3MWU1MmY3NWQxICgic29jOiBtZWRpYXRlazogQWRkIG1tc3lzIGZ1bmMgdG8gYWRh cHQgdG8gZHBpIG91dHB1dCBmb3IgTVQ4MTg2IikKPiBTaWduZWQtb2ZmLWJ5OiBYaW5sZWkgTGVl IDx4aW5sZWkubGVlQG1lZGlhdGVrLmNvbT4KPiBSZXZpZXdlZC1ieTogQW5nZWxvR2lvYWNjaGlu byBEZWwgUmVnbm8gPGFuZ2Vsb2dpb2FjY2hpbm8uZGVscmVnbm9AY29sbGFib3JhLmNvbT4KPiBS ZXZpZXdlZC1ieTogQ0sgSHUgPGNrLmh1QG1lZGlhdGVrLmNvbT4KPiBSZXZpZXdlZC1ieTogTsOt Y29sYXMgRi4gUi4gQS4gUHJhZG8gPG5mcmFwcmFkb0Bjb2xsYWJvcmEuY29tPgo+IC0tLQo+ICAg ZHJpdmVycy9zb2MvbWVkaWF0ZWsvbXQ4MTg2LW1tc3lzLmggICAgfCAgOCArKysrKy0tLQo+ICAg ZHJpdmVycy9zb2MvbWVkaWF0ZWsvbXRrLW1tc3lzLmMgICAgICAgfCAyNyArKysrKysrKysrKysr KysrKysrKy0tLS0tLQo+ICAgaW5jbHVkZS9saW51eC9zb2MvbWVkaWF0ZWsvbXRrLW1tc3lzLmgg fCAgNyArKysrKysrCj4gICAzIGZpbGVzIGNoYW5nZWQsIDMzIGluc2VydGlvbnMoKyksIDkgZGVs ZXRpb25zKC0pCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvc29jL21lZGlhdGVrL210ODE4Ni1t bXN5cy5oIGIvZHJpdmVycy9zb2MvbWVkaWF0ZWsvbXQ4MTg2LW1tc3lzLmgKPiBpbmRleCAwOWIx Y2NiYzAwOTMuLjI3OWQ0MTM4NTI1YiAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL3NvYy9tZWRpYXRl ay9tdDgxODYtbW1zeXMuaAo+ICsrKyBiL2RyaXZlcnMvc29jL21lZGlhdGVrL210ODE4Ni1tbXN5 cy5oCj4gQEAgLTUsOSArNSwxMSBAQAo+ICAgCj4gICAvKiBWYWx1ZXMgZm9yIERQSSBjb25maWd1 cmF0aW9uIGluIE1NU1lTIGFkZHJlc3Mgc3BhY2UgKi8KPiAgICNkZWZpbmUgTVQ4MTg2X01NU1lT X0RQSV9PVVRQVVRfRk9STUFUCQkweDQwMAo+IC0jZGVmaW5lIERQSV9GT1JNQVRfTUFTSwkJCQkJ MHgxCj4gLSNkZWZpbmUgRFBJX1JHQjg4OF9ERFJfQ09OCQkJCUJJVCgwKQo+IC0jZGVmaW5lIERQ SV9SR0I1NjVfU0RSX0NPTgkJCQlCSVQoMSkKPiArI2RlZmluZSBNVDgxODZfRFBJX0ZPUk1BVF9N QVNLCQkJCUdFTk1BU0soMSwgMCkKPiArI2RlZmluZSBNVDgxODZfRFBJX1JHQjg4OF9TRFJfQ09O CQkJMAo+ICsjZGVmaW5lIE1UODE4Nl9EUElfUkdCODg4X0REUl9DT04JCQkxCj4gKyNkZWZpbmUg TVQ4MTg2X0RQSV9SR0I1NjVfU0RSX0NPTgkJCTIKPiArI2RlZmluZSBNVDgxODZfRFBJX1JHQjU2 NV9ERFJfQ09OCQkJMwo+ICAgCj4gICAjZGVmaW5lIE1UODE4Nl9NTVNZU19PVkxfQ09OCQkJMHhG MDQKPiAgICNkZWZpbmUgTVQ4MTg2X01NU1lTX09WTDBfQ09OX01BU0sJCQkweDMKPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy9zb2MvbWVkaWF0ZWsvbXRrLW1tc3lzLmMgYi9kcml2ZXJzL3NvYy9tZWRp YXRlay9tdGstbW1zeXMuYwo+IGluZGV4IDJlMjBiMjRkYTM2My4uMTZjZDkyNGQ4OTczIDEwMDY0 NAo+IC0tLSBhL2RyaXZlcnMvc29jL21lZGlhdGVrL210ay1tbXN5cy5jCj4gKysrIGIvZHJpdmVy cy9zb2MvbWVkaWF0ZWsvbXRrLW1tc3lzLmMKPiBAQCAtMjM4LDEyICsyMzgsMjcgQEAgc3RhdGlj IHZvaWQgbXRrX21tc3lzX3VwZGF0ZV9iaXRzKHN0cnVjdCBtdGtfbW1zeXMgKm1tc3lzLCB1MzIg b2Zmc2V0LCB1MzIgbWFzaywKPiAgIAo+ICAgdm9pZCBtdGtfbW1zeXNfZGRwX2RwaV9mbXRfY29u ZmlnKHN0cnVjdCBkZXZpY2UgKmRldiwgdTMyIHZhbCkKPiAgIHsKPiAtCWlmICh2YWwpCj4gLQkJ bXRrX21tc3lzX3VwZGF0ZV9iaXRzKGRldl9nZXRfZHJ2ZGF0YShkZXYpLCBNVDgxODZfTU1TWVNf RFBJX09VVFBVVF9GT1JNQVQsCj4gLQkJCQkgICAgICBEUElfUkdCODg4X0REUl9DT04sIERQSV9G T1JNQVRfTUFTSyk7Cj4gLQllbHNlCj4gLQkJbXRrX21tc3lzX3VwZGF0ZV9iaXRzKGRldl9nZXRf ZHJ2ZGF0YShkZXYpLCBNVDgxODZfTU1TWVNfRFBJX09VVFBVVF9GT1JNQVQsCj4gLQkJCQkgICAg ICBEUElfUkdCNTY1X1NEUl9DT04sIERQSV9GT1JNQVRfTUFTSyk7Cj4gKwlzdHJ1Y3QgbXRrX21t c3lzICptbXN5cyA9IGRldl9nZXRfZHJ2ZGF0YShkZXYpOwo+ICsKPiArCXN3aXRjaCAodmFsKSB7 Cj4gKwljYXNlIE1US19EUElfUkdCODg4X1NEUl9DT046Cj4gKwkJbXRrX21tc3lzX3VwZGF0ZV9i aXRzKG1tc3lzLCBNVDgxODZfTU1TWVNfRFBJX09VVFBVVF9GT1JNQVQsCj4gKwkJCQkgICAgICBN VDgxODZfRFBJX0ZPUk1BVF9NQVNLLCBNVDgxODZfRFBJX1JHQjg4OF9TRFJfQ09OKTsKPiArCQli cmVhazsKPiArCWNhc2UgTVRLX0RQSV9SR0I1NjVfU0RSX0NPTjoKPiArCQltdGtfbW1zeXNfdXBk YXRlX2JpdHMobW1zeXMsIE1UODE4Nl9NTVNZU19EUElfT1VUUFVUX0ZPUk1BVCwKPiArCQkJCSAg ICAgIE1UODE4Nl9EUElfRk9STUFUX01BU0ssIE1UODE4Nl9EUElfUkdCNTY1X1NEUl9DT04pOwo+ ICsJCWJyZWFrOwo+ICsJY2FzZSBNVEtfRFBJX1JHQjU2NV9ERFJfQ09OOgo+ICsJCW10a19tbXN5 c191cGRhdGVfYml0cyhtbXN5cywgTVQ4MTg2X01NU1lTX0RQSV9PVVRQVVRfRk9STUFULAo+ICsJ CQkJICAgICAgTVQ4MTg2X0RQSV9GT1JNQVRfTUFTSywgTVQ4MTg2X0RQSV9SR0I1NjVfRERSX0NP Tik7Cj4gKwkJYnJlYWs7Cj4gKwljYXNlIE1US19EUElfUkdCODg4X0REUl9DT046Cj4gKwlkZWZh dWx0Ogo+ICsJCW10a19tbXN5c191cGRhdGVfYml0cyhtbXN5cywgTVQ4MTg2X01NU1lTX0RQSV9P VVRQVVRfRk9STUFULAo+ICsJCQkJICAgICAgTVQ4MTg2X0RQSV9GT1JNQVRfTUFTSywgTVQ4MTg2 X0RQSV9SR0I4ODhfRERSX0NPTik7Cj4gKwkJYnJlYWs7Cj4gKwl9Cj4gICB9Cj4gICBFWFBPUlRf U1lNQk9MX0dQTChtdGtfbW1zeXNfZGRwX2RwaV9mbXRfY29uZmlnKTsKPiAgIAo+IGRpZmYgLS1n aXQgYS9pbmNsdWRlL2xpbnV4L3NvYy9tZWRpYXRlay9tdGstbW1zeXMuaCBiL2luY2x1ZGUvbGlu dXgvc29jL21lZGlhdGVrL210ay1tbXN5cy5oCj4gaW5kZXggZDJiMDJiYjQzNzY4Li5iODVmNjZk YjMzZTEgMTAwNjQ0Cj4gLS0tIGEvaW5jbHVkZS9saW51eC9zb2MvbWVkaWF0ZWsvbXRrLW1tc3lz LmgKPiArKysgYi9pbmNsdWRlL2xpbnV4L3NvYy9tZWRpYXRlay9tdGstbW1zeXMuaAo+IEBAIC05 LDYgKzksMTMgQEAKPiAgIGVudW0gbXRrX2RkcF9jb21wX2lkOwo+ICAgc3RydWN0IGRldmljZTsK PiAgIAo+ICtlbnVtIG10a19kcGlfb3V0X2Zvcm1hdF9jb24gewo+ICsJTVRLX0RQSV9SR0I4ODhf U0RSX0NPTiwKPiArCU1US19EUElfUkdCODg4X0REUl9DT04sCj4gKwlNVEtfRFBJX1JHQjU2NV9T RFJfQ09OLAo+ICsJTVRLX0RQSV9SR0I1NjVfRERSX0NPTgo+ICt9Owo+ICsKPiAgIGVudW0gbXRr X2RkcF9jb21wX2lkIHsKPiAgIAlERFBfQ09NUE9ORU5UX0FBTDAsCj4gICAJRERQX0NPTVBPTkVO VF9BQUwxLAoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K bGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZy YWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGlu dXgtYXJtLWtlcm5lbAo=