From mboxrd@z Thu Jan 1 00:00:00 1970 From: Patrice CHOTARD Date: Mon, 25 Jan 2021 14:45:41 +0100 Subject: [PATCH] clk: stm32mp1: add support of I2C6_K In-Reply-To: <20210122153414.1.I28be53e4ce2082b513afd19d77d1430741ac16f3@changeid> References: <20210122153414.1.I28be53e4ce2082b513afd19d77d1430741ac16f3@changeid> Message-ID: <042ec757-65a9-053a-5759-5f6420a19af4@foss.st.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Patrick On 1/22/21 3:34 PM, Patrick Delaunay wrote: > Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR = > I2C6EN: I2C6 peripheral clocks enable. > > This patch allows customer to use I2C6 in SPL or in U-Boot > as other I2C instance, already support in clk driver. > > Signed-off-by: Patrick Delaunay > --- > > drivers/clk/clk_stm32mp1.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c > index d4f1048591..8a5bdcb11d 100644 > --- a/drivers/clk/clk_stm32mp1.c > +++ b/drivers/clk/clk_stm32mp1.c > @@ -549,6 +549,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { > STM32MP1_CLK_SET_CLR(RCC_MP_APB4ENSETR, 16, USBPHY_K, _USBPHY_SEL), > > STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL), > + STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL), > STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5), > STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 20, STGEN_K, _STGEN_SEL), > > Reviewed-by: Patrice Chotard Thanks Patrice