All of lore.kernel.org
 help / color / mirror / Atom feed
From: Stefan Roese <sr@denx.de>
To: "Marek Behún" <marek.behun@nic.cz>
Cc: u-boot@lists.denx.de, pali@kernel.org
Subject: Re: [PATCH u-boot-marvell 5/9] arm: mvebu: a38x: serdes: Don't set PCIe Common Clock Configuration
Date: Fri, 8 Oct 2021 08:28:17 +0200	[thread overview]
Message-ID: <047f37a7-5c0c-9888-1aac-636fea471888@denx.de> (raw)
In-Reply-To: <20210924205922.25432-6-marek.behun@nic.cz>

On 24.09.21 22:59, Marek Behún wrote:
> From: Pali Rohár <pali@kernel.org>
> 
> Enabling Common Clock Configuration bit in PCIe Root Port Link Control
> Register should not be done unconditionally. It is enabled by operating
> system as part of ASPM. Also after enabling Common Clock Configuration it
> is required to do more work, like retraining link. Some cards may be broken
> due to this incomplete Common Clock Configuration and some cards are broken
> and do not support ASPM at all.
> 
> Remove this incomplete code for Common Clock Configuration. It really
> should not be done in SerDes code as it is not related to SerDes, but to
> PCIe subsystem.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Marek Behún <marek.behun@nic.cz>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
>   .../mach-mvebu/serdes/a38x/high_speed_env_spec.c  | 15 ---------------
>   1 file changed, 15 deletions(-)
> 
> diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
> index a712fa8994..824f4d3e3d 100644
> --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
> +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
> @@ -1737,21 +1737,6 @@ int serdes_power_up_ctrl(u32 serdes_num, int serdes_power_up,
>   				reg_data |= (is_pex_by1 ? 1 : 4) << 4;
>   				reg_write(PEX0_RP_PCIE_CFG_OFFSET +
>   					  PCI_EXP_LNKCAP, reg_data);
> -
> -				/*
> -				 * Set Common Clock Configuration to indicates
> -				 * that both devices on the link use a
> -				 * distributed common reference clock.
> -				 */
> -				reg_data = reg_read(PEX_CFG_DIRECT_ACCESS(
> -						     pex_idx,
> -						     PEX_LINK_CTRL_STAT_REG));
> -				reg_data &= ~0x40;
> -				reg_data |= 0x40;
> -				reg_write(PEX_CFG_DIRECT_ACCESS(
> -					   pex_idx,
> -					   PEX_LINK_CTRL_STAT_REG),
> -					  reg_data);
>   			}
>   
>   			CHECK_STATUS(mv_seq_exec(serdes_num, PEX_POWER_UP_SEQ));
> 


Viele Grüße,
Stefan

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

  reply	other threads:[~2021-10-08  6:28 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-24 20:59 [PATCH u-boot-marvell 0/9] a38x serdes cleanup Marek Behún
2021-09-24 20:59 ` [PATCH u-boot-marvell 1/9] arm: mvebu: a38x: serdes: Add comments and use macros in PCIe code Marek Behún
2021-10-08  6:24   ` Stefan Roese
2021-09-24 20:59 ` [PATCH u-boot-marvell 2/9] arm: mvebu: a38x: serdes: Remove duplicate macro SOC_CTRL_REG Marek Behún
2021-10-08  6:26   ` Stefan Roese
2021-09-24 20:59 ` [PATCH u-boot-marvell 3/9] arm: mvebu: a38x: serdes: Add comments for hws_pex_config() code Marek Behún
2021-10-08  6:27   ` Stefan Roese
2021-09-24 20:59 ` [PATCH u-boot-marvell 4/9] arm: mvebu: a38x: serdes: Don't overwrite read-only SAR PCIe registers Marek Behún
2021-10-08  6:27   ` Stefan Roese
2021-09-24 20:59 ` [PATCH u-boot-marvell 5/9] arm: mvebu: a38x: serdes: Don't set PCIe Common Clock Configuration Marek Behún
2021-10-08  6:28   ` Stefan Roese [this message]
2021-09-24 20:59 ` [PATCH u-boot-marvell 6/9] arm: mvebu: a38x: serdes: Don't overwrite PCI device ID Marek Behún
2021-10-08  6:28   ` Stefan Roese
2021-09-24 20:59 ` [PATCH u-boot-marvell 7/9] arm: mvebu: a38x: serdes: Don't configure PCIe cards in SerDes init code Marek Behún
2021-10-08  6:29   ` Stefan Roese
2021-09-24 20:59 ` [PATCH u-boot-marvell 8/9] arm: mvebu: a38x: serdes: Remove unused PCIe macros and functions Marek Behún
2021-10-08  6:29   ` Stefan Roese
2021-09-24 20:59 ` [PATCH u-boot-marvell 9/9] arm: mvebu: a38x: serdes: Update comment about PCIE*_ENABLE_* defines Marek Behún
2021-10-08  6:30   ` Stefan Roese
2021-10-08  6:31 ` [PATCH u-boot-marvell 0/9] a38x serdes cleanup Stefan Roese
2021-10-08  9:18 ` Stefan Roese

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=047f37a7-5c0c-9888-1aac-636fea471888@denx.de \
    --to=sr@denx.de \
    --cc=marek.behun@nic.cz \
    --cc=pali@kernel.org \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.