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Subject: Re: [PATCH v2] perf pmu: Fix alias events list
To:     <peterz@infradead.org>, <mingo@redhat.com>, <acme@kernel.org>,
        <mark.rutland@arm.com>, <alexander.shishkin@linux.intel.com>,
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        <zhengjun.xing@linux.intel.com>
References: <1640103090-140490-1-git-send-email-john.garry@huawei.com>
From:   John Garry <john.garry@huawei.com>
Message-ID: <05dcd009-084c-b8ee-c4a5-35c0862ee26d@huawei.com>
Date:   Tue, 28 Dec 2021 21:00:18 +0000
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On 21/12/2021 16:11, John Garry wrote:
> Commit 0e0ae8742207 ("perf list: Display hybrid PMU events with cpu type")
> changes the event list for uncore PMUs or arm64 heterogeneous CPU systems,
> such that duplicate aliases are incorrectly listed per PMU (which they
> should not be), like:
> 
> ./perf list
> ...
> unc_cbo_cache_lookup.any_es
> [Unit: uncore_cbox L3 Lookup any request that access cache and found
> line in E or S-state]
> unc_cbo_cache_lookup.any_es
> [Unit: uncore_cbox L3 Lookup any request that access cache and found
> line in E or S-state]
> unc_cbo_cache_lookup.any_i
> [Unit: uncore_cbox L3 Lookup any request that access cache and found
> line in I-state]
> unc_cbo_cache_lookup.any_i
> [Unit: uncore_cbox L3 Lookup any request that access cache and found
> line in I-state]
> ...
> 
> Notice how the events are listed twice.


Hi Arnaldo,

Can you kindly consider picking up this change for v5.16?

Thanks!