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Yes, but it seems like there's no regression with IGT . If there's a big hit in performance, or if this solution gets accepted and the bug reports come flying in, we can explore other solutions. But speaking to Dan Vetter, ideal solution would be to avoid any calls directly to wbinvd, and use drm helpers in place. +Daniel for any extra input. >> use drm_clflush_sg to flush the pages for when the GPU wants to read >> from main memory. >> >> Signed-off-by: Michael Cheng >> --- >>   drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 9 ++------- >>   1 file changed, 2 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> index f5062d0c6333..b0a5baaebc43 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> @@ -8,6 +8,7 @@ >>   #include >>   #include >>   #include >> +#include >>     #include >>   @@ -250,16 +251,10 @@ static int >> i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj) >>        * DG1 is special here since it still snoops transactions even >> with >>        * CACHE_NONE. This is not the case with other HAS_SNOOP >> platforms. We >>        * might need to revisit this as we add new discrete platforms. >> -     * >> -     * XXX: Consider doing a vmap flush or something, where possible. >> -     * Currently we just do a heavy handed wbinvd_on_all_cpus() here >> since >> -     * the underlying sg_table might not even point to struct pages, >> so we >> -     * can't just call drm_clflush_sg or similar, like we do >> elsewhere in >> -     * the driver. >>        */ >>       if (i915_gem_object_can_bypass_llc(obj) || >>           (!HAS_LLC(i915) && !IS_DG1(i915))) >> -        wbinvd_on_all_cpus(); >> +        drm_clflush_sg(pages); > > And as noticed before, drm_clfush_sg still can call wbinvd_on_all_cpus > so are you just punting the issue somewhere else? How will it be > solved there? > Instead of calling an x86 asm directly, we are using what's available to use to make the driver more architecture neutral. Agreeing with Thomas, this solution falls within the "prefer range-aware clflush apis", and since some other generation platform doesn't support clflushopt, it will fall back to using wbinvd. > Regards, > > Tvrtko > >>         sg_page_sizes = i915_sg_dma_sizes(pages->sgl); >>       __i915_gem_object_set_pages(obj, pages, sg_page_sizes); From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9B53C433F5 for ; Mon, 21 Mar 2022 16:31:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5262010E3E3; Mon, 21 Mar 2022 16:31:51 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 508B910E3E3; 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Yes, but it seems like there's no regression with IGT . If there's a big hit in performance, or if this solution gets accepted and the bug reports come flying in, we can explore other solutions. But speaking to Dan Vetter, ideal solution would be to avoid any calls directly to wbinvd, and use drm helpers in place. +Daniel for any extra input. >> use drm_clflush_sg to flush the pages for when the GPU wants to read >> from main memory. >> >> Signed-off-by: Michael Cheng >> --- >>   drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 9 ++------- >>   1 file changed, 2 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> index f5062d0c6333..b0a5baaebc43 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c >> @@ -8,6 +8,7 @@ >>   #include >>   #include >>   #include >> +#include >>     #include >>   @@ -250,16 +251,10 @@ static int >> i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj) >>        * DG1 is special here since it still snoops transactions even >> with >>        * CACHE_NONE. This is not the case with other HAS_SNOOP >> platforms. We >>        * might need to revisit this as we add new discrete platforms. >> -     * >> -     * XXX: Consider doing a vmap flush or something, where possible. >> -     * Currently we just do a heavy handed wbinvd_on_all_cpus() here >> since >> -     * the underlying sg_table might not even point to struct pages, >> so we >> -     * can't just call drm_clflush_sg or similar, like we do >> elsewhere in >> -     * the driver. >>        */ >>       if (i915_gem_object_can_bypass_llc(obj) || >>           (!HAS_LLC(i915) && !IS_DG1(i915))) >> -        wbinvd_on_all_cpus(); >> +        drm_clflush_sg(pages); > > And as noticed before, drm_clfush_sg still can call wbinvd_on_all_cpus > so are you just punting the issue somewhere else? How will it be > solved there? > Instead of calling an x86 asm directly, we are using what's available to use to make the driver more architecture neutral. Agreeing with Thomas, this solution falls within the "prefer range-aware clflush apis", and since some other generation platform doesn't support clflushopt, it will fall back to using wbinvd. > Regards, > > Tvrtko > >>         sg_page_sizes = i915_sg_dma_sizes(pages->sgl); >>       __i915_gem_object_set_pages(obj, pages, sg_page_sizes);