From: David Laight <David.Laight@ACULAB.COM>
To: 'Florian Fainelli' <f.fainelli@gmail.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Cc: "davem@davemloft.net" <davem@davemloft.net>,
"opendmb@gmail.com" <opendmb@gmail.com>,
"jaedon.shin@gmail.com" <jaedon.shin@gmail.com>
Subject: RE: [PATCH net-next v2] net: bcmgenet: Use correct I/O accessors
Date: Wed, 30 Aug 2017 11:39:52 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD0069792@AcuExch.aculab.com> (raw)
In-Reply-To: <1504034731-31613-1-git-send-email-f.fainelli@gmail.com>
From: Florian Fainelli
> Sent: 29 August 2017 20:26
> The GENET driver currently uses __raw_{read,write}l which means
> native I/O endian. This works correctly for an ARM LE kernel (default)
> but fails miserably on an ARM BE (BE8) kernel where registers are kept
> little endian, so replace uses with {read,write}l_relaxed here which is
> what we want because this is all performance sensitive code.
...
> + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
> + __raw_writel(value, offset);
> + else
> + writel_relaxed(value, offset);
How do you know that all BE MIPS that might have this driver have
the BE registers of your card?
(Or that all ARM BE systems have LE registers.)
If nothing else the driver code should be predicated on a
condition set by the kernel config that depends on the cpu build
rather than embedding that condition in a lot of drivers
David
next prev parent reply other threads:[~2017-08-30 11:40 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-29 19:25 [PATCH net-next v2] net: bcmgenet: Use correct I/O accessors Florian Fainelli
2017-08-29 23:09 ` David Miller
2017-08-30 11:39 ` David Laight [this message]
2017-08-30 16:00 ` Florian Fainelli
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