[PATCH v2 00/11] arm64: Realtek RTD1295 reset controllers

[PATCH v2 00/11] arm64: Realtek RTD1295 reset controllers

[Andreas Färber]

Hello,

This series adds reset controllers for the Realtek RTD1295 and RTD1195 SoCs.

v2 adopts reset-simple driver and DesignWare bindings as simplification
and covers RTD1195, too.

Note that reset-simple driver would allow to cover RTD1195's reset1-3 in one
DT node, but it only maps the first resource, so RTD1295's reset4 would need
to remain separate due to a gap in between. I've therefore left them all as
separate nodes for now.

Also note that my initial 32-bit arm patch already selects RESET_CONTROLLER,
to avoid needing a separate patch here to add that one line as done for arm64.

If I can take the bindings patches through the Realtek tree then I can squash
the two final DT patches depending on them into the patches added the resets,
otherwise they need to go into v5.6 or be merged via a topic branch.

More experimental patches at:
https://github.com/afaerber/linux/commits/rtd1295-next

Have a lot of fun!

Cheers,
Andreas

v1 -> v2:
* Drop custom reset driver
* Drop "realtek,rtd1295-reset" binding
* Reordered to not depend on irqchip or clk patches
* Extended with RTD1195 patches

Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org

Andreas Färber (11):
  dt-bindings: reset: Add Realtek RTD1295
  dt-bindings: reset: Add Realtek RTD1195
  reset: simple: Keep alphabetical order
  reset: simple: Add Realtek RTD1195/RTD1295
  arm64: realtek: Select reset controller
  arm64: dts: realtek: Add RTD129x reset controller nodes
  arm64: dts: realtek: Add RTD129x UART resets
  ARM: dts: rtd1195: Add reset nodes
  ARM: dts: rtd1195: Add UART resets
  arm64: dts: realtek: Adopt RTD129x reset constants
  ARM: dts: rtd1195: Adopt reset constants

 arch/arm/boot/dts/rtd1195.dtsi              |  27 +++++++
 arch/arm64/Kconfig.platforms                |   1 +
 arch/arm64/boot/dts/realtek/rtd129x.dtsi    |  34 +++++++++
 drivers/reset/Kconfig                       |   5 +-
 include/dt-bindings/reset/realtek,rtd1195.h |  74 +++++++++++++++++++
 include/dt-bindings/reset/realtek,rtd1295.h | 111 ++++++++++++++++++++++++++++
 6 files changed, 250 insertions(+), 2 deletions(-)
 create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h
 create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

-- 
2.16.4

[PATCH v2 00/11] arm64: Realtek RTD1295 reset controllers

[Andreas Färber]

Hello,

This series adds reset controllers for the Realtek RTD1295 and RTD1195 SoCs.

v2 adopts reset-simple driver and DesignWare bindings as simplification
and covers RTD1195, too.

Note that reset-simple driver would allow to cover RTD1195's reset1-3 in one
DT node, but it only maps the first resource, so RTD1295's reset4 would need
to remain separate due to a gap in between. I've therefore left them all as
separate nodes for now.

Also note that my initial 32-bit arm patch already selects RESET_CONTROLLER,
to avoid needing a separate patch here to add that one line as done for arm64.

If I can take the bindings patches through the Realtek tree then I can squash
the two final DT patches depending on them into the patches added the resets,
otherwise they need to go into v5.6 or be merged via a topic branch.

More experimental patches at:
https://github.com/afaerber/linux/commits/rtd1295-next

Have a lot of fun!

Cheers,
Andreas

v1 -> v2:
* Drop custom reset driver
* Drop "realtek,rtd1295-reset" binding
* Reordered to not depend on irqchip or clk patches
* Extended with RTD1195 patches

Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org

Andreas Färber (11):
  dt-bindings: reset: Add Realtek RTD1295
  dt-bindings: reset: Add Realtek RTD1195
  reset: simple: Keep alphabetical order
  reset: simple: Add Realtek RTD1195/RTD1295
  arm64: realtek: Select reset controller
  arm64: dts: realtek: Add RTD129x reset controller nodes
  arm64: dts: realtek: Add RTD129x UART resets
  ARM: dts: rtd1195: Add reset nodes
  ARM: dts: rtd1195: Add UART resets
  arm64: dts: realtek: Adopt RTD129x reset constants
  ARM: dts: rtd1195: Adopt reset constants

 arch/arm/boot/dts/rtd1195.dtsi              |  27 +++++++
 arch/arm64/Kconfig.platforms                |   1 +
 arch/arm64/boot/dts/realtek/rtd129x.dtsi    |  34 +++++++++
 drivers/reset/Kconfig                       |   5 +-
 include/dt-bindings/reset/realtek,rtd1195.h |  74 +++++++++++++++++++
 include/dt-bindings/reset/realtek,rtd1295.h | 111 ++++++++++++++++++++++++++++
 6 files changed, 250 insertions(+), 2 deletions(-)
 create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h
 create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

-- 
2.16.4


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[PATCH v2 01/11] dt-bindings: reset: Add Realtek RTD1295

[Andreas Färber]

Add a header with symbolic reset indices for Realtek RTD1295 SoC.
Naming was derived from reset-names in an OEM's Device Tree.

Acked-by: Rob Herring <robh@kernel.org>
[AF: Dropped RTD1295 specific binding definition, updated SPDX]
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Dropped textual binding with new compatible
 * Updated SPDX-License-Identifier location
 * Updated to SPDX 2.0
 * Changed from MIT to BSD (Rob)
 
 include/dt-bindings/reset/realtek,rtd1295.h | 111 ++++++++++++++++++++++++++++
 1 file changed, 111 insertions(+)
 create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

diff --git a/include/dt-bindings/reset/realtek,rtd1295.h b/include/dt-bindings/reset/realtek,rtd1295.h
new file mode 100644
index 000000000000..2c0cb6afe816
--- /dev/null
+++ b/include/dt-bindings/reset/realtek,rtd1295.h
@@ -0,0 +1,111 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/*
+ * Realtek RTD1295 reset controllers
+ *
+ * Copyright (c) 2017 Andreas Färber
+ */
+#ifndef DT_BINDINGS_RESET_RTD1295_H
+#define DT_BINDINGS_RESET_RTD1295_H
+
+/* soft reset 1 */
+#define RTD1295_RSTN_MISC		0
+#define RTD1295_RSTN_NAT		1
+#define RTD1295_RSTN_USB3_PHY0_POW	2
+#define RTD1295_RSTN_GSPI		3
+#define RTD1295_RSTN_USB3_P0_MDIO	4
+#define RTD1295_RSTN_SATA_0		5
+#define RTD1295_RSTN_USB		6
+#define RTD1295_RSTN_SATA_PHY_0		7
+#define RTD1295_RSTN_USB_PHY0		8
+#define RTD1295_RSTN_USB_PHY1		9
+#define RTD1295_RSTN_SATA_PHY_POW_0	10
+#define RTD1295_RSTN_SATA_FUNC_EXIST_0	11
+#define RTD1295_RSTN_HDMI		12
+#define RTD1295_RSTN_VE1		13
+#define RTD1295_RSTN_VE2		14
+#define RTD1295_RSTN_VE3		15
+#define RTD1295_RSTN_ETN		16
+#define RTD1295_RSTN_AIO		17
+#define RTD1295_RSTN_GPU		18
+#define RTD1295_RSTN_TVE		19
+#define RTD1295_RSTN_VO			20
+#define RTD1295_RSTN_LVDS		21
+#define RTD1295_RSTN_SE			22
+#define RTD1295_RSTN_DCU		23
+#define RTD1295_RSTN_DC_PHY		24
+#define RTD1295_RSTN_CP			25
+#define RTD1295_RSTN_MD			26
+#define RTD1295_RSTN_TP			27
+#define RTD1295_RSTN_AE			28
+#define RTD1295_RSTN_NF			29
+#define RTD1295_RSTN_MIPI		30
+#define RTD1295_RSTN_RSA		31
+
+/* soft reset 2 */
+#define RTD1295_RSTN_ACPU		0
+#define RTD1295_RSTN_JPEG		1
+#define RTD1295_RSTN_USB_PHY3		2
+#define RTD1295_RSTN_USB_PHY2		3
+#define RTD1295_RSTN_USB3_PHY1_POW	4
+#define RTD1295_RSTN_USB3_P1_MDIO	5
+#define RTD1295_RSTN_PCIE0_STITCH	6
+#define RTD1295_RSTN_PCIE0_PHY		7
+#define RTD1295_RSTN_PCIE0		8
+#define RTD1295_RSTN_PCR_CNT		9
+#define RTD1295_RSTN_CR			10
+#define RTD1295_RSTN_EMMC		11
+#define RTD1295_RSTN_SDIO		12
+#define RTD1295_RSTN_PCIE0_CORE		13
+#define RTD1295_RSTN_PCIE0_POWER	14
+#define RTD1295_RSTN_PCIE0_NONSTICH	15
+#define RTD1295_RSTN_PCIE1_PHY		16
+#define RTD1295_RSTN_PCIE1		17
+#define RTD1295_RSTN_I2C_5		18
+#define RTD1295_RSTN_PCIE1_STITCH	19
+#define RTD1295_RSTN_PCIE1_CORE		20
+#define RTD1295_RSTN_PCIE1_POWER	21
+#define RTD1295_RSTN_PCIE1_NONSTICH	22
+#define RTD1295_RSTN_I2C_4		23
+#define RTD1295_RSTN_I2C_3		24
+#define RTD1295_RSTN_I2C_2		25
+#define RTD1295_RSTN_I2C_1		26
+#define RTD1295_RSTN_UR2		27
+#define RTD1295_RSTN_UR1		28
+#define RTD1295_RSTN_MISC_SC		29
+#define RTD1295_RSTN_CBUS_TX		30
+#define RTD1295_RSTN_SDS_PHY		31
+
+/* soft reset 4 */
+#define RTD1295_RSTN_DCPHY_CRT		0
+#define RTD1295_RSTN_DCPHY_ALERT_RX	1
+#define RTD1295_RSTN_DCPHY_PTR		2
+#define RTD1295_RSTN_DCPHY_LDO		3
+#define RTD1295_RSTN_DCPHY_SSC_DIG	4
+#define RTD1295_RSTN_HDMIRX		5
+#define RTD1295_RSTN_CBUSRX		6
+#define RTD1295_RSTN_SATA_PHY_POW_1	7
+#define RTD1295_RSTN_SATA_FUNC_EXIST_1	8
+#define RTD1295_RSTN_SATA_PHY_1		9
+#define RTD1295_RSTN_SATA_1		10
+#define RTD1295_RSTN_FAN		11
+#define RTD1295_RSTN_HDMIRX_WRAP	12
+#define RTD1295_RSTN_PCIE0_PHY_MDIO	13
+#define RTD1295_RSTN_PCIE1_PHY_MDIO	14
+#define RTD1295_RSTN_DISP		15
+
+/* iso reset */
+#define RTD1295_ISO_RSTN_IR		1
+#define RTD1295_ISO_RSTN_CEC0		2
+#define RTD1295_ISO_RSTN_CEC1		3
+#define RTD1295_ISO_RSTN_DP		4
+#define RTD1295_ISO_RSTN_CBUSTX		5
+#define RTD1295_ISO_RSTN_CBUSRX		6
+#define RTD1295_ISO_RSTN_EFUSE		7
+#define RTD1295_ISO_RSTN_UR0		8
+#define RTD1295_ISO_RSTN_GMAC		9
+#define RTD1295_ISO_RSTN_GPHY		10
+#define RTD1295_ISO_RSTN_I2C_0		11
+#define RTD1295_ISO_RSTN_I2C_1		12
+#define RTD1295_ISO_RSTN_CBUS		13
+
+#endif
-- 
2.16.4

[PATCH v2 01/11] dt-bindings: reset: Add Realtek RTD1295

[Andreas Färber]

Add a header with symbolic reset indices for Realtek RTD1295 SoC.
Naming was derived from reset-names in an OEM's Device Tree.

Acked-by: Rob Herring <robh@kernel.org>
[AF: Dropped RTD1295 specific binding definition, updated SPDX]
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Dropped textual binding with new compatible
 * Updated SPDX-License-Identifier location
 * Updated to SPDX 2.0
 * Changed from MIT to BSD (Rob)
 
 include/dt-bindings/reset/realtek,rtd1295.h | 111 ++++++++++++++++++++++++++++
 1 file changed, 111 insertions(+)
 create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

diff --git a/include/dt-bindings/reset/realtek,rtd1295.h b/include/dt-bindings/reset/realtek,rtd1295.h
new file mode 100644
index 000000000000..2c0cb6afe816
--- /dev/null
+++ b/include/dt-bindings/reset/realtek,rtd1295.h
@@ -0,0 +1,111 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/*
+ * Realtek RTD1295 reset controllers
+ *
+ * Copyright (c) 2017 Andreas Färber
+ */
+#ifndef DT_BINDINGS_RESET_RTD1295_H
+#define DT_BINDINGS_RESET_RTD1295_H
+
+/* soft reset 1 */
+#define RTD1295_RSTN_MISC		0
+#define RTD1295_RSTN_NAT		1
+#define RTD1295_RSTN_USB3_PHY0_POW	2
+#define RTD1295_RSTN_GSPI		3
+#define RTD1295_RSTN_USB3_P0_MDIO	4
+#define RTD1295_RSTN_SATA_0		5
+#define RTD1295_RSTN_USB		6
+#define RTD1295_RSTN_SATA_PHY_0		7
+#define RTD1295_RSTN_USB_PHY0		8
+#define RTD1295_RSTN_USB_PHY1		9
+#define RTD1295_RSTN_SATA_PHY_POW_0	10
+#define RTD1295_RSTN_SATA_FUNC_EXIST_0	11
+#define RTD1295_RSTN_HDMI		12
+#define RTD1295_RSTN_VE1		13
+#define RTD1295_RSTN_VE2		14
+#define RTD1295_RSTN_VE3		15
+#define RTD1295_RSTN_ETN		16
+#define RTD1295_RSTN_AIO		17
+#define RTD1295_RSTN_GPU		18
+#define RTD1295_RSTN_TVE		19
+#define RTD1295_RSTN_VO			20
+#define RTD1295_RSTN_LVDS		21
+#define RTD1295_RSTN_SE			22
+#define RTD1295_RSTN_DCU		23
+#define RTD1295_RSTN_DC_PHY		24
+#define RTD1295_RSTN_CP			25
+#define RTD1295_RSTN_MD			26
+#define RTD1295_RSTN_TP			27
+#define RTD1295_RSTN_AE			28
+#define RTD1295_RSTN_NF			29
+#define RTD1295_RSTN_MIPI		30
+#define RTD1295_RSTN_RSA		31
+
+/* soft reset 2 */
+#define RTD1295_RSTN_ACPU		0
+#define RTD1295_RSTN_JPEG		1
+#define RTD1295_RSTN_USB_PHY3		2
+#define RTD1295_RSTN_USB_PHY2		3
+#define RTD1295_RSTN_USB3_PHY1_POW	4
+#define RTD1295_RSTN_USB3_P1_MDIO	5
+#define RTD1295_RSTN_PCIE0_STITCH	6
+#define RTD1295_RSTN_PCIE0_PHY		7
+#define RTD1295_RSTN_PCIE0		8
+#define RTD1295_RSTN_PCR_CNT		9
+#define RTD1295_RSTN_CR			10
+#define RTD1295_RSTN_EMMC		11
+#define RTD1295_RSTN_SDIO		12
+#define RTD1295_RSTN_PCIE0_CORE		13
+#define RTD1295_RSTN_PCIE0_POWER	14
+#define RTD1295_RSTN_PCIE0_NONSTICH	15
+#define RTD1295_RSTN_PCIE1_PHY		16
+#define RTD1295_RSTN_PCIE1		17
+#define RTD1295_RSTN_I2C_5		18
+#define RTD1295_RSTN_PCIE1_STITCH	19
+#define RTD1295_RSTN_PCIE1_CORE		20
+#define RTD1295_RSTN_PCIE1_POWER	21
+#define RTD1295_RSTN_PCIE1_NONSTICH	22
+#define RTD1295_RSTN_I2C_4		23
+#define RTD1295_RSTN_I2C_3		24
+#define RTD1295_RSTN_I2C_2		25
+#define RTD1295_RSTN_I2C_1		26
+#define RTD1295_RSTN_UR2		27
+#define RTD1295_RSTN_UR1		28
+#define RTD1295_RSTN_MISC_SC		29
+#define RTD1295_RSTN_CBUS_TX		30
+#define RTD1295_RSTN_SDS_PHY		31
+
+/* soft reset 4 */
+#define RTD1295_RSTN_DCPHY_CRT		0
+#define RTD1295_RSTN_DCPHY_ALERT_RX	1
+#define RTD1295_RSTN_DCPHY_PTR		2
+#define RTD1295_RSTN_DCPHY_LDO		3
+#define RTD1295_RSTN_DCPHY_SSC_DIG	4
+#define RTD1295_RSTN_HDMIRX		5
+#define RTD1295_RSTN_CBUSRX		6
+#define RTD1295_RSTN_SATA_PHY_POW_1	7
+#define RTD1295_RSTN_SATA_FUNC_EXIST_1	8
+#define RTD1295_RSTN_SATA_PHY_1		9
+#define RTD1295_RSTN_SATA_1		10
+#define RTD1295_RSTN_FAN		11
+#define RTD1295_RSTN_HDMIRX_WRAP	12
+#define RTD1295_RSTN_PCIE0_PHY_MDIO	13
+#define RTD1295_RSTN_PCIE1_PHY_MDIO	14
+#define RTD1295_RSTN_DISP		15
+
+/* iso reset */
+#define RTD1295_ISO_RSTN_IR		1
+#define RTD1295_ISO_RSTN_CEC0		2
+#define RTD1295_ISO_RSTN_CEC1		3
+#define RTD1295_ISO_RSTN_DP		4
+#define RTD1295_ISO_RSTN_CBUSTX		5
+#define RTD1295_ISO_RSTN_CBUSRX		6
+#define RTD1295_ISO_RSTN_EFUSE		7
+#define RTD1295_ISO_RSTN_UR0		8
+#define RTD1295_ISO_RSTN_GMAC		9
+#define RTD1295_ISO_RSTN_GPHY		10
+#define RTD1295_ISO_RSTN_I2C_0		11
+#define RTD1295_ISO_RSTN_I2C_1		12
+#define RTD1295_ISO_RSTN_CBUS		13
+
+#endif
-- 
2.16.4


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[PATCH v2 02/11] dt-bindings: reset: Add Realtek RTD1195

[Andreas Färber]

Add a header with symbolic reset indices for Realtek RTD1195 SoC.
Naming was derived from BSP register description headers.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 include/dt-bindings/reset/realtek,rtd1195.h | 74 +++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h

diff --git a/include/dt-bindings/reset/realtek,rtd1195.h b/include/dt-bindings/reset/realtek,rtd1195.h
new file mode 100644
index 000000000000..27902abf935b
--- /dev/null
+++ b/include/dt-bindings/reset/realtek,rtd1195.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/*
+ * Realtek RTD1195 reset controllers
+ *
+ * Copyright (c) 2017 Andreas Färber
+ */
+#ifndef DT_BINDINGS_RESET_RTD1195_H
+#define DT_BINDINGS_RESET_RTD1195_H
+
+/* soft reset 1 */
+#define RTD1195_RSTN_MISC		0
+#define RTD1195_RSTN_RNG		1
+#define RTD1195_RSTN_USB3_POW		2
+#define RTD1195_RSTN_GSPI		3
+#define RTD1195_RSTN_USB3_P0_MDIO	4
+#define RTD1195_RSTN_VE_H265		5
+#define RTD1195_RSTN_USB		6
+#define RTD1195_RSTN_USB_PHY0		8
+#define RTD1195_RSTN_USB_PHY1		9
+#define RTD1195_RSTN_HDMIRX		11
+#define RTD1195_RSTN_HDMI		12
+#define RTD1195_RSTN_ETN		14
+#define RTD1195_RSTN_AIO		15
+#define RTD1195_RSTN_GPU		16
+#define RTD1195_RSTN_VE_H264		17
+#define RTD1195_RSTN_VE_JPEG		18
+#define RTD1195_RSTN_TVE		19
+#define RTD1195_RSTN_VO			20
+#define RTD1195_RSTN_LVDS		21
+#define RTD1195_RSTN_SE			22
+#define RTD1195_RSTN_DCU		23
+#define RTD1195_RSTN_DC_PHY		24
+#define RTD1195_RSTN_CP			25
+#define RTD1195_RSTN_MD			26
+#define RTD1195_RSTN_TP			27
+#define RTD1195_RSTN_AE			28
+#define RTD1195_RSTN_NF			29
+#define RTD1195_RSTN_MIPI		30
+
+/* soft reset 2 */
+#define RTD1195_RSTN_ACPU		0
+#define RTD1195_RSTN_VCPU		1
+#define RTD1195_RSTN_PCR		9
+#define RTD1195_RSTN_CR			10
+#define RTD1195_RSTN_EMMC		11
+#define RTD1195_RSTN_SDIO		12
+#define RTD1195_RSTN_I2C_5		18
+#define RTD1195_RSTN_RTC		20
+#define RTD1195_RSTN_I2C_4		23
+#define RTD1195_RSTN_I2C_3		24
+#define RTD1195_RSTN_I2C_2		25
+#define RTD1195_RSTN_I2C_1		26
+#define RTD1195_RSTN_UR1		28
+
+/* soft reset 3 */
+#define RTD1195_RSTN_SB2		0
+
+/* iso soft reset */
+#define RTD1195_ISO_RSTN_VFD		0
+#define RTD1195_ISO_RSTN_IR		1
+#define RTD1195_ISO_RSTN_CEC0		2
+#define RTD1195_ISO_RSTN_CEC1		3
+#define RTD1195_ISO_RSTN_DP		4
+#define RTD1195_ISO_RSTN_CBUSTX		5
+#define RTD1195_ISO_RSTN_CBUSRX		6
+#define RTD1195_ISO_RSTN_EFUSE		7
+#define RTD1195_ISO_RSTN_UR0		8
+#define RTD1195_ISO_RSTN_GMAC		9
+#define RTD1195_ISO_RSTN_GPHY		10
+#define RTD1195_ISO_RSTN_I2C_0		11
+#define RTD1195_ISO_RSTN_I2C_6		12
+#define RTD1195_ISO_RSTN_CBUS		13
+
+#endif
-- 
2.16.4

[PATCH v2 02/11] dt-bindings: reset: Add Realtek RTD1195

[Andreas Färber]

Add a header with symbolic reset indices for Realtek RTD1195 SoC.
Naming was derived from BSP register description headers.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 include/dt-bindings/reset/realtek,rtd1195.h | 74 +++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h

diff --git a/include/dt-bindings/reset/realtek,rtd1195.h b/include/dt-bindings/reset/realtek,rtd1195.h
new file mode 100644
index 000000000000..27902abf935b
--- /dev/null
+++ b/include/dt-bindings/reset/realtek,rtd1195.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/*
+ * Realtek RTD1195 reset controllers
+ *
+ * Copyright (c) 2017 Andreas Färber
+ */
+#ifndef DT_BINDINGS_RESET_RTD1195_H
+#define DT_BINDINGS_RESET_RTD1195_H
+
+/* soft reset 1 */
+#define RTD1195_RSTN_MISC		0
+#define RTD1195_RSTN_RNG		1
+#define RTD1195_RSTN_USB3_POW		2
+#define RTD1195_RSTN_GSPI		3
+#define RTD1195_RSTN_USB3_P0_MDIO	4
+#define RTD1195_RSTN_VE_H265		5
+#define RTD1195_RSTN_USB		6
+#define RTD1195_RSTN_USB_PHY0		8
+#define RTD1195_RSTN_USB_PHY1		9
+#define RTD1195_RSTN_HDMIRX		11
+#define RTD1195_RSTN_HDMI		12
+#define RTD1195_RSTN_ETN		14
+#define RTD1195_RSTN_AIO		15
+#define RTD1195_RSTN_GPU		16
+#define RTD1195_RSTN_VE_H264		17
+#define RTD1195_RSTN_VE_JPEG		18
+#define RTD1195_RSTN_TVE		19
+#define RTD1195_RSTN_VO			20
+#define RTD1195_RSTN_LVDS		21
+#define RTD1195_RSTN_SE			22
+#define RTD1195_RSTN_DCU		23
+#define RTD1195_RSTN_DC_PHY		24
+#define RTD1195_RSTN_CP			25
+#define RTD1195_RSTN_MD			26
+#define RTD1195_RSTN_TP			27
+#define RTD1195_RSTN_AE			28
+#define RTD1195_RSTN_NF			29
+#define RTD1195_RSTN_MIPI		30
+
+/* soft reset 2 */
+#define RTD1195_RSTN_ACPU		0
+#define RTD1195_RSTN_VCPU		1
+#define RTD1195_RSTN_PCR		9
+#define RTD1195_RSTN_CR			10
+#define RTD1195_RSTN_EMMC		11
+#define RTD1195_RSTN_SDIO		12
+#define RTD1195_RSTN_I2C_5		18
+#define RTD1195_RSTN_RTC		20
+#define RTD1195_RSTN_I2C_4		23
+#define RTD1195_RSTN_I2C_3		24
+#define RTD1195_RSTN_I2C_2		25
+#define RTD1195_RSTN_I2C_1		26
+#define RTD1195_RSTN_UR1		28
+
+/* soft reset 3 */
+#define RTD1195_RSTN_SB2		0
+
+/* iso soft reset */
+#define RTD1195_ISO_RSTN_VFD		0
+#define RTD1195_ISO_RSTN_IR		1
+#define RTD1195_ISO_RSTN_CEC0		2
+#define RTD1195_ISO_RSTN_CEC1		3
+#define RTD1195_ISO_RSTN_DP		4
+#define RTD1195_ISO_RSTN_CBUSTX		5
+#define RTD1195_ISO_RSTN_CBUSRX		6
+#define RTD1195_ISO_RSTN_EFUSE		7
+#define RTD1195_ISO_RSTN_UR0		8
+#define RTD1195_ISO_RSTN_GMAC		9
+#define RTD1195_ISO_RSTN_GPHY		10
+#define RTD1195_ISO_RSTN_I2C_0		11
+#define RTD1195_ISO_RSTN_I2C_6		12
+#define RTD1195_ISO_RSTN_CBUS		13
+
+#endif
-- 
2.16.4


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[PATCH v2 03/11] reset: simple: Keep alphabetical order

[Andreas Färber]

Restore alphabetical order for Kconfig dependencies and help text.
Compatibles got out of order too, but no functional change done here.

Goal is to make it obvious where to add new platforms.

Fixes: 64c47b624f64 ("reset: Add reset controller support for BM1880 SoC")
Fixes: 1d7592f84f92 ("reset: simple: Enable for ASPEED systems")
Fixes: 96a2f50305d1 ("reset: build simple reset controller driver for Agilex")
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New (prepares for following patch extending it to Realtek)
 
 drivers/reset/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 46f7986c3587..fac356a9b818 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -129,7 +129,7 @@ config RESET_SCMI
 
 config RESET_SIMPLE
 	bool "Simple Reset Controller Driver" if COMPILE_TEST
-	default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC || ARCH_AGILEX
+	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
 	help
 	  This enables a simple reset controller driver for reset lines that
 	  that can be asserted and deasserted by toggling bits in a contiguous,
@@ -138,10 +138,10 @@ config RESET_SIMPLE
 	  Currently this driver supports:
 	   - Altera SoCFPGAs
 	   - ASPEED BMC SoCs
+	   - Bitmain BM1880 SoC
 	   - RCC reset controller in STM32 MCUs
 	   - Allwinner SoCs
 	   - ZTE's zx2967 family
-	   - Bitmain BM1880 SoC
 
 config RESET_STM32MP157
 	bool "STM32MP157 Reset Driver" if COMPILE_TEST
-- 
2.16.4

[PATCH v2 03/11] reset: simple: Keep alphabetical order

[Andreas Färber]

Restore alphabetical order for Kconfig dependencies and help text.
Compatibles got out of order too, but no functional change done here.

Goal is to make it obvious where to add new platforms.

Fixes: 64c47b624f64 ("reset: Add reset controller support for BM1880 SoC")
Fixes: 1d7592f84f92 ("reset: simple: Enable for ASPEED systems")
Fixes: 96a2f50305d1 ("reset: build simple reset controller driver for Agilex")
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New (prepares for following patch extending it to Realtek)
 
 drivers/reset/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 46f7986c3587..fac356a9b818 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -129,7 +129,7 @@ config RESET_SCMI
 
 config RESET_SIMPLE
 	bool "Simple Reset Controller Driver" if COMPILE_TEST
-	default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC || ARCH_AGILEX
+	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
 	help
 	  This enables a simple reset controller driver for reset lines that
 	  that can be asserted and deasserted by toggling bits in a contiguous,
@@ -138,10 +138,10 @@ config RESET_SIMPLE
 	  Currently this driver supports:
 	   - Altera SoCFPGAs
 	   - ASPEED BMC SoCs
+	   - Bitmain BM1880 SoC
 	   - RCC reset controller in STM32 MCUs
 	   - Allwinner SoCs
 	   - ZTE's zx2967 family
-	   - Bitmain BM1880 SoC
 
 config RESET_STM32MP157
 	bool "STM32MP157 Reset Driver" if COMPILE_TEST
-- 
2.16.4


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[PATCH v2 04/11] reset: simple: Add Realtek RTD1195/RTD1295

[Andreas Färber]

Enable RESET_SIMPLE for ARCH_REALTEK.
They can reuse the DesignWare bindings to avoid a new compatible.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Instead of adding a new driver, reuse reset-simple (Philipp)
 
 drivers/reset/Kconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index fac356a9b818..3ad7817ce1f0 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -129,7 +129,7 @@ config RESET_SCMI
 
 config RESET_SIMPLE
 	bool "Simple Reset Controller Driver" if COMPILE_TEST
-	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
+	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
 	help
 	  This enables a simple reset controller driver for reset lines that
 	  that can be asserted and deasserted by toggling bits in a contiguous,
@@ -139,6 +139,7 @@ config RESET_SIMPLE
 	   - Altera SoCFPGAs
 	   - ASPEED BMC SoCs
 	   - Bitmain BM1880 SoC
+	   - Realtek SoCs
 	   - RCC reset controller in STM32 MCUs
 	   - Allwinner SoCs
 	   - ZTE's zx2967 family
-- 
2.16.4

[PATCH v2 04/11] reset: simple: Add Realtek RTD1195/RTD1295

[Andreas Färber]

Enable RESET_SIMPLE for ARCH_REALTEK.
They can reuse the DesignWare bindings to avoid a new compatible.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Instead of adding a new driver, reuse reset-simple (Philipp)
 
 drivers/reset/Kconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index fac356a9b818..3ad7817ce1f0 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -129,7 +129,7 @@ config RESET_SCMI
 
 config RESET_SIMPLE
 	bool "Simple Reset Controller Driver" if COMPILE_TEST
-	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
+	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
 	help
 	  This enables a simple reset controller driver for reset lines that
 	  that can be asserted and deasserted by toggling bits in a contiguous,
@@ -139,6 +139,7 @@ config RESET_SIMPLE
 	   - Altera SoCFPGAs
 	   - ASPEED BMC SoCs
 	   - Bitmain BM1880 SoC
+	   - Realtek SoCs
 	   - RCC reset controller in STM32 MCUs
 	   - Allwinner SoCs
 	   - ZTE's zx2967 family
-- 
2.16.4


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[PATCH v2 05/11] arm64: realtek: Select reset controller

[Andreas Färber]

Select RESET_CONTROLLER for ARCH_REALTEK.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm64/Kconfig.platforms | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 63b463b88040..90d3c04ebff0 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -189,6 +189,7 @@ config ARCH_QCOM
 
 config ARCH_REALTEK
 	bool "Realtek Platforms"
+	select RESET_CONTROLLER
 	help
 	  This enables support for the ARMv8 based Realtek chipsets,
 	  like the RTD1295.
-- 
2.16.4

[PATCH v2 05/11] arm64: realtek: Select reset controller

[Andreas Färber]

Select RESET_CONTROLLER for ARCH_REALTEK.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm64/Kconfig.platforms | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 63b463b88040..90d3c04ebff0 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -189,6 +189,7 @@ config ARCH_QCOM
 
 config ARCH_REALTEK
 	bool "Realtek Platforms"
+	select RESET_CONTROLLER
 	help
 	  This enables support for the ARMv8 based Realtek chipsets,
 	  like the RTD1295.
-- 
2.16.4


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[PATCH v2 06/11] arm64: dts: realtek: Add RTD129x reset controller nodes

[Andreas Färber]

Add nodes for the Realtek RTD1295 reset controllers.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
 
 arch/arm64/boot/dts/realtek/rtd129x.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
index 0b2ac0c33b8b..282ab8bfaad1 100644
--- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
@@ -37,6 +37,36 @@
 		/* Exclude up to 2 GiB of RAM */
 		ranges = <0x80000000 0x80000000 0x80000000>;
 
+		reset1: reset-controller@98000000 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000000 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset2: reset-controller@98000004 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000004 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset3: reset-controller@98000008 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000008 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset4: reset-controller@98000050 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000050 0x4>;
+			#reset-cells = <1>;
+		};
+
+		iso_reset: reset-controller@98007088 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98007088 0x4>;
+			#reset-cells = <1>;
+		};
+
 		wdt: watchdog@98007680 {
 			compatible = "realtek,rtd1295-watchdog";
 			reg = <0x98007680 0x100>;
-- 
2.16.4

[PATCH v2 06/11] arm64: dts: realtek: Add RTD129x reset controller nodes

[Andreas Färber]

Add nodes for the Realtek RTD1295 reset controllers.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
 
 arch/arm64/boot/dts/realtek/rtd129x.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
index 0b2ac0c33b8b..282ab8bfaad1 100644
--- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
@@ -37,6 +37,36 @@
 		/* Exclude up to 2 GiB of RAM */
 		ranges = <0x80000000 0x80000000 0x80000000>;
 
+		reset1: reset-controller@98000000 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000000 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset2: reset-controller@98000004 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000004 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset3: reset-controller@98000008 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000008 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset4: reset-controller@98000050 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98000050 0x4>;
+			#reset-cells = <1>;
+		};
+
+		iso_reset: reset-controller@98007088 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x98007088 0x4>;
+			#reset-cells = <1>;
+		};
+
 		wdt: watchdog@98007680 {
 			compatible = "realtek,rtd1295-watchdog";
 			reg = <0x98007680 0x100>;
-- 
2.16.4


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[PATCH v2 07/11] arm64: dts: realtek: Add RTD129x UART resets

[Andreas Färber]

Associate the UART nodes with the corresponding reset controller bits.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
 
 arch/arm64/boot/dts/realtek/rtd129x.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
index 282ab8bfaad1..15d321d9515c 100644
--- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
@@ -79,6 +79,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <27000000>;
+			resets = <&iso_reset 8>;
 			status = "disabled";
 		};
 
@@ -88,6 +89,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
+			resets = <&reset2 28>;
 			status = "disabled";
 		};
 
@@ -97,6 +99,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
+			resets = <&reset2 27>;
 			status = "disabled";
 		};
 
-- 
2.16.4

[PATCH v2 07/11] arm64: dts: realtek: Add RTD129x UART resets

[Andreas Färber]

Associate the UART nodes with the corresponding reset controller bits.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
 
 arch/arm64/boot/dts/realtek/rtd129x.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
index 282ab8bfaad1..15d321d9515c 100644
--- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
@@ -79,6 +79,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <27000000>;
+			resets = <&iso_reset 8>;
 			status = "disabled";
 		};
 
@@ -88,6 +89,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
+			resets = <&reset2 28>;
 			status = "disabled";
 		};
 
@@ -97,6 +99,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
+			resets = <&reset2 27>;
 			status = "disabled";
 		};
 
-- 
2.16.4


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[PATCH v2 08/11] ARM: dts: rtd1195: Add reset nodes

[Andreas Färber]

Add reset controller nodes for Realtek RTD1195 SoC.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm/boot/dts/rtd1195.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index 475740c67d26..fdcaf48a26f2 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -93,6 +93,30 @@
 		#size-cells = <1>;
 		ranges;
 
+		reset1: reset-controller@18000000 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18000000 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset2: reset-controller@18000004 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18000004 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset3: reset-controller@18000008 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18000008 0x4>;
+			#reset-cells = <1>;
+		};
+
+		iso_reset: reset-controller@18007088 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18007088 0x4>;
+			#reset-cells = <1>;
+		};
+
 		wdt: watchdog@18007680 {
 			compatible = "realtek,rtd1295-watchdog";
 			reg = <0x18007680 0x100>;
-- 
2.16.4

[PATCH v2 08/11] ARM: dts: rtd1195: Add reset nodes

[Andreas Färber]

Add reset controller nodes for Realtek RTD1195 SoC.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm/boot/dts/rtd1195.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index 475740c67d26..fdcaf48a26f2 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -93,6 +93,30 @@
 		#size-cells = <1>;
 		ranges;
 
+		reset1: reset-controller@18000000 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18000000 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset2: reset-controller@18000004 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18000004 0x4>;
+			#reset-cells = <1>;
+		};
+
+		reset3: reset-controller@18000008 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18000008 0x4>;
+			#reset-cells = <1>;
+		};
+
+		iso_reset: reset-controller@18007088 {
+			compatible = "snps,dw-low-reset";
+			reg = <0x18007088 0x4>;
+			#reset-cells = <1>;
+		};
+
 		wdt: watchdog@18007680 {
 			compatible = "realtek,rtd1295-watchdog";
 			reg = <0x18007680 0x100>;
-- 
2.16.4


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[PATCH v2 09/11] ARM: dts: rtd1195: Add UART resets

[Andreas Färber]

Associate the UART nodes with the corresponding reset controller bits.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm/boot/dts/rtd1195.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index fdcaf48a26f2..e2cdcbcf70f4 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -128,6 +128,7 @@
 			reg = <0x18007800 0x400>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			resets = <&iso_reset 8>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
@@ -137,6 +138,7 @@
 			reg = <0x1801b200 0x100>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			resets = <&reset2 28>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
-- 
2.16.4

[PATCH v2 09/11] ARM: dts: rtd1195: Add UART resets

[Andreas Färber]

Associate the UART nodes with the corresponding reset controller bits.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm/boot/dts/rtd1195.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index fdcaf48a26f2..e2cdcbcf70f4 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -128,6 +128,7 @@
 			reg = <0x18007800 0x400>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			resets = <&iso_reset 8>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
@@ -137,6 +138,7 @@
 			reg = <0x1801b200 0x100>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			resets = <&reset2 28>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
-- 
2.16.4


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[PATCH v2 10/11] arm64: dts: realtek: Adopt RTD129x reset constants

[Andreas Färber]

Replace reset controller indices with constants.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2: Unchanged
 
 arch/arm64/boot/dts/realtek/rtd129x.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
index 15d321d9515c..4433114476f5 100644
--- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
@@ -12,6 +12,7 @@
 /memreserve/	0x0000000001ffe000 0x0000000000004000;
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/realtek,rtd1295.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -79,7 +80,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <27000000>;
-			resets = <&iso_reset 8>;
+			resets = <&iso_reset RTD1295_ISO_RSTN_UR0>;
 			status = "disabled";
 		};
 
@@ -89,7 +90,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
-			resets = <&reset2 28>;
+			resets = <&reset2 RTD1295_RSTN_UR1>;
 			status = "disabled";
 		};
 
@@ -99,7 +100,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
-			resets = <&reset2 27>;
+			resets = <&reset2 RTD1295_RSTN_UR2>;
 			status = "disabled";
 		};
 
-- 
2.16.4

[PATCH v2 10/11] arm64: dts: realtek: Adopt RTD129x reset constants

[Andreas Färber]

Replace reset controller indices with constants.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2: Unchanged
 
 arch/arm64/boot/dts/realtek/rtd129x.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
index 15d321d9515c..4433114476f5 100644
--- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
@@ -12,6 +12,7 @@
 /memreserve/	0x0000000001ffe000 0x0000000000004000;
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/realtek,rtd1295.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -79,7 +80,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <27000000>;
-			resets = <&iso_reset 8>;
+			resets = <&iso_reset RTD1295_ISO_RSTN_UR0>;
 			status = "disabled";
 		};
 
@@ -89,7 +90,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
-			resets = <&reset2 28>;
+			resets = <&reset2 RTD1295_RSTN_UR1>;
 			status = "disabled";
 		};
 
@@ -99,7 +100,7 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			clock-frequency = <432000000>;
-			resets = <&reset2 27>;
+			resets = <&reset2 RTD1295_RSTN_UR2>;
 			status = "disabled";
 		};
 
-- 
2.16.4


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[PATCH v2 11/11] ARM: dts: rtd1195: Adopt reset constants

[Andreas Färber]

Replace reset controller indices with constants.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm/boot/dts/rtd1195.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index e2cdcbcf70f4..9ccf8fa04718 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -13,6 +13,7 @@
 /memreserve/ 0x18100000 0x01000000; /* nor */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/realtek,rtd1195.h>
 
 / {
 	compatible = "realtek,rtd1195";
@@ -128,7 +129,7 @@
 			reg = <0x18007800 0x400>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-			resets = <&iso_reset 8>;
+			resets = <&iso_reset RTD1195_ISO_RSTN_UR0>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
@@ -138,7 +139,7 @@
 			reg = <0x1801b200 0x100>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-			resets = <&reset2 28>;
+			resets = <&reset2 RTD1195_RSTN_UR1>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
-- 
2.16.4

[PATCH v2 11/11] ARM: dts: rtd1195: Adopt reset constants

[Andreas Färber]

Replace reset controller indices with constants.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: New
 
 arch/arm/boot/dts/rtd1195.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index e2cdcbcf70f4..9ccf8fa04718 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -13,6 +13,7 @@
 /memreserve/ 0x18100000 0x01000000; /* nor */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/realtek,rtd1195.h>
 
 / {
 	compatible = "realtek,rtd1195";
@@ -128,7 +129,7 @@
 			reg = <0x18007800 0x400>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-			resets = <&iso_reset 8>;
+			resets = <&iso_reset RTD1195_ISO_RSTN_UR0>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
@@ -138,7 +139,7 @@
 			reg = <0x1801b200 0x100>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-			resets = <&reset2 28>;
+			resets = <&reset2 RTD1195_RSTN_UR1>;
 			clock-frequency = <27000000>;
 			status = "disabled";
 		};
-- 
2.16.4


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Re: [PATCH v2 00/11] arm64: Realtek RTD1295 reset controllers

[Philipp Zabel]

Hi Andreas,

On Wed, 2019-10-23 at 12:13 +0200, Andreas Färber wrote:
> Hello,
> 
> This series adds reset controllers for the Realtek RTD1295 and RTD1195 SoCs.
> 
> v2 adopts reset-simple driver and DesignWare bindings as simplification
> and covers RTD1195, too.
> 
> Note that reset-simple driver would allow to cover RTD1195's reset1-3 in one
> DT node, but it only maps the first resource, so RTD1295's reset4 would need
> to remain separate due to a gap in between. I've therefore left them all as
> separate nodes for now.
> 
> Also note that my initial 32-bit arm patch already selects RESET_CONTROLLER,
> to avoid needing a separate patch here to add that one line as done for arm64.
> 
> If I can take the bindings patches through the Realtek tree then I can squash
> the two final DT patches depending on them into the patches added the resets,
> otherwise they need to go into v5.6 or be merged via a topic branch.

I'm fine with the DT binding patches going in through the Realtek tree,
feel free to add

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

to both. I'll just pick up patches 3 and 4.

regards
Philipp

Re: [PATCH v2 00/11] arm64: Realtek RTD1295 reset controllers

[Philipp Zabel]

Hi Andreas,

On Wed, 2019-10-23 at 12:13 +0200, Andreas Färber wrote:
> Hello,
> 
> This series adds reset controllers for the Realtek RTD1295 and RTD1195 SoCs.
> 
> v2 adopts reset-simple driver and DesignWare bindings as simplification
> and covers RTD1195, too.
> 
> Note that reset-simple driver would allow to cover RTD1195's reset1-3 in one
> DT node, but it only maps the first resource, so RTD1295's reset4 would need
> to remain separate due to a gap in between. I've therefore left them all as
> separate nodes for now.
> 
> Also note that my initial 32-bit arm patch already selects RESET_CONTROLLER,
> to avoid needing a separate patch here to add that one line as done for arm64.
> 
> If I can take the bindings patches through the Realtek tree then I can squash
> the two final DT patches depending on them into the patches added the resets,
> otherwise they need to go into v5.6 or be merged via a topic branch.

I'm fine with the DT binding patches going in through the Realtek tree,
feel free to add

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

to both. I'll just pick up patches 3 and 4.

regards
Philipp


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Re: [PATCH v2 02/11] dt-bindings: reset: Add Realtek RTD1195

[Rob Herring]

On Wed, 23 Oct 2019 12:13:08 +0200, =?UTF-8?q?Andreas=20F=C3=A4rber?= wrote:
> Add a header with symbolic reset indices for Realtek RTD1195 SoC.
> Naming was derived from BSP register description headers.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v2: New
>  
>  include/dt-bindings/reset/realtek,rtd1195.h | 74 +++++++++++++++++++++++++++++
>  1 file changed, 74 insertions(+)
>  create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH v2 02/11] dt-bindings: reset: Add Realtek RTD1195

[Rob Herring]

On Wed, 23 Oct 2019 12:13:08 +0200, =?UTF-8?q?Andreas=20F=C3=A4rber?= wrote:
> Add a header with symbolic reset indices for Realtek RTD1195 SoC.
> Naming was derived from BSP register description headers.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v2: New
>  
>  include/dt-bindings/reset/realtek,rtd1195.h | 74 +++++++++++++++++++++++++++++
>  1 file changed, 74 insertions(+)
>  create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>

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Re: [PATCH v2 05/11] arm64: realtek: Select reset controller

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Select RESET_CONTROLLER for ARCH_REALTEK.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v2: New
>  
>  arch/arm64/Kconfig.platforms | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
> index 63b463b88040..90d3c04ebff0 100644
> --- a/arch/arm64/Kconfig.platforms
> +++ b/arch/arm64/Kconfig.platforms
> @@ -189,6 +189,7 @@ config ARCH_QCOM
>  
>  config ARCH_REALTEK
>  	bool "Realtek Platforms"
> +	select RESET_CONTROLLER
>  	help
>  	  This enables support for the ARMv8 based Realtek chipsets,
>  	  like the RTD1295.

Applied to linux-realtek.git v5.5/arm64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/arm64

Regards,
Andreas

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Re: [PATCH v2 05/11] arm64: realtek: Select reset controller

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Select RESET_CONTROLLER for ARCH_REALTEK.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v2: New
>  
>  arch/arm64/Kconfig.platforms | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
> index 63b463b88040..90d3c04ebff0 100644
> --- a/arch/arm64/Kconfig.platforms
> +++ b/arch/arm64/Kconfig.platforms
> @@ -189,6 +189,7 @@ config ARCH_QCOM
>  
>  config ARCH_REALTEK
>  	bool "Realtek Platforms"
> +	select RESET_CONTROLLER
>  	help
>  	  This enables support for the ARMv8 based Realtek chipsets,
>  	  like the RTD1295.

Applied to linux-realtek.git v5.5/arm64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/arm64

Regards,
Andreas

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Re: [PATCH v2 01/11] dt-bindings: reset: Add Realtek RTD1295

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Add a header with symbolic reset indices for Realtek RTD1295 SoC.
> Naming was derived from reset-names in an OEM's Device Tree.
> 
> Acked-by: Rob Herring <robh@kernel.org>
> [AF: Dropped RTD1295 specific binding definition, updated SPDX]
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Dropped textual binding with new compatible
>  * Updated SPDX-License-Identifier location
>  * Updated to SPDX 2.0
>  * Changed from MIT to BSD (Rob)
>  
>  include/dt-bindings/reset/realtek,rtd1295.h | 111 ++++++++++++++++++++++++++++
>  1 file changed, 111 insertions(+)
>  create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

Added Philipp's Acked-by and applied to linux-realtek.git v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Thanks,
Andreas

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GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Re: [PATCH v2 01/11] dt-bindings: reset: Add Realtek RTD1295

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Add a header with symbolic reset indices for Realtek RTD1295 SoC.
> Naming was derived from reset-names in an OEM's Device Tree.
> 
> Acked-by: Rob Herring <robh@kernel.org>
> [AF: Dropped RTD1295 specific binding definition, updated SPDX]
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Dropped textual binding with new compatible
>  * Updated SPDX-License-Identifier location
>  * Updated to SPDX 2.0
>  * Changed from MIT to BSD (Rob)
>  
>  include/dt-bindings/reset/realtek,rtd1295.h | 111 ++++++++++++++++++++++++++++
>  1 file changed, 111 insertions(+)
>  create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h

Added Philipp's Acked-by and applied to linux-realtek.git v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Thanks,
Andreas

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Re: [PATCH v2 06/11] arm64: dts: realtek: Add RTD129x reset controller nodes

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Add nodes for the Realtek RTD1295 reset controllers.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
>  
>  arch/arm64/boot/dts/realtek/rtd129x.dtsi | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)

Applied to linux-realtek.git v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Regards,
Andreas

-- 
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GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Re: [PATCH v2 06/11] arm64: dts: realtek: Add RTD129x reset controller nodes

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Add nodes for the Realtek RTD1295 reset controllers.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
>  
>  arch/arm64/boot/dts/realtek/rtd129x.dtsi | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)

Applied to linux-realtek.git v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Regards,
Andreas

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Re: [PATCH v2 07/11] arm64: dts: realtek: Add RTD129x UART resets

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Associate the UART nodes with the corresponding reset controller bits.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
>  
>  arch/arm64/boot/dts/realtek/rtd129x.dtsi | 3 +++
>  1 file changed, 3 insertions(+)

Squashed the symbolic names and applied to linux-realtek.git v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Thanks,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Re: [PATCH v2 07/11] arm64: dts: realtek: Add RTD129x UART resets

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Associate the UART nodes with the corresponding reset controller bits.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi
>  
>  arch/arm64/boot/dts/realtek/rtd129x.dtsi | 3 +++
>  1 file changed, 3 insertions(+)

Squashed the symbolic names and applied to linux-realtek.git v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Thanks,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v2 10/11] arm64: dts: realtek: Adopt RTD129x reset constants

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Replace reset controller indices with constants.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2: Unchanged
>  
>  arch/arm64/boot/dts/realtek/rtd129x.dtsi | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)

Squashed into preceding arm64 patch and applied to linux-realtek.git
v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Thanks,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Re: [PATCH v2 10/11] arm64: dts: realtek: Adopt RTD129x reset constants

[Andreas Färber]

Am 23.10.19 um 12:13 schrieb Andreas Färber:
> Replace reset controller indices with constants.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2: Unchanged
>  
>  arch/arm64/boot/dts/realtek/rtd129x.dtsi | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)

Squashed into preceding arm64 patch and applied to linux-realtek.git
v5.5/dt64:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.5/dt64

Thanks,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel