[MODERATED] Re: GPZv4

[Jon Masters <jcm@redhat.com>]

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On 04/18/2018 04:54 AM, speck for Thomas Gleixner wrote:
> On Tue, 17 Apr 2018, speck for Konrad Rzeszutek Wilk wrote:
>> 2). SBB vs MDD vs SBBD.
>>
>> MDD = Memory Disambiguation Disable
>> SBB = Speculative Store Bypass
>> SBBD = Speculative Store Bypass Disable
>>
>> Thomas likes 'MDD', Jon likes 'SBB', but he is also fine with 'SBBD'.
> 
> I'm fine with SBBD as well. It's the same semantics as the other knobs as
> it controls the mitigation.

Great. Might I recommend keeping what I sent to Konrad (both mdd and
ssbd recognized), but do whichever you like Konrad ;)

> So can we for now just start with the minimal set of auto, off, on and then
> hash out the prctl or not question. The big hammer is the most important
> piece we need to have ready for merging when the embargo is lifted.

I've sent the big hammer patches last night. Konrad's original set with
a few fixes, and just does "auto", "off", "on", and tested working ok.

>> P.S.
>> I know the AMD secret sauce bits and can do the patches for this, but
>> are other folks authorized for this?
> 
> Groan. I do not know whether I am or not.
> 
> This needs to stop. At some point we need to queue and stage the damned
> patches for both Intel and AMD. So AMD should get their act together and
> clarify the situation. Borislav can you please reach out to AMD?

The problem is the performance hit. Both Intel and AMD take a hit, but
AMD have a few mitigating circumstances that causes them to be more
alarmed by disabling MD by default on their silicon. Chiefly, it's that
AMD won't speculatively bypass a load against the same base pointer, so
they're not vulnerable to the stack attack or some of the worst of it.
They will want the prctl type solution with userspace fixes deployed.

Jon.

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