From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 18 Oct 2019 01:17:22 -0000 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1iLGtL-0001kO-VP for speck@linutronix.de; Fri, 18 Oct 2019 03:17:21 +0200 Received: from [192.168.4.242] (helo=deadeye) by shadbolt.decadent.org.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1iLGtK-00012y-AR for speck@linutronix.de; Fri, 18 Oct 2019 02:17:18 +0100 Received: from ben by deadeye with local (Exim 4.92.2) (envelope-from ) id 1iLGtK-00057t-4c for speck@linutronix.de; Fri, 18 Oct 2019 02:17:18 +0100 Message-ID: <072bc1d9d17f1ecf13ebb0e7a509f175c7e3c2f3.camel@decadent.org.uk> Subject: [MODERATED] Re: [PATCH v5 08/11] TAAv5 8 From: Ben Hutchings Date: Fri, 18 Oct 2019 02:17:12 +0100 In-Reply-To: <20191015231252.kggxh6ffrciz2dfy@treble> References: <20191015103454.GW317@dhcp22.suse.cz> <20191015130627.7jkhqy2zrtm35ool@treble> <20191015152649.yim4krwuttrh6xgi@treble> <20191015200024.hxs4brxi7gbvmcdy@treble> <20191015205631.GF30412@guptapadev.amr> <20191015231252.kggxh6ffrciz2dfy@treble> MIME-Version: 1.0 Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-nI16oVl0z09hEE9Jhufj" To: speck@linutronix.de List-ID: --=-nI16oVl0z09hEE9Jhufj Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2019-10-15 at 18:12 -0500, speck for Josh Poimboeuf wrote: > On Tue, Oct 15, 2019 at 11:14:03PM +0200, speck for Jiri Kosina wrote: [...] > > OK, that piece of information finally made it to make sense again :) > >=20 > > So I believe distros still want the option (Michal's patch) to default = to=20 > > 'auto', so that actual heavy users of TSX will get the right thing once= =20 > > they update their CPUs to !TAA_BUG ones, but it's less urgent that I= =20 > > originally thought. >=20 > So if I understand correctly, you're postulating that distros want: >=20 > a) TAA_BUG && MDS_NO=3D0 =3D> TSX on > b) TAA_BUG && MDS_NO=3D1 =3D> TSX off > c) !TAA_BUG =3D> TSX on [...] I think this should be: a) TAA_BUG && MD_CLEAR=3D1 =3D> TSX on b) TAA_BUG && MD_CLEAR=3D0 =3D> TSX off c) !TAA_BUG =3D> TSX on As I understand it, with currently released microcode, no CPUs have both MDS_NO and MD_CLEAR set. But with the pending microcode updates, CPUs with MDS_NO=3D1 will also get MD_CLEAR=3D1 and we can use VERW to mitigate against TAA. Ben. --=20 Ben Hutchings It's easier to fight for one's principles than to live up to them. --=-nI16oVl0z09hEE9Jhufj Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEErCspvTSmr92z9o8157/I7JWGEQkFAl2pEpkACgkQ57/I7JWG EQkA1w//SzCwH7ZsogvYWJaKWCE0sd/a6OufKYEmpuoDjX9ZgGclNSodETXRkkr5 I5NRUh07ncELDrohVsbUmry7ypEbpl+L0zffe9jrv/WVpqWyXbLt32E6P5bPlZTt gnDmSlQqB1QnM9SmkYYjK55rSQE2RnVMzXU8VpOklKmcT1sKucpVww+EBkM7jdnF upk51ronYtwTrzGOHaiZE1x0jinkvJ23XW4ty5LeiULaGCLXVCo0KJzqekdvDMcg mPL8IrNmIOx0QNTorUkK4FkjX6SBEfj3wpMBLD5SFKX2jnT18tczFifJIPPAMK3G uiXI0/e+sjhGJMczUwMSnF/H8XdLW6T+o3lkHKmDvfSt2U4bBrohGJx0UKnRY3VX 6sWbbti+zbX5DhlLPQZ+ywvWdESHk9mT8onqjJrxFAAZfgTTNjtPhgjjE817Du8M +0LPFjiofCxq2Dxh7Aa8HkpNHoW2OVJng9jGaObJl0Q5V8xxyWRvmbqvLt1FXRBi 6fsaTbaSkanSia1nXN0YyNzLGeIXHKMVzBrG8+0X76RYwuPAK46KAdBQMNuWvAZw 9xQVqSazELmQ/YOo0StAXiqu037n6GzqnfJSBVGJwIPrsLMitt0EKRE2SG730hj3 ZqPxY4zojSUfaq7ih7sXOjT0pqlqoQs/7IyCSe+gkT+N1jg0khQ= =XVvv -----END PGP SIGNATURE----- --=-nI16oVl0z09hEE9Jhufj--