From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753547AbdLMQKa (ORCPT ); Wed, 13 Dec 2017 11:10:30 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:41121 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752292AbdLMQK1 (ORCPT ); Wed, 13 Dec 2017 11:10:27 -0500 X-Google-Smtp-Source: ACJfBosqOzHhcpy3f1t11jCp4yd69Nuu6qjF3x16obezVwBqhDVev11hZKb8DqvDo35qVrbESXUPtg== Subject: Re: [PATCH 5/8] drm/sun4i: Add a driver for the display frontend To: Maxime Ripard , Daniel Vetter , David Airlie , Chen-Yu Tsai Cc: linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, thomas@vitsch.nl References: <600d29233eb0dcca3af815fbed8995e35f78b4ee.1513178989.git-series.maxime.ripard@free-electrons.com> From: Neil Armstrong Organization: Baylibre Message-ID: <08145629-328d-9909-8b2c-261c5d8bf16c@baylibre.com> Date: Wed, 13 Dec 2017 17:10:24 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <600d29233eb0dcca3af815fbed8995e35f78b4ee.1513178989.git-series.maxime.ripard@free-electrons.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/12/2017 16:33, Maxime Ripard wrote: > The display frontend is an hardware block that can be used to implement > some more advanced features like hardware scaling or colorspace > conversions. It can also be used to implement the output format of the VPU. > > Let's create a minimal driver for it that will only enable the hardware > scaling features. > > Signed-off-by: Maxime Ripard > --- > drivers/gpu/drm/sun4i/Makefile | 3 +- > drivers/gpu/drm/sun4i/sun4i_backend.c | 5 +- > drivers/gpu/drm/sun4i/sun4i_backend.h | 1 +- > drivers/gpu/drm/sun4i/sun4i_drv.c | 16 +- > drivers/gpu/drm/sun4i/sun4i_drv.h | 1 +- > drivers/gpu/drm/sun4i/sun4i_frontend.c | 377 ++++++++++++++++++++++++++- > drivers/gpu/drm/sun4i/sun4i_frontend.h | 102 +++++++- > 7 files changed, 500 insertions(+), 5 deletions(-) > create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.c > create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.h > > diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile > index 0c2f8c7facae..b660d82011f4 100644 > --- a/drivers/gpu/drm/sun4i/Makefile > +++ b/drivers/gpu/drm/sun4i/Makefile > @@ -1,5 +1,6 @@ > # SPDX-License-Identifier: GPL-2.0 > sun4i-backend-y += sun4i_backend.o sun4i_layer.o > +sun4i-frontend-y += sun4i_frontend.o > > sun4i-drm-y += sun4i_drv.o > sun4i-drm-y += sun4i_framebuffer.o > @@ -21,6 +22,6 @@ obj-$(CONFIG_DRM_SUN4I) += sun4i-tcon.o > obj-$(CONFIG_DRM_SUN4I) += sun4i_tv.o > obj-$(CONFIG_DRM_SUN4I) += sun6i_drc.o > > -obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o > +obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o sun4i-frontend.o > obj-$(CONFIG_DRM_SUN4I_HDMI) += sun4i-drm-hdmi.o > obj-$(CONFIG_DRM_SUN8I_MIXER) += sun8i-mixer.o > diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c > index f971d3fb5ee4..e83e1fe43823 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_backend.c > +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c > @@ -367,6 +367,11 @@ static int sun4i_backend_bind(struct device *dev, struct device *master, > if (backend->engine.id < 0) > return backend->engine.id; > > + backend->frontend = sun4i_backend_find_frontend(drv, dev->of_node); > + if (IS_ERR(backend->frontend)) { > + dev_err(dev, "Couldn't find matching frontend, frontend features disabled\n"); Maybe a dev_warn ? > + } > + > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > regs = devm_ioremap_resource(dev, res); > if (IS_ERR(regs)) > diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h b/drivers/gpu/drm/sun4i/sun4i_backend.h > index ac3cc029f5cd..ba1410fd5410 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_backend.h > +++ b/drivers/gpu/drm/sun4i/sun4i_backend.h > @@ -145,6 +145,7 @@ > > struct sun4i_backend { > struct sunxi_engine engine; > + struct sun4i_frontend *frontend; > > struct reset_control *reset; > > diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c > index 75c76cdd82bc..17bf9bfd98ba 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_drv.c > +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c > @@ -98,6 +98,7 @@ static int sun4i_drv_bind(struct device *dev) > goto free_drm; > } > drm->dev_private = drv; > + INIT_LIST_HEAD(&drv->frontend_list); > INIT_LIST_HEAD(&drv->engine_list); > INIT_LIST_HEAD(&drv->tcon_list); > > @@ -239,9 +240,11 @@ static int sun4i_drv_add_endpoints(struct device *dev, > int count = 0; > > /* > - * We don't support the frontend for now, so we will never > - * have a device bound. Just skip over it, but we still want > - * the rest our pipeline to be added. > + * The frontend has been disabled in all of our old device > + * trees. If we find a node that is the frontend and is > + * disabled, we should just follow through and parse its > + * child, but without adding it to the component list. > + * Otherwise, we obviously want to add it to the list. > */ > if (!sun4i_drv_node_is_frontend(node) && > !of_device_is_available(node)) > @@ -254,7 +257,12 @@ static int sun4i_drv_add_endpoints(struct device *dev, > if (sun4i_drv_node_is_connector(node)) > return 0; > > - if (!sun4i_drv_node_is_frontend(node)) { > + /* > + * If the device is either just a regular device, or an > + * enabled frontend, we add it to our component list. > + */ > + if (!sun4i_drv_node_is_frontend(node) || > + (sun4i_drv_node_is_frontend(node) && of_device_is_available(node))) { > /* Add current component */ > DRM_DEBUG_DRIVER("Adding component %pOF\n", node); > drm_of_component_match_add(dev, match, compare_of, node); > diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.h b/drivers/gpu/drm/sun4i/sun4i_drv.h > index a960c89270cc..9c26a345f85c 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_drv.h > +++ b/drivers/gpu/drm/sun4i/sun4i_drv.h > @@ -19,6 +19,7 @@ > > struct sun4i_drv { > struct list_head engine_list; > + struct list_head frontend_list; > struct list_head tcon_list; > > struct drm_fbdev_cma *fbdev; > diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c > new file mode 100644 > index 000000000000..1be0e86d1457 > --- /dev/null > +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c > @@ -0,0 +1,377 @@ // SPDX-Licence-Identifier... new format ? > +/* > + * Copyright (C) 2017 Free Electrons > + * > + * Maxime Ripard > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + */ > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "sun4i_drv.h" > +#include "sun4i_frontend.h" > + > +static const u32 sun4i_frontend_vert_coef[32] = { > + 0x00004000, 0x000140ff, 0x00033ffe, 0x00043ffd, > + 0x00063efc, 0xff083dfc, 0x000a3bfb, 0xff0d39fb, > + 0xff0f37fb, 0xff1136fa, 0xfe1433fb, 0xfe1631fb, > + 0xfd192ffb, 0xfd1c2cfb, 0xfd1f29fb, 0xfc2127fc, > + 0xfc2424fc, 0xfc2721fc, 0xfb291ffd, 0xfb2c1cfd, > + 0xfb2f19fd, 0xfb3116fe, 0xfb3314fe, 0xfa3611ff, > + 0xfb370fff, 0xfb390dff, 0xfb3b0a00, 0xfc3d08ff, > + 0xfc3e0600, 0xfd3f0400, 0xfe3f0300, 0xff400100, > +}; > + > +static const u32 sun4i_frontend_horz_coef[64] = { > + 0x40000000, 0x00000000, 0x40fe0000, 0x0000ff03, > + 0x3ffd0000, 0x0000ff05, 0x3ffc0000, 0x0000ff06, > + 0x3efb0000, 0x0000ff08, 0x3dfb0000, 0x0000ff09, > + 0x3bfa0000, 0x0000fe0d, 0x39fa0000, 0x0000fe0f, > + 0x38fa0000, 0x0000fe10, 0x36fa0000, 0x0000fe12, > + 0x33fa0000, 0x0000fd16, 0x31fa0000, 0x0000fd18, > + 0x2ffa0000, 0x0000fd1a, 0x2cfa0000, 0x0000fc1e, > + 0x29fa0000, 0x0000fc21, 0x27fb0000, 0x0000fb23, > + 0x24fb0000, 0x0000fb26, 0x21fb0000, 0x0000fb29, > + 0x1ffc0000, 0x0000fa2b, 0x1cfc0000, 0x0000fa2e, > + 0x19fd0000, 0x0000fa30, 0x16fd0000, 0x0000fa33, > + 0x14fd0000, 0x0000fa35, 0x11fe0000, 0x0000fa37, > + 0x0ffe0000, 0x0000fa39, 0x0dfe0000, 0x0000fa3b, > + 0x0afe0000, 0x0000fa3e, 0x08ff0000, 0x0000fb3e, > + 0x06ff0000, 0x0000fb40, 0x05ff0000, 0x0000fc40, > + 0x03ff0000, 0x0000fd41, 0x01ff0000, 0x0000fe42, > +}; > + > +static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) > +{ > + int i; > + > + for (i = 0; i < 32; i++) { > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i), > + sun4i_frontend_horz_coef[2 * i]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i), > + sun4i_frontend_horz_coef[2 * i]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i), > + sun4i_frontend_horz_coef[2 * i + 1]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i), > + sun4i_frontend_horz_coef[2 * i + 1]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTCOEF_REG(i), > + sun4i_frontend_vert_coef[i]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTCOEF_REG(i), > + sun4i_frontend_vert_coef[i]); > + } > + > + regmap_update_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, BIT(23), BIT(23)); > +} > + > +int sun4i_frontend_init(struct sun4i_frontend *frontend) > +{ > + int ret; > + > + if (atomic_read(&frontend->users)) > + return -EBUSY; > + > + ret = reset_control_deassert(frontend->reset); > + if (ret) { > + DRM_DEBUG_DRIVER("Couldn't deassert our reset line\n"); > + return ret; > + } > + > + clk_set_rate(frontend->mod_clk, 300000000); > + > + clk_prepare_enable(frontend->bus_clk); > + clk_prepare_enable(frontend->mod_clk); > + clk_prepare_enable(frontend->ram_clk); > + > + regmap_update_bits(frontend->regs, SUN4I_FRONTEND_EN_REG, > + SUN4I_FRONTEND_EN_EN, > + SUN4I_FRONTEND_EN_EN); > + > + regmap_update_bits(frontend->regs, SUN4I_FRONTEND_BYPASS_REG, > + SUN4I_FRONTEND_BYPASS_CSC_EN, > + SUN4I_FRONTEND_BYPASS_CSC_EN); > + > + sun4i_frontend_scaler_init(frontend); > + > + atomic_inc(&frontend->users); > + > + return 0; > +} > +EXPORT_SYMBOL(sun4i_frontend_init); > + > +void sun4i_frontend_exit(struct sun4i_frontend *frontend) > +{ > + atomic_dec(&frontend->users); > + > + clk_disable_unprepare(frontend->ram_clk); > + clk_disable_unprepare(frontend->mod_clk); > + clk_disable_unprepare(frontend->bus_clk); Maybe a blank line ? > + reset_control_assert(frontend->reset); > +} > +EXPORT_SYMBOL(sun4i_frontend_exit); > + > +void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, > + struct drm_plane *plane) > +{ > + struct drm_plane_state *state = plane->state; > + struct drm_framebuffer *fb = state->fb; > + struct drm_gem_cma_object *gem; > + dma_addr_t paddr; > + int bpp; > + > + /* Get the physical address of the buffer in memory */ > + gem = drm_fb_cma_get_gem_obj(fb, 0); > + > + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); > + > + /* Set the line width */ > + DRM_DEBUG_DRIVER("Frontend stride: %d bytes\n", fb->pitches[0]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, > + fb->pitches[0]); > + > + /* Compute the start of the displayed memory */ > + bpp = fb->format->cpp[0]; > + paddr = gem->paddr + fb->offsets[0]; > + paddr += (state->src_x >> 16) * bpp; > + paddr += (state->src_y >> 16) * fb->pitches[0]; > + > + DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); > + regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr); > +} > + > +static int sun4i_frontend_drm_format_to_input_fmt(uint32_t fmt, u32 *val) > +{ > + switch (fmt) { > + case DRM_FORMAT_ARGB8888: > + case DRM_FORMAT_XRGB8888: > + *val = 3; > + return 0; > + > + default: > + return -EINVAL; > + } > +} > + > +static int sun4i_frontend_drm_format_to_output_fmt(uint32_t fmt, u32 *val) > +{ > + switch (fmt) { > + case DRM_FORMAT_ARGB8888: > + *val = 2; > + return 0; > + > + default: > + return -EINVAL; > + } > +} > + > +int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, > + struct drm_plane *plane, uint32_t out_fmt) > +{ > + struct drm_plane_state *state = plane->state; > + struct drm_framebuffer *fb = state->fb; > + u32 out_fmt_val; > + u32 in_fmt_val; > + int ret; > + > + ret = sun4i_frontend_drm_format_to_input_fmt(fb->format->format, > + &in_fmt_val); > + if (ret) { > + DRM_DEBUG_DRIVER("Invalid input format\n"); > + return ret; > + } > + > + ret = sun4i_frontend_drm_format_to_output_fmt(out_fmt, &out_fmt_val); > + if (ret) { > + DRM_DEBUG_DRIVER("Invalid output format\n"); > + return ret; > + } > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZPHASE_REG, 0x400); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZPHASE_REG, 0x400); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE0_REG, 0x400); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE0_REG, 0x400); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG, 0x400); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG, 0x400); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_INPUT_FMT_REG, 0x151); > + /* SUN4I_FRONTEND_INPUT_FMT_DATA_MOD(1) | */ > + /* SUN4I_FRONTEND_INPUT_FMT_DATA_FMT(5) | */ > + /* SUN4I_FRONTEND_INPUT_FMT_PS(1)); */ Why are these commented ? > + regmap_write(frontend->regs, SUN4I_FRONTEND_OUTPUT_FMT_REG, 0x82); > + /* SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT(1)); */ Same here > + > + return 0; > +} > + > +void sun4i_frontend_update_coord(struct sun4i_frontend *frontend, > + struct drm_plane *plane) > +{ > + struct drm_plane_state *state = plane->state; > + > + /* Set height and width */ > + DRM_DEBUG_DRIVER("Frontend size W: %u H: %u\n", > + state->crtc_w, state->crtc_h); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_INSIZE_REG, > + SUN4I_FRONTEND_INSIZE(state->src_h >> 16, > + state->src_w >> 16)); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_INSIZE_REG, > + SUN4I_FRONTEND_INSIZE(state->src_h >> 16, > + state->src_w >> 16)); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_OUTSIZE_REG, > + SUN4I_FRONTEND_OUTSIZE(state->crtc_h, state->crtc_w)); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_OUTSIZE_REG, > + SUN4I_FRONTEND_OUTSIZE(state->crtc_h, state->crtc_w)); > + > + DRM_DEBUG_DRIVER("Frontend horizontal scaling factor %d.%d\n", 1, 0); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZFACT_REG, > + state->src_w / state->crtc_w); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZFACT_REG, > + state->src_w / state->crtc_w); > + > + DRM_DEBUG_DRIVER("Frontend vertical scaling factor %d.%d\n", 1, 0); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTFACT_REG, > + state->src_h / state->crtc_h); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTFACT_REG, > + state->src_h / state->crtc_h); > + > + regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, > + SUN4I_FRONTEND_FRM_CTRL_REG_RDY, > + SUN4I_FRONTEND_FRM_CTRL_REG_RDY); > +} > +EXPORT_SYMBOL(sun4i_frontend_update_coord); > + > +int sun4i_frontend_enable(struct sun4i_frontend *frontend) > +{ > + regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, > + SUN4I_FRONTEND_FRM_CTRL_FRM_START, > + SUN4I_FRONTEND_FRM_CTRL_FRM_START); > + > + return 0; > +} > +EXPORT_SYMBOL(sun4i_frontend_enable); > + > +static struct regmap_config sun4i_frontend_regmap_config = { > + .reg_bits = 32, > + .val_bits = 32, > + .reg_stride = 4, > + .max_register = 0x0a14, > +}; > + > +static int sun4i_frontend_bind(struct device *dev, struct device *master, > + void *data) > +{ > + struct platform_device *pdev = to_platform_device(dev); > + struct sun4i_frontend *frontend; > + struct drm_device *drm = data; > + struct sun4i_drv *drv = drm->dev_private; > + struct resource *res; > + void __iomem *regs; > + > + frontend = devm_kzalloc(dev, sizeof(*frontend), GFP_KERNEL); > + if (!frontend) > + return -ENOMEM; Blank line ? > + dev_set_drvdata(dev, frontend); > + frontend->node = dev->of_node; > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + regs = devm_ioremap_resource(dev, res); > + if (IS_ERR(regs)) > + return PTR_ERR(regs); > + > + frontend->regs = devm_regmap_init_mmio(dev, regs, > + &sun4i_frontend_regmap_config); > + if (IS_ERR(frontend->regs)) { > + dev_err(dev, "Couldn't create the frontend regmap\n"); > + return PTR_ERR(frontend->regs); > + } > + > + frontend->reset = devm_reset_control_get(dev, NULL); > + if (IS_ERR(frontend->reset)) { > + dev_err(dev, "Couldn't get our reset line\n"); > + return PTR_ERR(frontend->reset); > + } > + > + frontend->bus_clk = devm_clk_get(dev, "ahb"); > + if (IS_ERR(frontend->bus_clk)) { > + dev_err(dev, "Couldn't get our bus clock\n"); > + return PTR_ERR(frontend->bus_clk); > + } > + > + frontend->mod_clk = devm_clk_get(dev, "mod"); > + if (IS_ERR(frontend->mod_clk)) { > + dev_err(dev, "Couldn't get our mod clock\n"); > + return PTR_ERR(frontend->mod_clk); > + } > + > + frontend->ram_clk = devm_clk_get(dev, "ram"); > + if (IS_ERR(frontend->ram_clk)) { > + dev_err(dev, "Couldn't get our ram clock\n"); > + return PTR_ERR(frontend->ram_clk); > + } > + > + list_add_tail(&frontend->list, &drv->frontend_list); > + > + return 0; > +} > + > +static void sun4i_frontend_unbind(struct device *dev, struct device *master, > + void *data) > +{ > + struct sun4i_frontend *frontend = dev_get_drvdata(dev); > + > + clk_disable_unprepare(frontend->mod_clk); > + clk_disable_unprepare(frontend->bus_clk); Blank line ? > + reset_control_assert(frontend->reset); > +} > + > +static const struct component_ops sun4i_frontend_ops = { > + .bind = sun4i_frontend_bind, > + .unbind = sun4i_frontend_unbind, > +}; > + > +static int sun4i_frontend_probe(struct platform_device *pdev) > +{ > + return component_add(&pdev->dev, &sun4i_frontend_ops); > +} > + > +static int sun4i_frontend_remove(struct platform_device *pdev) > +{ > + component_del(&pdev->dev, &sun4i_frontend_ops); > + > + return 0; > +} > + > +static const struct of_device_id sun4i_frontend_of_table[] = { > + { .compatible = "allwinner,sun5i-a13-display-frontend" }, > + { .compatible = "allwinner,sun6i-a31-display-frontend" }, > + { .compatible = "allwinner,sun8i-a33-display-frontend" }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, sun4i_frontend_of_table); > + > +static struct platform_driver sun4i_frontend_driver = { > + .probe = sun4i_frontend_probe, > + .remove = sun4i_frontend_remove, > + .driver = { > + .name = "sun4i-frontend", > + .of_match_table = sun4i_frontend_of_table, > + }, > +}; > +module_platform_driver(sun4i_frontend_driver); > + > +MODULE_AUTHOR("Maxime Ripard "); > +MODULE_DESCRIPTION("Allwinner A10 Display Engine Frontend Driver"); > +MODULE_LICENSE("GPL"); > diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h > new file mode 100644 > index 000000000000..2df9f6de0f3f > --- /dev/null > +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h > @@ -0,0 +1,102 @@ // SPDX-Licence-Identifier... new format ? > +/* > + * Copyright (C) 2017 Free Electrons > + * > + * Maxime Ripard > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + */ > + > +#ifndef _SUN4I_FRONTEND_H_ > +#define _SUN4I_FRONTEND_H_ > + > +#include > +#include > + > +#define SUN4I_FRONTEND_EN_REG 0x000 > +#define SUN4I_FRONTEND_EN_EN BIT(0) > + > +#define SUN4I_FRONTEND_FRM_CTRL_REG 0x004 > +#define SUN4I_FRONTEND_FRM_CTRL_FRM_START BIT(16) > +#define SUN4I_FRONTEND_FRM_CTRL_COEF_RDY BIT(1) > +#define SUN4I_FRONTEND_FRM_CTRL_REG_RDY BIT(0) > + > +#define SUN4I_FRONTEND_BYPASS_REG 0x008 > +#define SUN4I_FRONTEND_BYPASS_CSC_EN BIT(1) > + > +#define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020 > + > +#define SUN4I_FRONTEND_LINESTRD0_REG 0x040 > + > +#define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c > +#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD(mod) ((mod) << 8) > +#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT(fmt) ((fmt) << 4) > +#define SUN4I_FRONTEND_INPUT_FMT_PS(ps) (ps) > + > +#define SUN4I_FRONTEND_OUTPUT_FMT_REG 0x05c > +#define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT(fmt) (fmt) > + > +#define SUN4I_FRONTEND_CH0_INSIZE_REG 0x100 > +#define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) > + > +#define SUN4I_FRONTEND_CH0_OUTSIZE_REG 0x104 > +#define SUN4I_FRONTEND_OUTSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) > + > +#define SUN4I_FRONTEND_CH0_HORZFACT_REG 0x108 > +#define SUN4I_FRONTEND_HORZFACT(i, f) (((i) << 16) | (f)) > + > +#define SUN4I_FRONTEND_CH0_VERTFACT_REG 0x10c > +#define SUN4I_FRONTEND_VERTFACT(i, f) (((i) << 16) | (f)) > + > +#define SUN4I_FRONTEND_CH0_HORZPHASE_REG 0x110 > +#define SUN4I_FRONTEND_CH0_VERTPHASE0_REG 0x114 > +#define SUN4I_FRONTEND_CH0_VERTPHASE1_REG 0x118 > + > +#define SUN4I_FRONTEND_CH1_INSIZE_REG 0x200 > +#define SUN4I_FRONTEND_CH1_OUTSIZE_REG 0x204 > +#define SUN4I_FRONTEND_CH1_HORZFACT_REG 0x208 > +#define SUN4I_FRONTEND_CH1_VERTFACT_REG 0x20c > + > +#define SUN4I_FRONTEND_CH1_HORZPHASE_REG 0x210 > +#define SUN4I_FRONTEND_CH1_VERTPHASE0_REG 0x214 > +#define SUN4I_FRONTEND_CH1_VERTPHASE1_REG 0x218 > + > +#define SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i) (0x400 + i * 4) > +#define SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i) (0x480 + i * 4) > +#define SUN4I_FRONTEND_CH0_VERTCOEF_REG(i) (0x500 + i * 4) > +#define SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i) (0x600 + i * 4) > +#define SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i) (0x680 + i * 4) > +#define SUN4I_FRONTEND_CH1_VERTCOEF_REG(i) (0x700 + i * 4) > + > +struct clk; > +struct device_node; > +struct drm_plane; > +struct regmap; > +struct reset_control; > + > +struct sun4i_frontend { > + struct list_head list; > + atomic_t users; > + struct device_node *node; > + > + struct clk *bus_clk; > + struct clk *mod_clk; > + struct clk *ram_clk; > + struct regmap *regs; > + struct reset_control *reset; > +}; > + > +int sun4i_frontend_init(struct sun4i_frontend *frontend); > +void sun4i_frontend_exit(struct sun4i_frontend *frontend); > +int sun4i_frontend_enable(struct sun4i_frontend *frontend); > + > +void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, > + struct drm_plane *plane); > +void sun4i_frontend_update_coord(struct sun4i_frontend *frontend, > + struct drm_plane *plane); > +int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, > + struct drm_plane *plane, uint32_t out_fmt); > + > +#endif /* _SUN4I_FRONTEND_H_ */ > Apart these nits, Reviewed-by: Neil Armstrong From mboxrd@z Thu Jan 1 00:00:00 1970 From: narmstrong@baylibre.com (Neil Armstrong) Date: Wed, 13 Dec 2017 17:10:24 +0100 Subject: [PATCH 5/8] drm/sun4i: Add a driver for the display frontend In-Reply-To: <600d29233eb0dcca3af815fbed8995e35f78b4ee.1513178989.git-series.maxime.ripard@free-electrons.com> References: <600d29233eb0dcca3af815fbed8995e35f78b4ee.1513178989.git-series.maxime.ripard@free-electrons.com> Message-ID: <08145629-328d-9909-8b2c-261c5d8bf16c@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 13/12/2017 16:33, Maxime Ripard wrote: > The display frontend is an hardware block that can be used to implement > some more advanced features like hardware scaling or colorspace > conversions. It can also be used to implement the output format of the VPU. > > Let's create a minimal driver for it that will only enable the hardware > scaling features. > > Signed-off-by: Maxime Ripard > --- > drivers/gpu/drm/sun4i/Makefile | 3 +- > drivers/gpu/drm/sun4i/sun4i_backend.c | 5 +- > drivers/gpu/drm/sun4i/sun4i_backend.h | 1 +- > drivers/gpu/drm/sun4i/sun4i_drv.c | 16 +- > drivers/gpu/drm/sun4i/sun4i_drv.h | 1 +- > drivers/gpu/drm/sun4i/sun4i_frontend.c | 377 ++++++++++++++++++++++++++- > drivers/gpu/drm/sun4i/sun4i_frontend.h | 102 +++++++- > 7 files changed, 500 insertions(+), 5 deletions(-) > create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.c > create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.h > > diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile > index 0c2f8c7facae..b660d82011f4 100644 > --- a/drivers/gpu/drm/sun4i/Makefile > +++ b/drivers/gpu/drm/sun4i/Makefile > @@ -1,5 +1,6 @@ > # SPDX-License-Identifier: GPL-2.0 > sun4i-backend-y += sun4i_backend.o sun4i_layer.o > +sun4i-frontend-y += sun4i_frontend.o > > sun4i-drm-y += sun4i_drv.o > sun4i-drm-y += sun4i_framebuffer.o > @@ -21,6 +22,6 @@ obj-$(CONFIG_DRM_SUN4I) += sun4i-tcon.o > obj-$(CONFIG_DRM_SUN4I) += sun4i_tv.o > obj-$(CONFIG_DRM_SUN4I) += sun6i_drc.o > > -obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o > +obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o sun4i-frontend.o > obj-$(CONFIG_DRM_SUN4I_HDMI) += sun4i-drm-hdmi.o > obj-$(CONFIG_DRM_SUN8I_MIXER) += sun8i-mixer.o > diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c > index f971d3fb5ee4..e83e1fe43823 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_backend.c > +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c > @@ -367,6 +367,11 @@ static int sun4i_backend_bind(struct device *dev, struct device *master, > if (backend->engine.id < 0) > return backend->engine.id; > > + backend->frontend = sun4i_backend_find_frontend(drv, dev->of_node); > + if (IS_ERR(backend->frontend)) { > + dev_err(dev, "Couldn't find matching frontend, frontend features disabled\n"); Maybe a dev_warn ? > + } > + > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > regs = devm_ioremap_resource(dev, res); > if (IS_ERR(regs)) > diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h b/drivers/gpu/drm/sun4i/sun4i_backend.h > index ac3cc029f5cd..ba1410fd5410 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_backend.h > +++ b/drivers/gpu/drm/sun4i/sun4i_backend.h > @@ -145,6 +145,7 @@ > > struct sun4i_backend { > struct sunxi_engine engine; > + struct sun4i_frontend *frontend; > > struct reset_control *reset; > > diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c > index 75c76cdd82bc..17bf9bfd98ba 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_drv.c > +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c > @@ -98,6 +98,7 @@ static int sun4i_drv_bind(struct device *dev) > goto free_drm; > } > drm->dev_private = drv; > + INIT_LIST_HEAD(&drv->frontend_list); > INIT_LIST_HEAD(&drv->engine_list); > INIT_LIST_HEAD(&drv->tcon_list); > > @@ -239,9 +240,11 @@ static int sun4i_drv_add_endpoints(struct device *dev, > int count = 0; > > /* > - * We don't support the frontend for now, so we will never > - * have a device bound. Just skip over it, but we still want > - * the rest our pipeline to be added. > + * The frontend has been disabled in all of our old device > + * trees. If we find a node that is the frontend and is > + * disabled, we should just follow through and parse its > + * child, but without adding it to the component list. > + * Otherwise, we obviously want to add it to the list. > */ > if (!sun4i_drv_node_is_frontend(node) && > !of_device_is_available(node)) > @@ -254,7 +257,12 @@ static int sun4i_drv_add_endpoints(struct device *dev, > if (sun4i_drv_node_is_connector(node)) > return 0; > > - if (!sun4i_drv_node_is_frontend(node)) { > + /* > + * If the device is either just a regular device, or an > + * enabled frontend, we add it to our component list. > + */ > + if (!sun4i_drv_node_is_frontend(node) || > + (sun4i_drv_node_is_frontend(node) && of_device_is_available(node))) { > /* Add current component */ > DRM_DEBUG_DRIVER("Adding component %pOF\n", node); > drm_of_component_match_add(dev, match, compare_of, node); > diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.h b/drivers/gpu/drm/sun4i/sun4i_drv.h > index a960c89270cc..9c26a345f85c 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_drv.h > +++ b/drivers/gpu/drm/sun4i/sun4i_drv.h > @@ -19,6 +19,7 @@ > > struct sun4i_drv { > struct list_head engine_list; > + struct list_head frontend_list; > struct list_head tcon_list; > > struct drm_fbdev_cma *fbdev; > diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c > new file mode 100644 > index 000000000000..1be0e86d1457 > --- /dev/null > +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c > @@ -0,0 +1,377 @@ // SPDX-Licence-Identifier... new format ? > +/* > + * Copyright (C) 2017 Free Electrons > + * > + * Maxime Ripard > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + */ > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "sun4i_drv.h" > +#include "sun4i_frontend.h" > + > +static const u32 sun4i_frontend_vert_coef[32] = { > + 0x00004000, 0x000140ff, 0x00033ffe, 0x00043ffd, > + 0x00063efc, 0xff083dfc, 0x000a3bfb, 0xff0d39fb, > + 0xff0f37fb, 0xff1136fa, 0xfe1433fb, 0xfe1631fb, > + 0xfd192ffb, 0xfd1c2cfb, 0xfd1f29fb, 0xfc2127fc, > + 0xfc2424fc, 0xfc2721fc, 0xfb291ffd, 0xfb2c1cfd, > + 0xfb2f19fd, 0xfb3116fe, 0xfb3314fe, 0xfa3611ff, > + 0xfb370fff, 0xfb390dff, 0xfb3b0a00, 0xfc3d08ff, > + 0xfc3e0600, 0xfd3f0400, 0xfe3f0300, 0xff400100, > +}; > + > +static const u32 sun4i_frontend_horz_coef[64] = { > + 0x40000000, 0x00000000, 0x40fe0000, 0x0000ff03, > + 0x3ffd0000, 0x0000ff05, 0x3ffc0000, 0x0000ff06, > + 0x3efb0000, 0x0000ff08, 0x3dfb0000, 0x0000ff09, > + 0x3bfa0000, 0x0000fe0d, 0x39fa0000, 0x0000fe0f, > + 0x38fa0000, 0x0000fe10, 0x36fa0000, 0x0000fe12, > + 0x33fa0000, 0x0000fd16, 0x31fa0000, 0x0000fd18, > + 0x2ffa0000, 0x0000fd1a, 0x2cfa0000, 0x0000fc1e, > + 0x29fa0000, 0x0000fc21, 0x27fb0000, 0x0000fb23, > + 0x24fb0000, 0x0000fb26, 0x21fb0000, 0x0000fb29, > + 0x1ffc0000, 0x0000fa2b, 0x1cfc0000, 0x0000fa2e, > + 0x19fd0000, 0x0000fa30, 0x16fd0000, 0x0000fa33, > + 0x14fd0000, 0x0000fa35, 0x11fe0000, 0x0000fa37, > + 0x0ffe0000, 0x0000fa39, 0x0dfe0000, 0x0000fa3b, > + 0x0afe0000, 0x0000fa3e, 0x08ff0000, 0x0000fb3e, > + 0x06ff0000, 0x0000fb40, 0x05ff0000, 0x0000fc40, > + 0x03ff0000, 0x0000fd41, 0x01ff0000, 0x0000fe42, > +}; > + > +static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) > +{ > + int i; > + > + for (i = 0; i < 32; i++) { > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i), > + sun4i_frontend_horz_coef[2 * i]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i), > + sun4i_frontend_horz_coef[2 * i]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i), > + sun4i_frontend_horz_coef[2 * i + 1]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i), > + sun4i_frontend_horz_coef[2 * i + 1]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTCOEF_REG(i), > + sun4i_frontend_vert_coef[i]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTCOEF_REG(i), > + sun4i_frontend_vert_coef[i]); > + } > + > + regmap_update_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, BIT(23), BIT(23)); > +} > + > +int sun4i_frontend_init(struct sun4i_frontend *frontend) > +{ > + int ret; > + > + if (atomic_read(&frontend->users)) > + return -EBUSY; > + > + ret = reset_control_deassert(frontend->reset); > + if (ret) { > + DRM_DEBUG_DRIVER("Couldn't deassert our reset line\n"); > + return ret; > + } > + > + clk_set_rate(frontend->mod_clk, 300000000); > + > + clk_prepare_enable(frontend->bus_clk); > + clk_prepare_enable(frontend->mod_clk); > + clk_prepare_enable(frontend->ram_clk); > + > + regmap_update_bits(frontend->regs, SUN4I_FRONTEND_EN_REG, > + SUN4I_FRONTEND_EN_EN, > + SUN4I_FRONTEND_EN_EN); > + > + regmap_update_bits(frontend->regs, SUN4I_FRONTEND_BYPASS_REG, > + SUN4I_FRONTEND_BYPASS_CSC_EN, > + SUN4I_FRONTEND_BYPASS_CSC_EN); > + > + sun4i_frontend_scaler_init(frontend); > + > + atomic_inc(&frontend->users); > + > + return 0; > +} > +EXPORT_SYMBOL(sun4i_frontend_init); > + > +void sun4i_frontend_exit(struct sun4i_frontend *frontend) > +{ > + atomic_dec(&frontend->users); > + > + clk_disable_unprepare(frontend->ram_clk); > + clk_disable_unprepare(frontend->mod_clk); > + clk_disable_unprepare(frontend->bus_clk); Maybe a blank line ? > + reset_control_assert(frontend->reset); > +} > +EXPORT_SYMBOL(sun4i_frontend_exit); > + > +void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, > + struct drm_plane *plane) > +{ > + struct drm_plane_state *state = plane->state; > + struct drm_framebuffer *fb = state->fb; > + struct drm_gem_cma_object *gem; > + dma_addr_t paddr; > + int bpp; > + > + /* Get the physical address of the buffer in memory */ > + gem = drm_fb_cma_get_gem_obj(fb, 0); > + > + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); > + > + /* Set the line width */ > + DRM_DEBUG_DRIVER("Frontend stride: %d bytes\n", fb->pitches[0]); > + regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, > + fb->pitches[0]); > + > + /* Compute the start of the displayed memory */ > + bpp = fb->format->cpp[0]; > + paddr = gem->paddr + fb->offsets[0]; > + paddr += (state->src_x >> 16) * bpp; > + paddr += (state->src_y >> 16) * fb->pitches[0]; > + > + DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); > + regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr); > +} > + > +static int sun4i_frontend_drm_format_to_input_fmt(uint32_t fmt, u32 *val) > +{ > + switch (fmt) { > + case DRM_FORMAT_ARGB8888: > + case DRM_FORMAT_XRGB8888: > + *val = 3; > + return 0; > + > + default: > + return -EINVAL; > + } > +} > + > +static int sun4i_frontend_drm_format_to_output_fmt(uint32_t fmt, u32 *val) > +{ > + switch (fmt) { > + case DRM_FORMAT_ARGB8888: > + *val = 2; > + return 0; > + > + default: > + return -EINVAL; > + } > +} > + > +int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, > + struct drm_plane *plane, uint32_t out_fmt) > +{ > + struct drm_plane_state *state = plane->state; > + struct drm_framebuffer *fb = state->fb; > + u32 out_fmt_val; > + u32 in_fmt_val; > + int ret; > + > + ret = sun4i_frontend_drm_format_to_input_fmt(fb->format->format, > + &in_fmt_val); > + if (ret) { > + DRM_DEBUG_DRIVER("Invalid input format\n"); > + return ret; > + } > + > + ret = sun4i_frontend_drm_format_to_output_fmt(out_fmt, &out_fmt_val); > + if (ret) { > + DRM_DEBUG_DRIVER("Invalid output format\n"); > + return ret; > + } > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZPHASE_REG, 0x400); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZPHASE_REG, 0x400); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE0_REG, 0x400); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE0_REG, 0x400); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG, 0x400); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG, 0x400); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_INPUT_FMT_REG, 0x151); > + /* SUN4I_FRONTEND_INPUT_FMT_DATA_MOD(1) | */ > + /* SUN4I_FRONTEND_INPUT_FMT_DATA_FMT(5) | */ > + /* SUN4I_FRONTEND_INPUT_FMT_PS(1)); */ Why are these commented ? > + regmap_write(frontend->regs, SUN4I_FRONTEND_OUTPUT_FMT_REG, 0x82); > + /* SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT(1)); */ Same here > + > + return 0; > +} > + > +void sun4i_frontend_update_coord(struct sun4i_frontend *frontend, > + struct drm_plane *plane) > +{ > + struct drm_plane_state *state = plane->state; > + > + /* Set height and width */ > + DRM_DEBUG_DRIVER("Frontend size W: %u H: %u\n", > + state->crtc_w, state->crtc_h); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_INSIZE_REG, > + SUN4I_FRONTEND_INSIZE(state->src_h >> 16, > + state->src_w >> 16)); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_INSIZE_REG, > + SUN4I_FRONTEND_INSIZE(state->src_h >> 16, > + state->src_w >> 16)); > + > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_OUTSIZE_REG, > + SUN4I_FRONTEND_OUTSIZE(state->crtc_h, state->crtc_w)); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_OUTSIZE_REG, > + SUN4I_FRONTEND_OUTSIZE(state->crtc_h, state->crtc_w)); > + > + DRM_DEBUG_DRIVER("Frontend horizontal scaling factor %d.%d\n", 1, 0); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZFACT_REG, > + state->src_w / state->crtc_w); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZFACT_REG, > + state->src_w / state->crtc_w); > + > + DRM_DEBUG_DRIVER("Frontend vertical scaling factor %d.%d\n", 1, 0); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTFACT_REG, > + state->src_h / state->crtc_h); > + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTFACT_REG, > + state->src_h / state->crtc_h); > + > + regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, > + SUN4I_FRONTEND_FRM_CTRL_REG_RDY, > + SUN4I_FRONTEND_FRM_CTRL_REG_RDY); > +} > +EXPORT_SYMBOL(sun4i_frontend_update_coord); > + > +int sun4i_frontend_enable(struct sun4i_frontend *frontend) > +{ > + regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, > + SUN4I_FRONTEND_FRM_CTRL_FRM_START, > + SUN4I_FRONTEND_FRM_CTRL_FRM_START); > + > + return 0; > +} > +EXPORT_SYMBOL(sun4i_frontend_enable); > + > +static struct regmap_config sun4i_frontend_regmap_config = { > + .reg_bits = 32, > + .val_bits = 32, > + .reg_stride = 4, > + .max_register = 0x0a14, > +}; > + > +static int sun4i_frontend_bind(struct device *dev, struct device *master, > + void *data) > +{ > + struct platform_device *pdev = to_platform_device(dev); > + struct sun4i_frontend *frontend; > + struct drm_device *drm = data; > + struct sun4i_drv *drv = drm->dev_private; > + struct resource *res; > + void __iomem *regs; > + > + frontend = devm_kzalloc(dev, sizeof(*frontend), GFP_KERNEL); > + if (!frontend) > + return -ENOMEM; Blank line ? > + dev_set_drvdata(dev, frontend); > + frontend->node = dev->of_node; > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + regs = devm_ioremap_resource(dev, res); > + if (IS_ERR(regs)) > + return PTR_ERR(regs); > + > + frontend->regs = devm_regmap_init_mmio(dev, regs, > + &sun4i_frontend_regmap_config); > + if (IS_ERR(frontend->regs)) { > + dev_err(dev, "Couldn't create the frontend regmap\n"); > + return PTR_ERR(frontend->regs); > + } > + > + frontend->reset = devm_reset_control_get(dev, NULL); > + if (IS_ERR(frontend->reset)) { > + dev_err(dev, "Couldn't get our reset line\n"); > + return PTR_ERR(frontend->reset); > + } > + > + frontend->bus_clk = devm_clk_get(dev, "ahb"); > + if (IS_ERR(frontend->bus_clk)) { > + dev_err(dev, "Couldn't get our bus clock\n"); > + return PTR_ERR(frontend->bus_clk); > + } > + > + frontend->mod_clk = devm_clk_get(dev, "mod"); > + if (IS_ERR(frontend->mod_clk)) { > + dev_err(dev, "Couldn't get our mod clock\n"); > + return PTR_ERR(frontend->mod_clk); > + } > + > + frontend->ram_clk = devm_clk_get(dev, "ram"); > + if (IS_ERR(frontend->ram_clk)) { > + dev_err(dev, "Couldn't get our ram clock\n"); > + return PTR_ERR(frontend->ram_clk); > + } > + > + list_add_tail(&frontend->list, &drv->frontend_list); > + > + return 0; > +} > + > +static void sun4i_frontend_unbind(struct device *dev, struct device *master, > + void *data) > +{ > + struct sun4i_frontend *frontend = dev_get_drvdata(dev); > + > + clk_disable_unprepare(frontend->mod_clk); > + clk_disable_unprepare(frontend->bus_clk); Blank line ? > + reset_control_assert(frontend->reset); > +} > + > +static const struct component_ops sun4i_frontend_ops = { > + .bind = sun4i_frontend_bind, > + .unbind = sun4i_frontend_unbind, > +}; > + > +static int sun4i_frontend_probe(struct platform_device *pdev) > +{ > + return component_add(&pdev->dev, &sun4i_frontend_ops); > +} > + > +static int sun4i_frontend_remove(struct platform_device *pdev) > +{ > + component_del(&pdev->dev, &sun4i_frontend_ops); > + > + return 0; > +} > + > +static const struct of_device_id sun4i_frontend_of_table[] = { > + { .compatible = "allwinner,sun5i-a13-display-frontend" }, > + { .compatible = "allwinner,sun6i-a31-display-frontend" }, > + { .compatible = "allwinner,sun8i-a33-display-frontend" }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, sun4i_frontend_of_table); > + > +static struct platform_driver sun4i_frontend_driver = { > + .probe = sun4i_frontend_probe, > + .remove = sun4i_frontend_remove, > + .driver = { > + .name = "sun4i-frontend", > + .of_match_table = sun4i_frontend_of_table, > + }, > +}; > +module_platform_driver(sun4i_frontend_driver); > + > +MODULE_AUTHOR("Maxime Ripard "); > +MODULE_DESCRIPTION("Allwinner A10 Display Engine Frontend Driver"); > +MODULE_LICENSE("GPL"); > diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h > new file mode 100644 > index 000000000000..2df9f6de0f3f > --- /dev/null > +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h > @@ -0,0 +1,102 @@ // SPDX-Licence-Identifier... new format ? > +/* > + * Copyright (C) 2017 Free Electrons > + * > + * Maxime Ripard > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + */ > + > +#ifndef _SUN4I_FRONTEND_H_ > +#define _SUN4I_FRONTEND_H_ > + > +#include > +#include > + > +#define SUN4I_FRONTEND_EN_REG 0x000 > +#define SUN4I_FRONTEND_EN_EN BIT(0) > + > +#define SUN4I_FRONTEND_FRM_CTRL_REG 0x004 > +#define SUN4I_FRONTEND_FRM_CTRL_FRM_START BIT(16) > +#define SUN4I_FRONTEND_FRM_CTRL_COEF_RDY BIT(1) > +#define SUN4I_FRONTEND_FRM_CTRL_REG_RDY BIT(0) > + > +#define SUN4I_FRONTEND_BYPASS_REG 0x008 > +#define SUN4I_FRONTEND_BYPASS_CSC_EN BIT(1) > + > +#define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020 > + > +#define SUN4I_FRONTEND_LINESTRD0_REG 0x040 > + > +#define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c > +#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD(mod) ((mod) << 8) > +#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT(fmt) ((fmt) << 4) > +#define SUN4I_FRONTEND_INPUT_FMT_PS(ps) (ps) > + > +#define SUN4I_FRONTEND_OUTPUT_FMT_REG 0x05c > +#define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT(fmt) (fmt) > + > +#define SUN4I_FRONTEND_CH0_INSIZE_REG 0x100 > +#define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) > + > +#define SUN4I_FRONTEND_CH0_OUTSIZE_REG 0x104 > +#define SUN4I_FRONTEND_OUTSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) > + > +#define SUN4I_FRONTEND_CH0_HORZFACT_REG 0x108 > +#define SUN4I_FRONTEND_HORZFACT(i, f) (((i) << 16) | (f)) > + > +#define SUN4I_FRONTEND_CH0_VERTFACT_REG 0x10c > +#define SUN4I_FRONTEND_VERTFACT(i, f) (((i) << 16) | (f)) > + > +#define SUN4I_FRONTEND_CH0_HORZPHASE_REG 0x110 > +#define SUN4I_FRONTEND_CH0_VERTPHASE0_REG 0x114 > +#define SUN4I_FRONTEND_CH0_VERTPHASE1_REG 0x118 > + > +#define SUN4I_FRONTEND_CH1_INSIZE_REG 0x200 > +#define SUN4I_FRONTEND_CH1_OUTSIZE_REG 0x204 > +#define SUN4I_FRONTEND_CH1_HORZFACT_REG 0x208 > +#define SUN4I_FRONTEND_CH1_VERTFACT_REG 0x20c > + > +#define SUN4I_FRONTEND_CH1_HORZPHASE_REG 0x210 > +#define SUN4I_FRONTEND_CH1_VERTPHASE0_REG 0x214 > +#define SUN4I_FRONTEND_CH1_VERTPHASE1_REG 0x218 > + > +#define SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i) (0x400 + i * 4) > +#define SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i) (0x480 + i * 4) > +#define SUN4I_FRONTEND_CH0_VERTCOEF_REG(i) (0x500 + i * 4) > +#define SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i) (0x600 + i * 4) > +#define SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i) (0x680 + i * 4) > +#define SUN4I_FRONTEND_CH1_VERTCOEF_REG(i) (0x700 + i * 4) > + > +struct clk; > +struct device_node; > +struct drm_plane; > +struct regmap; > +struct reset_control; > + > +struct sun4i_frontend { > + struct list_head list; > + atomic_t users; > + struct device_node *node; > + > + struct clk *bus_clk; > + struct clk *mod_clk; > + struct clk *ram_clk; > + struct regmap *regs; > + struct reset_control *reset; > +}; > + > +int sun4i_frontend_init(struct sun4i_frontend *frontend); > +void sun4i_frontend_exit(struct sun4i_frontend *frontend); > +int sun4i_frontend_enable(struct sun4i_frontend *frontend); > + > +void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, > + struct drm_plane *plane); > +void sun4i_frontend_update_coord(struct sun4i_frontend *frontend, > + struct drm_plane *plane); > +int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, > + struct drm_plane *plane, uint32_t out_fmt); > + > +#endif /* _SUN4I_FRONTEND_H_ */ > Apart these nits, Reviewed-by: Neil Armstrong From mboxrd@z Thu Jan 1 00:00:00 1970 From: Neil Armstrong Subject: Re: [PATCH 5/8] drm/sun4i: Add a driver for the display frontend Date: Wed, 13 Dec 2017 17:10:24 +0100 Message-ID: <08145629-328d-9909-8b2c-261c5d8bf16c@baylibre.com> References: <600d29233eb0dcca3af815fbed8995e35f78b4ee.1513178989.git-series.maxime.ripard@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id E253B6E524 for ; Wed, 13 Dec 2017 16:10:27 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id r78so6068711wme.5 for ; Wed, 13 Dec 2017 08:10:27 -0800 (PST) In-Reply-To: <600d29233eb0dcca3af815fbed8995e35f78b4ee.1513178989.git-series.maxime.ripard@free-electrons.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Maxime Ripard , Daniel Vetter , David Airlie , Chen-Yu Tsai Cc: Thomas Petazzoni , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thomas@vitsch.nl List-Id: dri-devel@lists.freedesktop.org T24gMTMvMTIvMjAxNyAxNjozMywgTWF4aW1lIFJpcGFyZCB3cm90ZToKPiBUaGUgZGlzcGxheSBm cm9udGVuZCBpcyBhbiBoYXJkd2FyZSBibG9jayB0aGF0IGNhbiBiZSB1c2VkIHRvIGltcGxlbWVu dAo+IHNvbWUgbW9yZSBhZHZhbmNlZCBmZWF0dXJlcyBsaWtlIGhhcmR3YXJlIHNjYWxpbmcgb3Ig Y29sb3JzcGFjZQo+IGNvbnZlcnNpb25zLiBJdCBjYW4gYWxzbyBiZSB1c2VkIHRvIGltcGxlbWVu dCB0aGUgb3V0cHV0IGZvcm1hdCBvZiB0aGUgVlBVLgo+IAo+IExldCdzIGNyZWF0ZSBhIG1pbmlt YWwgZHJpdmVyIGZvciBpdCB0aGF0IHdpbGwgb25seSBlbmFibGUgdGhlIGhhcmR3YXJlCj4gc2Nh bGluZyBmZWF0dXJlcy4KPiAKPiBTaWduZWQtb2ZmLWJ5OiBNYXhpbWUgUmlwYXJkIDxtYXhpbWUu cmlwYXJkQGZyZWUtZWxlY3Ryb25zLmNvbT4KPiAtLS0KPiAgZHJpdmVycy9ncHUvZHJtL3N1bjRp L01ha2VmaWxlICAgICAgICAgfCAgIDMgKy0KPiAgZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRp X2JhY2tlbmQuYyAgfCAgIDUgKy0KPiAgZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2JhY2tl bmQuaCAgfCAgIDEgKy0KPiAgZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2Rydi5jICAgICAg fCAgMTYgKy0KPiAgZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2Rydi5oICAgICAgfCAgIDEg Ky0KPiAgZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2Zyb250ZW5kLmMgfCAzNzcgKysrKysr KysrKysrKysrKysrKysrKysrKystCj4gIGRyaXZlcnMvZ3B1L2RybS9zdW40aS9zdW40aV9mcm9u dGVuZC5oIHwgMTAyICsrKysrKystCj4gIDcgZmlsZXMgY2hhbmdlZCwgNTAwIGluc2VydGlvbnMo KyksIDUgZGVsZXRpb25zKC0pCj4gIGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0v c3VuNGkvc3VuNGlfZnJvbnRlbmQuYwo+ICBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9ncHUv ZHJtL3N1bjRpL3N1bjRpX2Zyb250ZW5kLmgKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUv ZHJtL3N1bjRpL01ha2VmaWxlIGIvZHJpdmVycy9ncHUvZHJtL3N1bjRpL01ha2VmaWxlCj4gaW5k ZXggMGMyZjhjN2ZhY2FlLi5iNjYwZDgyMDExZjQgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUv ZHJtL3N1bjRpL01ha2VmaWxlCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3N1bjRpL01ha2VmaWxl Cj4gQEAgLTEsNSArMSw2IEBACj4gICMgU1BEWC1MaWNlbnNlLUlkZW50aWZpZXI6IEdQTC0yLjAK PiAgc3VuNGktYmFja2VuZC15CQkJKz0gc3VuNGlfYmFja2VuZC5vIHN1bjRpX2xheWVyLm8KPiAr c3VuNGktZnJvbnRlbmQteQkJKz0gc3VuNGlfZnJvbnRlbmQubwo+ICAKPiAgc3VuNGktZHJtLXkJ CQkrPSBzdW40aV9kcnYubwo+ICBzdW40aS1kcm0teQkJCSs9IHN1bjRpX2ZyYW1lYnVmZmVyLm8K PiBAQCAtMjEsNiArMjIsNiBAQCBvYmotJChDT05GSUdfRFJNX1NVTjRJKQkJKz0gc3VuNGktdGNv bi5vCj4gIG9iai0kKENPTkZJR19EUk1fU1VONEkpCQkrPSBzdW40aV90di5vCj4gIG9iai0kKENP TkZJR19EUk1fU1VONEkpCQkrPSBzdW42aV9kcmMubwo+ICAKPiAtb2JqLSQoQ09ORklHX0RSTV9T VU40SV9CQUNLRU5EKQkrPSBzdW40aS1iYWNrZW5kLm8KPiArb2JqLSQoQ09ORklHX0RSTV9TVU40 SV9CQUNLRU5EKQkrPSBzdW40aS1iYWNrZW5kLm8gc3VuNGktZnJvbnRlbmQubwo+ICBvYmotJChD T05GSUdfRFJNX1NVTjRJX0hETUkpCSs9IHN1bjRpLWRybS1oZG1pLm8KPiAgb2JqLSQoQ09ORklH X0RSTV9TVU44SV9NSVhFUikJKz0gc3VuOGktbWl4ZXIubwo+IGRpZmYgLS1naXQgYS9kcml2ZXJz L2dwdS9kcm0vc3VuNGkvc3VuNGlfYmFja2VuZC5jIGIvZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1 bjRpX2JhY2tlbmQuYwo+IGluZGV4IGY5NzFkM2ZiNWVlNC4uZTgzZTFmZTQzODIzIDEwMDY0NAo+ IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9zdW40aS9zdW40aV9iYWNrZW5kLmMKPiArKysgYi9kcml2 ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlfYmFja2VuZC5jCj4gQEAgLTM2Nyw2ICszNjcsMTEgQEAg c3RhdGljIGludCBzdW40aV9iYWNrZW5kX2JpbmQoc3RydWN0IGRldmljZSAqZGV2LCBzdHJ1Y3Qg ZGV2aWNlICptYXN0ZXIsCj4gIAlpZiAoYmFja2VuZC0+ZW5naW5lLmlkIDwgMCkKPiAgCQlyZXR1 cm4gYmFja2VuZC0+ZW5naW5lLmlkOwo+ICAKPiArCWJhY2tlbmQtPmZyb250ZW5kID0gc3VuNGlf YmFja2VuZF9maW5kX2Zyb250ZW5kKGRydiwgZGV2LT5vZl9ub2RlKTsKPiArCWlmIChJU19FUlIo YmFja2VuZC0+ZnJvbnRlbmQpKSB7Cj4gKwkJZGV2X2VycihkZXYsICJDb3VsZG4ndCBmaW5kIG1h dGNoaW5nIGZyb250ZW5kLCBmcm9udGVuZCBmZWF0dXJlcyBkaXNhYmxlZFxuIik7CgpNYXliZSBh IGRldl93YXJuID8KCj4gKwl9Cj4gKwo+ICAJcmVzID0gcGxhdGZvcm1fZ2V0X3Jlc291cmNlKHBk ZXYsIElPUkVTT1VSQ0VfTUVNLCAwKTsKPiAgCXJlZ3MgPSBkZXZtX2lvcmVtYXBfcmVzb3VyY2Uo ZGV2LCByZXMpOwo+ICAJaWYgKElTX0VSUihyZWdzKSkKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9n cHUvZHJtL3N1bjRpL3N1bjRpX2JhY2tlbmQuaCBiL2RyaXZlcnMvZ3B1L2RybS9zdW40aS9zdW40 aV9iYWNrZW5kLmgKPiBpbmRleCBhYzNjYzAyOWY1Y2QuLmJhMTQxMGZkNTQxMCAxMDA2NDQKPiAt LS0gYS9kcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlfYmFja2VuZC5oCj4gKysrIGIvZHJpdmVy cy9ncHUvZHJtL3N1bjRpL3N1bjRpX2JhY2tlbmQuaAo+IEBAIC0xNDUsNiArMTQ1LDcgQEAKPiAg Cj4gIHN0cnVjdCBzdW40aV9iYWNrZW5kIHsKPiAgCXN0cnVjdCBzdW54aV9lbmdpbmUJZW5naW5l Owo+ICsJc3RydWN0IHN1bjRpX2Zyb250ZW5kCSpmcm9udGVuZDsKPiAgCj4gIAlzdHJ1Y3QgcmVz ZXRfY29udHJvbAkqcmVzZXQ7Cj4gIAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vc3Vu NGkvc3VuNGlfZHJ2LmMgYi9kcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlfZHJ2LmMKPiBpbmRl eCA3NWM3NmNkZDgyYmMuLjE3YmY5YmZkOThiYSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9k cm0vc3VuNGkvc3VuNGlfZHJ2LmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlf ZHJ2LmMKPiBAQCAtOTgsNiArOTgsNyBAQCBzdGF0aWMgaW50IHN1bjRpX2Rydl9iaW5kKHN0cnVj dCBkZXZpY2UgKmRldikKPiAgCQlnb3RvIGZyZWVfZHJtOwo+ICAJfQo+ICAJZHJtLT5kZXZfcHJp dmF0ZSA9IGRydjsKPiArCUlOSVRfTElTVF9IRUFEKCZkcnYtPmZyb250ZW5kX2xpc3QpOwo+ICAJ SU5JVF9MSVNUX0hFQUQoJmRydi0+ZW5naW5lX2xpc3QpOwo+ICAJSU5JVF9MSVNUX0hFQUQoJmRy di0+dGNvbl9saXN0KTsKPiAgCj4gQEAgLTIzOSw5ICsyNDAsMTEgQEAgc3RhdGljIGludCBzdW40 aV9kcnZfYWRkX2VuZHBvaW50cyhzdHJ1Y3QgZGV2aWNlICpkZXYsCj4gIAlpbnQgY291bnQgPSAw Owo+ICAKPiAgCS8qCj4gLQkgKiBXZSBkb24ndCBzdXBwb3J0IHRoZSBmcm9udGVuZCBmb3Igbm93 LCBzbyB3ZSB3aWxsIG5ldmVyCj4gLQkgKiBoYXZlIGEgZGV2aWNlIGJvdW5kLiBKdXN0IHNraXAg b3ZlciBpdCwgYnV0IHdlIHN0aWxsIHdhbnQKPiAtCSAqIHRoZSByZXN0IG91ciBwaXBlbGluZSB0 byBiZSBhZGRlZC4KPiArCSAqIFRoZSBmcm9udGVuZCBoYXMgYmVlbiBkaXNhYmxlZCBpbiBhbGwg b2Ygb3VyIG9sZCBkZXZpY2UKPiArCSAqIHRyZWVzLiBJZiB3ZSBmaW5kIGEgbm9kZSB0aGF0IGlz IHRoZSBmcm9udGVuZCBhbmQgaXMKPiArCSAqIGRpc2FibGVkLCB3ZSBzaG91bGQganVzdCBmb2xs b3cgdGhyb3VnaCBhbmQgcGFyc2UgaXRzCj4gKwkgKiBjaGlsZCwgYnV0IHdpdGhvdXQgYWRkaW5n IGl0IHRvIHRoZSBjb21wb25lbnQgbGlzdC4KPiArCSAqIE90aGVyd2lzZSwgd2Ugb2J2aW91c2x5 IHdhbnQgdG8gYWRkIGl0IHRvIHRoZSBsaXN0Lgo+ICAJICovCj4gIAlpZiAoIXN1bjRpX2Rydl9u b2RlX2lzX2Zyb250ZW5kKG5vZGUpICYmCj4gIAkgICAgIW9mX2RldmljZV9pc19hdmFpbGFibGUo bm9kZSkpCj4gQEAgLTI1NCw3ICsyNTcsMTIgQEAgc3RhdGljIGludCBzdW40aV9kcnZfYWRkX2Vu ZHBvaW50cyhzdHJ1Y3QgZGV2aWNlICpkZXYsCj4gIAlpZiAoc3VuNGlfZHJ2X25vZGVfaXNfY29u bmVjdG9yKG5vZGUpKQo+ICAJCXJldHVybiAwOwo+ICAKPiAtCWlmICghc3VuNGlfZHJ2X25vZGVf aXNfZnJvbnRlbmQobm9kZSkpIHsKPiArCS8qCj4gKwkgKiBJZiB0aGUgZGV2aWNlIGlzIGVpdGhl ciBqdXN0IGEgcmVndWxhciBkZXZpY2UsIG9yIGFuCj4gKwkgKiBlbmFibGVkIGZyb250ZW5kLCB3 ZSBhZGQgaXQgdG8gb3VyIGNvbXBvbmVudCBsaXN0Lgo+ICsJICovCj4gKwlpZiAoIXN1bjRpX2Ry dl9ub2RlX2lzX2Zyb250ZW5kKG5vZGUpIHx8Cj4gKwkgICAgKHN1bjRpX2Rydl9ub2RlX2lzX2Zy b250ZW5kKG5vZGUpICYmIG9mX2RldmljZV9pc19hdmFpbGFibGUobm9kZSkpKSB7Cj4gIAkJLyog QWRkIGN1cnJlbnQgY29tcG9uZW50ICovCj4gIAkJRFJNX0RFQlVHX0RSSVZFUigiQWRkaW5nIGNv bXBvbmVudCAlcE9GXG4iLCBub2RlKTsKPiAgCQlkcm1fb2ZfY29tcG9uZW50X21hdGNoX2FkZChk ZXYsIG1hdGNoLCBjb21wYXJlX29mLCBub2RlKTsKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUv ZHJtL3N1bjRpL3N1bjRpX2Rydi5oIGIvZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2Rydi5o Cj4gaW5kZXggYTk2MGM4OTI3MGNjLi45YzI2YTM0NWY4NWMgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVy cy9ncHUvZHJtL3N1bjRpL3N1bjRpX2Rydi5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3N1bjRp L3N1bjRpX2Rydi5oCj4gQEAgLTE5LDYgKzE5LDcgQEAKPiAgCj4gIHN0cnVjdCBzdW40aV9kcnYg ewo+ICAJc3RydWN0IGxpc3RfaGVhZAllbmdpbmVfbGlzdDsKPiArCXN0cnVjdCBsaXN0X2hlYWQJ ZnJvbnRlbmRfbGlzdDsKPiAgCXN0cnVjdCBsaXN0X2hlYWQJdGNvbl9saXN0Owo+ICAKPiAgCXN0 cnVjdCBkcm1fZmJkZXZfY21hCSpmYmRldjsKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJt L3N1bjRpL3N1bjRpX2Zyb250ZW5kLmMgYi9kcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlfZnJv bnRlbmQuYwo+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMDAwMDAwLi4xYmUw ZTg2ZDE0NTcKPiAtLS0gL2Rldi9udWxsCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1 bjRpX2Zyb250ZW5kLmMKPiBAQCAtMCwwICsxLDM3NyBAQAoKLy8gU1BEWC1MaWNlbmNlLUlkZW50 aWZpZXIuLi4gbmV3IGZvcm1hdCA/Cgo+ICsvKgo+ICsgKiBDb3B5cmlnaHQgKEMpIDIwMTcgRnJl ZSBFbGVjdHJvbnMKPiArICoKPiArICogTWF4aW1lIFJpcGFyZCA8bWF4aW1lLnJpcGFyZEBmcmVl LWVsZWN0cm9ucy5jb20+Cj4gKyAqCj4gKyAqIFRoaXMgcHJvZ3JhbSBpcyBmcmVlIHNvZnR3YXJl OyB5b3UgY2FuIHJlZGlzdHJpYnV0ZSBpdCBhbmQvb3IKPiArICogbW9kaWZ5IGl0IHVuZGVyIHRo ZSB0ZXJtcyBvZiB0aGUgR05VIEdlbmVyYWwgUHVibGljIExpY2Vuc2UgYXMKPiArICogcHVibGlz aGVkIGJ5IHRoZSBGcmVlIFNvZnR3YXJlIEZvdW5kYXRpb247IGVpdGhlciB2ZXJzaW9uIDIgb2YK PiArICogdGhlIExpY2Vuc2UsIG9yIChhdCB5b3VyIG9wdGlvbikgYW55IGxhdGVyIHZlcnNpb24u Cj4gKyAqLwo+ICsjaW5jbHVkZSA8ZHJtL2RybVAuaD4KPiArI2luY2x1ZGUgPGRybS9kcm1fZ2Vt X2NtYV9oZWxwZXIuaD4KPiArI2luY2x1ZGUgPGRybS9kcm1fZmJfY21hX2hlbHBlci5oPgo+ICsK PiArI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgo+ICsjaW5jbHVkZSA8bGludXgvY29tcG9uZW50Lmg+ Cj4gKyNpbmNsdWRlIDxsaW51eC9tb2R1bGUuaD4KPiArI2luY2x1ZGUgPGxpbnV4L3BsYXRmb3Jt X2RldmljZS5oPgo+ICsjaW5jbHVkZSA8bGludXgvcmVnbWFwLmg+Cj4gKyNpbmNsdWRlIDxsaW51 eC9yZXNldC5oPgo+ICsKPiArI2luY2x1ZGUgInN1bjRpX2Rydi5oIgo+ICsjaW5jbHVkZSAic3Vu NGlfZnJvbnRlbmQuaCIKPiArCj4gK3N0YXRpYyBjb25zdCB1MzIgc3VuNGlfZnJvbnRlbmRfdmVy dF9jb2VmWzMyXSA9IHsKPiArCTB4MDAwMDQwMDAsIDB4MDAwMTQwZmYsIDB4MDAwMzNmZmUsIDB4 MDAwNDNmZmQsCj4gKwkweDAwMDYzZWZjLCAweGZmMDgzZGZjLCAweDAwMGEzYmZiLCAweGZmMGQz OWZiLAo+ICsJMHhmZjBmMzdmYiwgMHhmZjExMzZmYSwgMHhmZTE0MzNmYiwgMHhmZTE2MzFmYiwK PiArCTB4ZmQxOTJmZmIsIDB4ZmQxYzJjZmIsIDB4ZmQxZjI5ZmIsIDB4ZmMyMTI3ZmMsCj4gKwkw eGZjMjQyNGZjLCAweGZjMjcyMWZjLCAweGZiMjkxZmZkLCAweGZiMmMxY2ZkLAo+ICsJMHhmYjJm MTlmZCwgMHhmYjMxMTZmZSwgMHhmYjMzMTRmZSwgMHhmYTM2MTFmZiwKPiArCTB4ZmIzNzBmZmYs IDB4ZmIzOTBkZmYsIDB4ZmIzYjBhMDAsIDB4ZmMzZDA4ZmYsCj4gKwkweGZjM2UwNjAwLCAweGZk M2YwNDAwLCAweGZlM2YwMzAwLCAweGZmNDAwMTAwLAo+ICt9Owo+ICsKPiArc3RhdGljIGNvbnN0 IHUzMiBzdW40aV9mcm9udGVuZF9ob3J6X2NvZWZbNjRdID0gewo+ICsJMHg0MDAwMDAwMCwgMHgw MDAwMDAwMCwgMHg0MGZlMDAwMCwgMHgwMDAwZmYwMywKPiArCTB4M2ZmZDAwMDAsIDB4MDAwMGZm MDUsIDB4M2ZmYzAwMDAsIDB4MDAwMGZmMDYsCj4gKwkweDNlZmIwMDAwLCAweDAwMDBmZjA4LCAw eDNkZmIwMDAwLCAweDAwMDBmZjA5LAo+ICsJMHgzYmZhMDAwMCwgMHgwMDAwZmUwZCwgMHgzOWZh MDAwMCwgMHgwMDAwZmUwZiwKPiArCTB4MzhmYTAwMDAsIDB4MDAwMGZlMTAsIDB4MzZmYTAwMDAs IDB4MDAwMGZlMTIsCj4gKwkweDMzZmEwMDAwLCAweDAwMDBmZDE2LCAweDMxZmEwMDAwLCAweDAw MDBmZDE4LAo+ICsJMHgyZmZhMDAwMCwgMHgwMDAwZmQxYSwgMHgyY2ZhMDAwMCwgMHgwMDAwZmMx ZSwKPiArCTB4MjlmYTAwMDAsIDB4MDAwMGZjMjEsIDB4MjdmYjAwMDAsIDB4MDAwMGZiMjMsCj4g KwkweDI0ZmIwMDAwLCAweDAwMDBmYjI2LCAweDIxZmIwMDAwLCAweDAwMDBmYjI5LAo+ICsJMHgx ZmZjMDAwMCwgMHgwMDAwZmEyYiwgMHgxY2ZjMDAwMCwgMHgwMDAwZmEyZSwKPiArCTB4MTlmZDAw MDAsIDB4MDAwMGZhMzAsIDB4MTZmZDAwMDAsIDB4MDAwMGZhMzMsCj4gKwkweDE0ZmQwMDAwLCAw eDAwMDBmYTM1LCAweDExZmUwMDAwLCAweDAwMDBmYTM3LAo+ICsJMHgwZmZlMDAwMCwgMHgwMDAw ZmEzOSwgMHgwZGZlMDAwMCwgMHgwMDAwZmEzYiwKPiArCTB4MGFmZTAwMDAsIDB4MDAwMGZhM2Us IDB4MDhmZjAwMDAsIDB4MDAwMGZiM2UsCj4gKwkweDA2ZmYwMDAwLCAweDAwMDBmYjQwLCAweDA1 ZmYwMDAwLCAweDAwMDBmYzQwLAo+ICsJMHgwM2ZmMDAwMCwgMHgwMDAwZmQ0MSwgMHgwMWZmMDAw MCwgMHgwMDAwZmU0MiwKPiArfTsKPiArCj4gK3N0YXRpYyB2b2lkIHN1bjRpX2Zyb250ZW5kX3Nj YWxlcl9pbml0KHN0cnVjdCBzdW40aV9mcm9udGVuZCAqZnJvbnRlbmQpCj4gK3sKPiArCWludCBp Owo+ICsKPiArCWZvciAoaSA9IDA7IGkgPCAzMjsgaSsrKSB7Cj4gKwkJcmVnbWFwX3dyaXRlKGZy b250ZW5kLT5yZWdzLCBTVU40SV9GUk9OVEVORF9DSDBfSE9SWkNPRUYwX1JFRyhpKSwKPiArCQkJ ICAgICBzdW40aV9mcm9udGVuZF9ob3J6X2NvZWZbMiAqIGldKTsKPiArCQlyZWdtYXBfd3JpdGUo ZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZST05URU5EX0NIMV9IT1JaQ09FRjBfUkVHKGkpLAo+ICsJ CQkgICAgIHN1bjRpX2Zyb250ZW5kX2hvcnpfY29lZlsyICogaV0pOwo+ICsJCXJlZ21hcF93cml0 ZShmcm9udGVuZC0+cmVncywgU1VONElfRlJPTlRFTkRfQ0gwX0hPUlpDT0VGMV9SRUcoaSksCj4g KwkJCSAgICAgc3VuNGlfZnJvbnRlbmRfaG9yel9jb2VmWzIgKiBpICsgMV0pOwo+ICsJCXJlZ21h cF93cml0ZShmcm9udGVuZC0+cmVncywgU1VONElfRlJPTlRFTkRfQ0gxX0hPUlpDT0VGMV9SRUco aSksCj4gKwkJCSAgICAgc3VuNGlfZnJvbnRlbmRfaG9yel9jb2VmWzIgKiBpICsgMV0pOwo+ICsJ CXJlZ21hcF93cml0ZShmcm9udGVuZC0+cmVncywgU1VONElfRlJPTlRFTkRfQ0gwX1ZFUlRDT0VG X1JFRyhpKSwKPiArCQkJICAgICBzdW40aV9mcm9udGVuZF92ZXJ0X2NvZWZbaV0pOwo+ICsJCXJl Z21hcF93cml0ZShmcm9udGVuZC0+cmVncywgU1VONElfRlJPTlRFTkRfQ0gxX1ZFUlRDT0VGX1JF RyhpKSwKPiArCQkJICAgICBzdW40aV9mcm9udGVuZF92ZXJ0X2NvZWZbaV0pOwo+ICsJfQo+ICsK PiArCXJlZ21hcF91cGRhdGVfYml0cyhmcm9udGVuZC0+cmVncywgU1VONElfRlJPTlRFTkRfRlJN X0NUUkxfUkVHLCBCSVQoMjMpLCBCSVQoMjMpKTsKPiArfQo+ICsKPiAraW50IHN1bjRpX2Zyb250 ZW5kX2luaXQoc3RydWN0IHN1bjRpX2Zyb250ZW5kICpmcm9udGVuZCkKPiArewo+ICsJaW50IHJl dDsKPiArCj4gKwlpZiAoYXRvbWljX3JlYWQoJmZyb250ZW5kLT51c2VycykpCj4gKwkJcmV0dXJu IC1FQlVTWTsKPiArCj4gKwlyZXQgPSByZXNldF9jb250cm9sX2RlYXNzZXJ0KGZyb250ZW5kLT5y ZXNldCk7Cj4gKwlpZiAocmV0KSB7Cj4gKwkJRFJNX0RFQlVHX0RSSVZFUigiQ291bGRuJ3QgZGVh c3NlcnQgb3VyIHJlc2V0IGxpbmVcbiIpOwo+ICsJCXJldHVybiByZXQ7Cj4gKwl9Cj4gKwo+ICsJ Y2xrX3NldF9yYXRlKGZyb250ZW5kLT5tb2RfY2xrLCAzMDAwMDAwMDApOwo+ICsKPiArCWNsa19w cmVwYXJlX2VuYWJsZShmcm9udGVuZC0+YnVzX2Nsayk7Cj4gKwljbGtfcHJlcGFyZV9lbmFibGUo ZnJvbnRlbmQtPm1vZF9jbGspOwo+ICsJY2xrX3ByZXBhcmVfZW5hYmxlKGZyb250ZW5kLT5yYW1f Y2xrKTsKPiArCj4gKwlyZWdtYXBfdXBkYXRlX2JpdHMoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZS T05URU5EX0VOX1JFRywKPiArCQkJICAgU1VONElfRlJPTlRFTkRfRU5fRU4sCj4gKwkJCSAgIFNV TjRJX0ZST05URU5EX0VOX0VOKTsKPiArCj4gKwlyZWdtYXBfdXBkYXRlX2JpdHMoZnJvbnRlbmQt PnJlZ3MsIFNVTjRJX0ZST05URU5EX0JZUEFTU19SRUcsCj4gKwkJCSAgIFNVTjRJX0ZST05URU5E X0JZUEFTU19DU0NfRU4sCj4gKwkJCSAgIFNVTjRJX0ZST05URU5EX0JZUEFTU19DU0NfRU4pOwo+ ICsKPiArCXN1bjRpX2Zyb250ZW5kX3NjYWxlcl9pbml0KGZyb250ZW5kKTsKPiArCj4gKwlhdG9t aWNfaW5jKCZmcm9udGVuZC0+dXNlcnMpOwo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gK0VYUE9S VF9TWU1CT0woc3VuNGlfZnJvbnRlbmRfaW5pdCk7Cj4gKwo+ICt2b2lkIHN1bjRpX2Zyb250ZW5k X2V4aXQoc3RydWN0IHN1bjRpX2Zyb250ZW5kICpmcm9udGVuZCkKPiArewo+ICsJYXRvbWljX2Rl YygmZnJvbnRlbmQtPnVzZXJzKTsKPiArCj4gKwljbGtfZGlzYWJsZV91bnByZXBhcmUoZnJvbnRl bmQtPnJhbV9jbGspOwo+ICsJY2xrX2Rpc2FibGVfdW5wcmVwYXJlKGZyb250ZW5kLT5tb2RfY2xr KTsKPiArCWNsa19kaXNhYmxlX3VucHJlcGFyZShmcm9udGVuZC0+YnVzX2Nsayk7CgpNYXliZSBh IGJsYW5rIGxpbmUgPwoKPiArCXJlc2V0X2NvbnRyb2xfYXNzZXJ0KGZyb250ZW5kLT5yZXNldCk7 Cj4gK30KPiArRVhQT1JUX1NZTUJPTChzdW40aV9mcm9udGVuZF9leGl0KTsKPiArCj4gK3ZvaWQg c3VuNGlfZnJvbnRlbmRfdXBkYXRlX2J1ZmZlcihzdHJ1Y3Qgc3VuNGlfZnJvbnRlbmQgKmZyb250 ZW5kLAo+ICsJCQkJICBzdHJ1Y3QgZHJtX3BsYW5lICpwbGFuZSkKPiArewo+ICsJc3RydWN0IGRy bV9wbGFuZV9zdGF0ZSAqc3RhdGUgPSBwbGFuZS0+c3RhdGU7Cj4gKwlzdHJ1Y3QgZHJtX2ZyYW1l YnVmZmVyICpmYiA9IHN0YXRlLT5mYjsKPiArCXN0cnVjdCBkcm1fZ2VtX2NtYV9vYmplY3QgKmdl bTsKPiArCWRtYV9hZGRyX3QgcGFkZHI7Cj4gKwlpbnQgYnBwOwo+ICsKPiArCS8qIEdldCB0aGUg cGh5c2ljYWwgYWRkcmVzcyBvZiB0aGUgYnVmZmVyIGluIG1lbW9yeSAqLwo+ICsJZ2VtID0gZHJt X2ZiX2NtYV9nZXRfZ2VtX29iaihmYiwgMCk7Cj4gKwo+ICsJRFJNX0RFQlVHX0RSSVZFUigiVXNp bmcgR0VNIEAgJXBhZFxuIiwgJmdlbS0+cGFkZHIpOwo+ICsKPiArCS8qIFNldCB0aGUgbGluZSB3 aWR0aCAqLwo+ICsJRFJNX0RFQlVHX0RSSVZFUigiRnJvbnRlbmQgc3RyaWRlOiAlZCBieXRlc1xu IiwgZmItPnBpdGNoZXNbMF0pOwo+ICsJcmVnbWFwX3dyaXRlKGZyb250ZW5kLT5yZWdzLCBTVU40 SV9GUk9OVEVORF9MSU5FU1RSRDBfUkVHLAo+ICsJCSAgICAgZmItPnBpdGNoZXNbMF0pOwo+ICsK PiArCS8qIENvbXB1dGUgdGhlIHN0YXJ0IG9mIHRoZSBkaXNwbGF5ZWQgbWVtb3J5ICovCj4gKwli cHAgPSBmYi0+Zm9ybWF0LT5jcHBbMF07Cj4gKwlwYWRkciA9IGdlbS0+cGFkZHIgKyBmYi0+b2Zm c2V0c1swXTsKPiArCXBhZGRyICs9IChzdGF0ZS0+c3JjX3ggPj4gMTYpICogYnBwOwo+ICsJcGFk ZHIgKz0gKHN0YXRlLT5zcmNfeSA+PiAxNikgKiBmYi0+cGl0Y2hlc1swXTsKPiArCj4gKwlEUk1f REVCVUdfRFJJVkVSKCJTZXR0aW5nIGJ1ZmZlciBhZGRyZXNzIHRvICVwYWRcbiIsICZwYWRkcik7 Cj4gKwlyZWdtYXBfd3JpdGUoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZST05URU5EX0JVRl9BRERS MF9SRUcsIHBhZGRyKTsKPiArfQo+ICsKPiArc3RhdGljIGludCBzdW40aV9mcm9udGVuZF9kcm1f Zm9ybWF0X3RvX2lucHV0X2ZtdCh1aW50MzJfdCBmbXQsIHUzMiAqdmFsKQo+ICt7Cj4gKwlzd2l0 Y2ggKGZtdCkgewo+ICsJY2FzZSBEUk1fRk9STUFUX0FSR0I4ODg4Ogo+ICsJY2FzZSBEUk1fRk9S TUFUX1hSR0I4ODg4Ogo+ICsJCSp2YWwgPSAzOwo+ICsJCXJldHVybiAwOwo+ICsKPiArCWRlZmF1 bHQ6Cj4gKwkJcmV0dXJuIC1FSU5WQUw7Cj4gKwl9Cj4gK30KPiArCj4gK3N0YXRpYyBpbnQgc3Vu NGlfZnJvbnRlbmRfZHJtX2Zvcm1hdF90b19vdXRwdXRfZm10KHVpbnQzMl90IGZtdCwgdTMyICp2 YWwpCj4gK3sKPiArCXN3aXRjaCAoZm10KSB7Cj4gKwljYXNlIERSTV9GT1JNQVRfQVJHQjg4ODg6 Cj4gKwkJKnZhbCA9IDI7Cj4gKwkJcmV0dXJuIDA7Cj4gKwo+ICsJZGVmYXVsdDoKPiArCQlyZXR1 cm4gLUVJTlZBTDsKPiArCX0KPiArfQo+ICsKPiAraW50IHN1bjRpX2Zyb250ZW5kX3VwZGF0ZV9m b3JtYXRzKHN0cnVjdCBzdW40aV9mcm9udGVuZCAqZnJvbnRlbmQsCj4gKwkJCQkgIHN0cnVjdCBk cm1fcGxhbmUgKnBsYW5lLCB1aW50MzJfdCBvdXRfZm10KQo+ICt7Cj4gKwlzdHJ1Y3QgZHJtX3Bs YW5lX3N0YXRlICpzdGF0ZSA9IHBsYW5lLT5zdGF0ZTsKPiArCXN0cnVjdCBkcm1fZnJhbWVidWZm ZXIgKmZiID0gc3RhdGUtPmZiOwo+ICsJdTMyIG91dF9mbXRfdmFsOwo+ICsJdTMyIGluX2ZtdF92 YWw7Cj4gKwlpbnQgcmV0Owo+ICsKPiArCXJldCA9IHN1bjRpX2Zyb250ZW5kX2RybV9mb3JtYXRf dG9faW5wdXRfZm10KGZiLT5mb3JtYXQtPmZvcm1hdCwKPiArCQkJCQkJICAgICAmaW5fZm10X3Zh bCk7Cj4gKwlpZiAocmV0KSB7Cj4gKwkJRFJNX0RFQlVHX0RSSVZFUigiSW52YWxpZCBpbnB1dCBm b3JtYXRcbiIpOwo+ICsJCXJldHVybiByZXQ7Cj4gKwl9Cj4gKwo+ICsJcmV0ID0gc3VuNGlfZnJv bnRlbmRfZHJtX2Zvcm1hdF90b19vdXRwdXRfZm10KG91dF9mbXQsICZvdXRfZm10X3ZhbCk7Cj4g KwlpZiAocmV0KSB7Cj4gKwkJRFJNX0RFQlVHX0RSSVZFUigiSW52YWxpZCBvdXRwdXQgZm9ybWF0 XG4iKTsKPiArCQlyZXR1cm4gcmV0Owo+ICsJfQo+ICsKPiArCXJlZ21hcF93cml0ZShmcm9udGVu ZC0+cmVncywgU1VONElfRlJPTlRFTkRfQ0gwX0hPUlpQSEFTRV9SRUcsIDB4NDAwKTsKPiArCXJl Z21hcF93cml0ZShmcm9udGVuZC0+cmVncywgU1VONElfRlJPTlRFTkRfQ0gxX0hPUlpQSEFTRV9S RUcsIDB4NDAwKTsKPiArCj4gKwlyZWdtYXBfd3JpdGUoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZS T05URU5EX0NIMF9WRVJUUEhBU0UwX1JFRywgMHg0MDApOwo+ICsJcmVnbWFwX3dyaXRlKGZyb250 ZW5kLT5yZWdzLCBTVU40SV9GUk9OVEVORF9DSDFfVkVSVFBIQVNFMF9SRUcsIDB4NDAwKTsKPiAr Cj4gKwlyZWdtYXBfd3JpdGUoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZST05URU5EX0NIMF9WRVJU UEhBU0UxX1JFRywgMHg0MDApOwo+ICsJcmVnbWFwX3dyaXRlKGZyb250ZW5kLT5yZWdzLCBTVU40 SV9GUk9OVEVORF9DSDFfVkVSVFBIQVNFMV9SRUcsIDB4NDAwKTsKPiArCj4gKwlyZWdtYXBfd3Jp dGUoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZST05URU5EX0lOUFVUX0ZNVF9SRUcsIDB4MTUxKTsK PiArCQkgICAgIC8qIFNVTjRJX0ZST05URU5EX0lOUFVUX0ZNVF9EQVRBX01PRCgxKSB8ICovCj4g KwkJICAgICAvKiBTVU40SV9GUk9OVEVORF9JTlBVVF9GTVRfREFUQV9GTVQoNSkgfCAqLwo+ICsJ CSAgICAgLyogU1VONElfRlJPTlRFTkRfSU5QVVRfRk1UX1BTKDEpKTsgKi8KCldoeSBhcmUgdGhl c2UgY29tbWVudGVkID8KCj4gKwlyZWdtYXBfd3JpdGUoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZS T05URU5EX09VVFBVVF9GTVRfUkVHLCAweDgyKTsKPiArCQkgICAgIC8qIFNVTjRJX0ZST05URU5E X09VVFBVVF9GTVRfREFUQV9GTVQoMSkpOyAqLwoKU2FtZSBoZXJlCgo+ICsKPiArCXJldHVybiAw Owo+ICt9Cj4gKwo+ICt2b2lkIHN1bjRpX2Zyb250ZW5kX3VwZGF0ZV9jb29yZChzdHJ1Y3Qgc3Vu NGlfZnJvbnRlbmQgKmZyb250ZW5kLAo+ICsJCQkJIHN0cnVjdCBkcm1fcGxhbmUgKnBsYW5lKQo+ ICt7Cj4gKwlzdHJ1Y3QgZHJtX3BsYW5lX3N0YXRlICpzdGF0ZSA9IHBsYW5lLT5zdGF0ZTsKPiAr Cj4gKwkvKiBTZXQgaGVpZ2h0IGFuZCB3aWR0aCAqLwo+ICsJRFJNX0RFQlVHX0RSSVZFUigiRnJv bnRlbmQgc2l6ZSBXOiAldSBIOiAldVxuIiwKPiArCQkJIHN0YXRlLT5jcnRjX3csIHN0YXRlLT5j cnRjX2gpOwo+ICsJcmVnbWFwX3dyaXRlKGZyb250ZW5kLT5yZWdzLCBTVU40SV9GUk9OVEVORF9D SDBfSU5TSVpFX1JFRywKPiArCQkgICAgIFNVTjRJX0ZST05URU5EX0lOU0laRShzdGF0ZS0+c3Jj X2ggPj4gMTYsCj4gKwkJCQkJICAgc3RhdGUtPnNyY193ID4+IDE2KSk7Cj4gKwlyZWdtYXBfd3Jp dGUoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJX0ZST05URU5EX0NIMV9JTlNJWkVfUkVHLAo+ICsJCSAg ICAgU1VONElfRlJPTlRFTkRfSU5TSVpFKHN0YXRlLT5zcmNfaCA+PiAxNiwKPiArCQkJCQkgICBz dGF0ZS0+c3JjX3cgPj4gMTYpKTsKPiArCj4gKwlyZWdtYXBfd3JpdGUoZnJvbnRlbmQtPnJlZ3Ms IFNVTjRJX0ZST05URU5EX0NIMF9PVVRTSVpFX1JFRywKPiArCQkgICAgIFNVTjRJX0ZST05URU5E X09VVFNJWkUoc3RhdGUtPmNydGNfaCwgc3RhdGUtPmNydGNfdykpOwo+ICsJcmVnbWFwX3dyaXRl KGZyb250ZW5kLT5yZWdzLCBTVU40SV9GUk9OVEVORF9DSDFfT1VUU0laRV9SRUcsCj4gKwkJICAg ICBTVU40SV9GUk9OVEVORF9PVVRTSVpFKHN0YXRlLT5jcnRjX2gsIHN0YXRlLT5jcnRjX3cpKTsK PiArCj4gKwlEUk1fREVCVUdfRFJJVkVSKCJGcm9udGVuZCBob3Jpem9udGFsIHNjYWxpbmcgZmFj dG9yICVkLiVkXG4iLCAxLCAwKTsKPiArCXJlZ21hcF93cml0ZShmcm9udGVuZC0+cmVncywgU1VO NElfRlJPTlRFTkRfQ0gwX0hPUlpGQUNUX1JFRywKPiArCQkgICAgIHN0YXRlLT5zcmNfdyAvIHN0 YXRlLT5jcnRjX3cpOwo+ICsJcmVnbWFwX3dyaXRlKGZyb250ZW5kLT5yZWdzLCBTVU40SV9GUk9O VEVORF9DSDFfSE9SWkZBQ1RfUkVHLAo+ICsJCSAgICAgc3RhdGUtPnNyY193IC8gc3RhdGUtPmNy dGNfdyk7Cj4gKwo+ICsJRFJNX0RFQlVHX0RSSVZFUigiRnJvbnRlbmQgdmVydGljYWwgc2NhbGlu ZyBmYWN0b3IgJWQuJWRcbiIsIDEsIDApOwo+ICsJcmVnbWFwX3dyaXRlKGZyb250ZW5kLT5yZWdz LCBTVU40SV9GUk9OVEVORF9DSDBfVkVSVEZBQ1RfUkVHLAo+ICsJCSAgICAgc3RhdGUtPnNyY19o IC8gc3RhdGUtPmNydGNfaCk7Cj4gKwlyZWdtYXBfd3JpdGUoZnJvbnRlbmQtPnJlZ3MsIFNVTjRJ X0ZST05URU5EX0NIMV9WRVJURkFDVF9SRUcsCj4gKwkJICAgICBzdGF0ZS0+c3JjX2ggLyBzdGF0 ZS0+Y3J0Y19oKTsKPiArCj4gKwlyZWdtYXBfd3JpdGVfYml0cyhmcm9udGVuZC0+cmVncywgU1VO NElfRlJPTlRFTkRfRlJNX0NUUkxfUkVHLAo+ICsJCQkgIFNVTjRJX0ZST05URU5EX0ZSTV9DVFJM X1JFR19SRFksCj4gKwkJCSAgU1VONElfRlJPTlRFTkRfRlJNX0NUUkxfUkVHX1JEWSk7Cj4gK30K PiArRVhQT1JUX1NZTUJPTChzdW40aV9mcm9udGVuZF91cGRhdGVfY29vcmQpOwo+ICsKPiAraW50 IHN1bjRpX2Zyb250ZW5kX2VuYWJsZShzdHJ1Y3Qgc3VuNGlfZnJvbnRlbmQgKmZyb250ZW5kKQo+ ICt7Cj4gKwlyZWdtYXBfd3JpdGVfYml0cyhmcm9udGVuZC0+cmVncywgU1VONElfRlJPTlRFTkRf RlJNX0NUUkxfUkVHLAo+ICsJCQkgIFNVTjRJX0ZST05URU5EX0ZSTV9DVFJMX0ZSTV9TVEFSVCwK PiArCQkJICBTVU40SV9GUk9OVEVORF9GUk1fQ1RSTF9GUk1fU1RBUlQpOwo+ICsKPiArCXJldHVy biAwOwo+ICt9Cj4gK0VYUE9SVF9TWU1CT0woc3VuNGlfZnJvbnRlbmRfZW5hYmxlKTsKPiArCj4g K3N0YXRpYyBzdHJ1Y3QgcmVnbWFwX2NvbmZpZyBzdW40aV9mcm9udGVuZF9yZWdtYXBfY29uZmln ID0gewo+ICsJLnJlZ19iaXRzCT0gMzIsCj4gKwkudmFsX2JpdHMJPSAzMiwKPiArCS5yZWdfc3Ry aWRlCT0gNCwKPiArCS5tYXhfcmVnaXN0ZXIJPSAweDBhMTQsCj4gK307Cj4gKwo+ICtzdGF0aWMg aW50IHN1bjRpX2Zyb250ZW5kX2JpbmQoc3RydWN0IGRldmljZSAqZGV2LCBzdHJ1Y3QgZGV2aWNl ICptYXN0ZXIsCj4gKwkJCSB2b2lkICpkYXRhKQo+ICt7Cj4gKwlzdHJ1Y3QgcGxhdGZvcm1fZGV2 aWNlICpwZGV2ID0gdG9fcGxhdGZvcm1fZGV2aWNlKGRldik7Cj4gKwlzdHJ1Y3Qgc3VuNGlfZnJv bnRlbmQgKmZyb250ZW5kOwo+ICsJc3RydWN0IGRybV9kZXZpY2UgKmRybSA9IGRhdGE7Cj4gKwlz dHJ1Y3Qgc3VuNGlfZHJ2ICpkcnYgPSBkcm0tPmRldl9wcml2YXRlOwo+ICsJc3RydWN0IHJlc291 cmNlICpyZXM7Cj4gKwl2b2lkIF9faW9tZW0gKnJlZ3M7Cj4gKwo+ICsJZnJvbnRlbmQgPSBkZXZt X2t6YWxsb2MoZGV2LCBzaXplb2YoKmZyb250ZW5kKSwgR0ZQX0tFUk5FTCk7Cj4gKwlpZiAoIWZy b250ZW5kKQo+ICsJCXJldHVybiAtRU5PTUVNOwoKQmxhbmsgbGluZSA/Cgo+ICsJZGV2X3NldF9k cnZkYXRhKGRldiwgZnJvbnRlbmQpOwo+ICsJZnJvbnRlbmQtPm5vZGUgPSBkZXYtPm9mX25vZGU7 Cj4gKwo+ICsJcmVzID0gcGxhdGZvcm1fZ2V0X3Jlc291cmNlKHBkZXYsIElPUkVTT1VSQ0VfTUVN LCAwKTsKPiArCXJlZ3MgPSBkZXZtX2lvcmVtYXBfcmVzb3VyY2UoZGV2LCByZXMpOwo+ICsJaWYg KElTX0VSUihyZWdzKSkKPiArCQlyZXR1cm4gUFRSX0VSUihyZWdzKTsKPiArCj4gKwlmcm9udGVu ZC0+cmVncyA9IGRldm1fcmVnbWFwX2luaXRfbW1pbyhkZXYsIHJlZ3MsCj4gKwkJCQkJICAgICAg ICZzdW40aV9mcm9udGVuZF9yZWdtYXBfY29uZmlnKTsKPiArCWlmIChJU19FUlIoZnJvbnRlbmQt PnJlZ3MpKSB7Cj4gKwkJZGV2X2VycihkZXYsICJDb3VsZG4ndCBjcmVhdGUgdGhlIGZyb250ZW5k IHJlZ21hcFxuIik7Cj4gKwkJcmV0dXJuIFBUUl9FUlIoZnJvbnRlbmQtPnJlZ3MpOwo+ICsJfQo+ ICsKPiArCWZyb250ZW5kLT5yZXNldCA9IGRldm1fcmVzZXRfY29udHJvbF9nZXQoZGV2LCBOVUxM KTsKPiArCWlmIChJU19FUlIoZnJvbnRlbmQtPnJlc2V0KSkgewo+ICsJCWRldl9lcnIoZGV2LCAi Q291bGRuJ3QgZ2V0IG91ciByZXNldCBsaW5lXG4iKTsKPiArCQlyZXR1cm4gUFRSX0VSUihmcm9u dGVuZC0+cmVzZXQpOwo+ICsJfQo+ICsKPiArCWZyb250ZW5kLT5idXNfY2xrID0gZGV2bV9jbGtf Z2V0KGRldiwgImFoYiIpOwo+ICsJaWYgKElTX0VSUihmcm9udGVuZC0+YnVzX2NsaykpIHsKPiAr CQlkZXZfZXJyKGRldiwgIkNvdWxkbid0IGdldCBvdXIgYnVzIGNsb2NrXG4iKTsKPiArCQlyZXR1 cm4gUFRSX0VSUihmcm9udGVuZC0+YnVzX2Nsayk7Cj4gKwl9Cj4gKwo+ICsJZnJvbnRlbmQtPm1v ZF9jbGsgPSBkZXZtX2Nsa19nZXQoZGV2LCAibW9kIik7Cj4gKwlpZiAoSVNfRVJSKGZyb250ZW5k LT5tb2RfY2xrKSkgewo+ICsJCWRldl9lcnIoZGV2LCAiQ291bGRuJ3QgZ2V0IG91ciBtb2QgY2xv Y2tcbiIpOwo+ICsJCXJldHVybiBQVFJfRVJSKGZyb250ZW5kLT5tb2RfY2xrKTsKPiArCX0KPiAr Cj4gKwlmcm9udGVuZC0+cmFtX2NsayA9IGRldm1fY2xrX2dldChkZXYsICJyYW0iKTsKPiArCWlm IChJU19FUlIoZnJvbnRlbmQtPnJhbV9jbGspKSB7Cj4gKwkJZGV2X2VycihkZXYsICJDb3VsZG4n dCBnZXQgb3VyIHJhbSBjbG9ja1xuIik7Cj4gKwkJcmV0dXJuIFBUUl9FUlIoZnJvbnRlbmQtPnJh bV9jbGspOwo+ICsJfQo+ICsKPiArCWxpc3RfYWRkX3RhaWwoJmZyb250ZW5kLT5saXN0LCAmZHJ2 LT5mcm9udGVuZF9saXN0KTsKPiArCj4gKwlyZXR1cm4gMDsKPiArfQo+ICsKPiArc3RhdGljIHZv aWQgc3VuNGlfZnJvbnRlbmRfdW5iaW5kKHN0cnVjdCBkZXZpY2UgKmRldiwgc3RydWN0IGRldmlj ZSAqbWFzdGVyLAo+ICsJCQkgICAgdm9pZCAqZGF0YSkKPiArewo+ICsJc3RydWN0IHN1bjRpX2Zy b250ZW5kICpmcm9udGVuZCA9IGRldl9nZXRfZHJ2ZGF0YShkZXYpOwo+ICsKPiArCWNsa19kaXNh YmxlX3VucHJlcGFyZShmcm9udGVuZC0+bW9kX2Nsayk7Cj4gKwljbGtfZGlzYWJsZV91bnByZXBh cmUoZnJvbnRlbmQtPmJ1c19jbGspOwoKQmxhbmsgbGluZSA/Cgo+ICsJcmVzZXRfY29udHJvbF9h c3NlcnQoZnJvbnRlbmQtPnJlc2V0KTsKPiArfQo+ICsKPiArc3RhdGljIGNvbnN0IHN0cnVjdCBj b21wb25lbnRfb3BzIHN1bjRpX2Zyb250ZW5kX29wcyA9IHsKPiArCS5iaW5kCT0gc3VuNGlfZnJv bnRlbmRfYmluZCwKPiArCS51bmJpbmQJPSBzdW40aV9mcm9udGVuZF91bmJpbmQsCj4gK307Cj4g Kwo+ICtzdGF0aWMgaW50IHN1bjRpX2Zyb250ZW5kX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZp Y2UgKnBkZXYpCj4gK3sKPiArCXJldHVybiBjb21wb25lbnRfYWRkKCZwZGV2LT5kZXYsICZzdW40 aV9mcm9udGVuZF9vcHMpOwo+ICt9Cj4gKwo+ICtzdGF0aWMgaW50IHN1bjRpX2Zyb250ZW5kX3Jl bW92ZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQo+ICt7Cj4gKwljb21wb25lbnRfZGVs KCZwZGV2LT5kZXYsICZzdW40aV9mcm9udGVuZF9vcHMpOwo+ICsKPiArCXJldHVybiAwOwo+ICt9 Cj4gKwo+ICtzdGF0aWMgY29uc3Qgc3RydWN0IG9mX2RldmljZV9pZCBzdW40aV9mcm9udGVuZF9v Zl90YWJsZVtdID0gewo+ICsJeyAuY29tcGF0aWJsZSA9ICJhbGx3aW5uZXIsc3VuNWktYTEzLWRp c3BsYXktZnJvbnRlbmQiIH0sCj4gKwl7IC5jb21wYXRpYmxlID0gImFsbHdpbm5lcixzdW42aS1h MzEtZGlzcGxheS1mcm9udGVuZCIgfSwKPiArCXsgLmNvbXBhdGlibGUgPSAiYWxsd2lubmVyLHN1 bjhpLWEzMy1kaXNwbGF5LWZyb250ZW5kIiB9LAo+ICsJeyB9Cj4gK307Cj4gK01PRFVMRV9ERVZJ Q0VfVEFCTEUob2YsIHN1bjRpX2Zyb250ZW5kX29mX3RhYmxlKTsKPiArCj4gK3N0YXRpYyBzdHJ1 Y3QgcGxhdGZvcm1fZHJpdmVyIHN1bjRpX2Zyb250ZW5kX2RyaXZlciA9IHsKPiArCS5wcm9iZQkJ PSBzdW40aV9mcm9udGVuZF9wcm9iZSwKPiArCS5yZW1vdmUJCT0gc3VuNGlfZnJvbnRlbmRfcmVt b3ZlLAo+ICsJLmRyaXZlcgkJPSB7Cj4gKwkJLm5hbWUJCT0gInN1bjRpLWZyb250ZW5kIiwKPiAr CQkub2ZfbWF0Y2hfdGFibGUJPSBzdW40aV9mcm9udGVuZF9vZl90YWJsZSwKPiArCX0sCj4gK307 Cj4gK21vZHVsZV9wbGF0Zm9ybV9kcml2ZXIoc3VuNGlfZnJvbnRlbmRfZHJpdmVyKTsKPiArCj4g K01PRFVMRV9BVVRIT1IoIk1heGltZSBSaXBhcmQgPG1heGltZS5yaXBhcmRAZnJlZS1lbGVjdHJv bnMuY29tPiIpOwo+ICtNT0RVTEVfREVTQ1JJUFRJT04oIkFsbHdpbm5lciBBMTAgRGlzcGxheSBF bmdpbmUgRnJvbnRlbmQgRHJpdmVyIik7Cj4gK01PRFVMRV9MSUNFTlNFKCJHUEwiKTsKPiBkaWZm IC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2Zyb250ZW5kLmggYi9kcml2ZXJz L2dwdS9kcm0vc3VuNGkvc3VuNGlfZnJvbnRlbmQuaAo+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4g aW5kZXggMDAwMDAwMDAwMDAwLi4yZGY5ZjZkZTBmM2YKPiAtLS0gL2Rldi9udWxsCj4gKysrIGIv ZHJpdmVycy9ncHUvZHJtL3N1bjRpL3N1bjRpX2Zyb250ZW5kLmgKPiBAQCAtMCwwICsxLDEwMiBA QAoKLy8gU1BEWC1MaWNlbmNlLUlkZW50aWZpZXIuLi4gbmV3IGZvcm1hdCA/Cgo+ICsvKgo+ICsg KiBDb3B5cmlnaHQgKEMpIDIwMTcgRnJlZSBFbGVjdHJvbnMKPiArICoKPiArICogTWF4aW1lIFJp cGFyZCA8bWF4aW1lLnJpcGFyZEBmcmVlLWVsZWN0cm9ucy5jb20+Cj4gKyAqCj4gKyAqIFRoaXMg cHJvZ3JhbSBpcyBmcmVlIHNvZnR3YXJlOyB5b3UgY2FuIHJlZGlzdHJpYnV0ZSBpdCBhbmQvb3IK PiArICogbW9kaWZ5IGl0IHVuZGVyIHRoZSB0ZXJtcyBvZiB0aGUgR05VIEdlbmVyYWwgUHVibGlj IExpY2Vuc2UgYXMKPiArICogcHVibGlzaGVkIGJ5IHRoZSBGcmVlIFNvZnR3YXJlIEZvdW5kYXRp b247IGVpdGhlciB2ZXJzaW9uIDIgb2YKPiArICogdGhlIExpY2Vuc2UsIG9yIChhdCB5b3VyIG9w dGlvbikgYW55IGxhdGVyIHZlcnNpb24uCj4gKyAqLwo+ICsKPiArI2lmbmRlZiBfU1VONElfRlJP TlRFTkRfSF8KPiArI2RlZmluZSBfU1VONElfRlJPTlRFTkRfSF8KPiArCj4gKyNpbmNsdWRlIDxs aW51eC9hdG9taWMuaD4KPiArI2luY2x1ZGUgPGxpbnV4L2xpc3QuaD4KPiArCj4gKyNkZWZpbmUg U1VONElfRlJPTlRFTkRfRU5fUkVHCQkJMHgwMDAKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9F Tl9FTgkJCQlCSVQoMCkKPiArCj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfRlJNX0NUUkxfUkVH CQkweDAwNAo+ICsjZGVmaW5lIFNVTjRJX0ZST05URU5EX0ZSTV9DVFJMX0ZSTV9TVEFSVAkJQklU KDE2KQo+ICsjZGVmaW5lIFNVTjRJX0ZST05URU5EX0ZSTV9DVFJMX0NPRUZfUkRZCQlCSVQoMSkK PiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9GUk1fQ1RSTF9SRUdfUkRZCQkJQklUKDApCj4gKwo+ ICsjZGVmaW5lIFNVTjRJX0ZST05URU5EX0JZUEFTU19SRUcJCTB4MDA4Cj4gKyNkZWZpbmUgU1VO NElfRlJPTlRFTkRfQllQQVNTX0NTQ19FTgkJCUJJVCgxKQo+ICsKPiArI2RlZmluZSBTVU40SV9G Uk9OVEVORF9CVUZfQUREUjBfUkVHCQkweDAyMAo+ICsKPiArI2RlZmluZSBTVU40SV9GUk9OVEVO RF9MSU5FU1RSRDBfUkVHCQkweDA0MAo+ICsKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9JTlBV VF9GTVRfUkVHCQkweDA0Ywo+ICsjZGVmaW5lIFNVTjRJX0ZST05URU5EX0lOUFVUX0ZNVF9EQVRB X01PRChtb2QpCQkoKG1vZCkgPDwgOCkKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9JTlBVVF9G TVRfREFUQV9GTVQoZm10KQkJKChmbXQpIDw8IDQpCj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRf SU5QVVRfRk1UX1BTKHBzKQkJCShwcykKPiArCj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfT1VU UFVUX0ZNVF9SRUcJCTB4MDVjCj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfT1VUUFVUX0ZNVF9E QVRBX0ZNVChmbXQpCQkoZm10KQo+ICsKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9DSDBfSU5T SVpFX1JFRwkJMHgxMDAKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9JTlNJWkUoaCwgdykJCQko KCgoaCkgLSAxKSA8PCAxNikgfCAoKCh3KSAtIDEpKSkKPiArCj4gKyNkZWZpbmUgU1VONElfRlJP TlRFTkRfQ0gwX09VVFNJWkVfUkVHCQkweDEwNAo+ICsjZGVmaW5lIFNVTjRJX0ZST05URU5EX09V VFNJWkUoaCwgdykJCQkoKCgoaCkgLSAxKSA8PCAxNikgfCAoKCh3KSAtIDEpKSkKPiArCj4gKyNk ZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gwX0hPUlpGQUNUX1JFRwkJMHgxMDgKPiArI2RlZmluZSBT VU40SV9GUk9OVEVORF9IT1JaRkFDVChpLCBmKQkJCSgoKGkpIDw8IDE2KSB8IChmKSkKPiArCj4g KyNkZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gwX1ZFUlRGQUNUX1JFRwkJMHgxMGMKPiArI2RlZmlu ZSBTVU40SV9GUk9OVEVORF9WRVJURkFDVChpLCBmKQkJCSgoKGkpIDw8IDE2KSB8IChmKSkKPiAr Cj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gwX0hPUlpQSEFTRV9SRUcJMHgxMTAKPiArI2Rl ZmluZSBTVU40SV9GUk9OVEVORF9DSDBfVkVSVFBIQVNFMF9SRUcJMHgxMTQKPiArI2RlZmluZSBT VU40SV9GUk9OVEVORF9DSDBfVkVSVFBIQVNFMV9SRUcJMHgxMTgKPiArCj4gKyNkZWZpbmUgU1VO NElfRlJPTlRFTkRfQ0gxX0lOU0laRV9SRUcJCTB4MjAwCj4gKyNkZWZpbmUgU1VONElfRlJPTlRF TkRfQ0gxX09VVFNJWkVfUkVHCQkweDIwNAo+ICsjZGVmaW5lIFNVTjRJX0ZST05URU5EX0NIMV9I T1JaRkFDVF9SRUcJCTB4MjA4Cj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gxX1ZFUlRGQUNU X1JFRwkJMHgyMGMKPiArCj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gxX0hPUlpQSEFTRV9S RUcJMHgyMTAKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9DSDFfVkVSVFBIQVNFMF9SRUcJMHgy MTQKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9DSDFfVkVSVFBIQVNFMV9SRUcJMHgyMTgKPiAr Cj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gwX0hPUlpDT0VGMF9SRUcoaSkJKDB4NDAwICsg aSAqIDQpCj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gwX0hPUlpDT0VGMV9SRUcoaSkJKDB4 NDgwICsgaSAqIDQpCj4gKyNkZWZpbmUgU1VONElfRlJPTlRFTkRfQ0gwX1ZFUlRDT0VGX1JFRyhp KQkoMHg1MDAgKyBpICogNCkKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9DSDFfSE9SWkNPRUYw X1JFRyhpKQkoMHg2MDAgKyBpICogNCkKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9DSDFfSE9S WkNPRUYxX1JFRyhpKQkoMHg2ODAgKyBpICogNCkKPiArI2RlZmluZSBTVU40SV9GUk9OVEVORF9D SDFfVkVSVENPRUZfUkVHKGkpCSgweDcwMCArIGkgKiA0KQo+ICsKPiArc3RydWN0IGNsazsKPiAr c3RydWN0IGRldmljZV9ub2RlOwo+ICtzdHJ1Y3QgZHJtX3BsYW5lOwo+ICtzdHJ1Y3QgcmVnbWFw Owo+ICtzdHJ1Y3QgcmVzZXRfY29udHJvbDsKPiArCj4gK3N0cnVjdCBzdW40aV9mcm9udGVuZCB7 Cj4gKwlzdHJ1Y3QgbGlzdF9oZWFkCWxpc3Q7Cj4gKwlhdG9taWNfdAkJdXNlcnM7Cj4gKwlzdHJ1 Y3QgZGV2aWNlX25vZGUJKm5vZGU7Cj4gKwo+ICsJc3RydWN0IGNsawkJKmJ1c19jbGs7Cj4gKwlz dHJ1Y3QgY2xrCQkqbW9kX2NsazsKPiArCXN0cnVjdCBjbGsJCSpyYW1fY2xrOwo+ICsJc3RydWN0 IHJlZ21hcAkJKnJlZ3M7Cj4gKwlzdHJ1Y3QgcmVzZXRfY29udHJvbAkqcmVzZXQ7Cj4gK307Cj4g Kwo+ICtpbnQgc3VuNGlfZnJvbnRlbmRfaW5pdChzdHJ1Y3Qgc3VuNGlfZnJvbnRlbmQgKmZyb250 ZW5kKTsKPiArdm9pZCBzdW40aV9mcm9udGVuZF9leGl0KHN0cnVjdCBzdW40aV9mcm9udGVuZCAq ZnJvbnRlbmQpOwo+ICtpbnQgc3VuNGlfZnJvbnRlbmRfZW5hYmxlKHN0cnVjdCBzdW40aV9mcm9u dGVuZCAqZnJvbnRlbmQpOwo+ICsKPiArdm9pZCBzdW40aV9mcm9udGVuZF91cGRhdGVfYnVmZmVy KHN0cnVjdCBzdW40aV9mcm9udGVuZCAqZnJvbnRlbmQsCj4gKwkJCQkgIHN0cnVjdCBkcm1fcGxh bmUgKnBsYW5lKTsKPiArdm9pZCBzdW40aV9mcm9udGVuZF91cGRhdGVfY29vcmQoc3RydWN0IHN1 bjRpX2Zyb250ZW5kICpmcm9udGVuZCwKPiArCQkJCSBzdHJ1Y3QgZHJtX3BsYW5lICpwbGFuZSk7 Cj4gK2ludCBzdW40aV9mcm9udGVuZF91cGRhdGVfZm9ybWF0cyhzdHJ1Y3Qgc3VuNGlfZnJvbnRl bmQgKmZyb250ZW5kLAo+ICsJCQkJICBzdHJ1Y3QgZHJtX3BsYW5lICpwbGFuZSwgdWludDMyX3Qg b3V0X2ZtdCk7Cj4gKwo+ICsjZW5kaWYgLyogX1NVTjRJX0ZST05URU5EX0hfICovCj4gCgpBcGFy dCB0aGVzZSBuaXRzLApSZXZpZXdlZC1ieTogTmVpbCBBcm1zdHJvbmcgPG5hcm1zdHJvbmdAYmF5 bGlicmUuY29tPgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f XwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcK aHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK