All of lore.kernel.org
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Stanimir Varbanov <svarbanov@mm-sol.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v3 4/5] dt-bindings: pci/qcom,pcie: support additional MSI interrupts
Date: Thu, 28 Apr 2022 14:05:33 +0200	[thread overview]
Message-ID: <08a95e20-4d1e-57f8-2ed5-d0223ae8487a@linaro.org> (raw)
In-Reply-To: <20220427121653.3158569-5-dmitry.baryshkov@linaro.org>

On 27/04/2022 14:16, Dmitry Baryshkov wrote:
> On Qualcomm platforms each group of 32 MSI vectors is routed to the
> separate GIC interrupt. Document mapping of additional interrupts.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

  reply	other threads:[~2022-04-28 12:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-27 12:16 [PATCH v3 0/5] PCI: qcom: Fix higher MSI vectors handling Dmitry Baryshkov
2022-04-27 12:16 ` [PATCH v3 1/5] PCI: dwc: Convert msi_irq to the array Dmitry Baryshkov
2022-04-27 14:13   ` Manivannan Sadhasivam
2022-04-27 16:59     ` Dmitry Baryshkov
2022-04-28  6:06       ` Manivannan Sadhasivam
2022-04-28  7:43         ` Dmitry Baryshkov
2022-04-28  7:47           ` Manivannan Sadhasivam
2022-04-27 12:16 ` [PATCH v3 2/5] PCI: dwc: Teach dwc core to parse additional MSI interrupts Dmitry Baryshkov
2022-04-27 12:16 ` [PATCH v3 3/5] PCI: qcom: Handle MSI IRQs properly Dmitry Baryshkov
2022-04-27 12:16 ` [PATCH v3 4/5] dt-bindings: pci/qcom,pcie: support additional MSI interrupts Dmitry Baryshkov
2022-04-28 12:05   ` Krzysztof Kozlowski [this message]
2022-04-27 12:16 ` [PATCH v3 5/5] arm64: dts: qcom: sm8250: provide " Dmitry Baryshkov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=08a95e20-4d1e-57f8-2ed5-d0223ae8487a@linaro.org \
    --to=krzysztof.kozlowski@linaro.org \
    --cc=agross@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=bjorn.andersson@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@linaro.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=robh+dt@kernel.org \
    --cc=svarbanov@mm-sol.com \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.