From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Tue, 21 Feb 2017 16:30:43 +0100 Subject: [U-Boot] [PATCH v2 2/2] board: ge: bx50v3: apply the proper register setting to fix the voltage peak issue In-Reply-To: <20170221015656.23555-2-yungching0725@gmail.com> References: <20170221015656.23555-1-yungching0725@gmail.com> <20170221015656.23555-2-yungching0725@gmail.com> Message-ID: <097f7522-7a56-0e4c-1de1-7f7b7fc06956@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 21/02/2017 02:56, Ken Lin wrote: > Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register > to avoid the voltage peak issue while we do the IEEE PHY comformance test > > Signed-off-by: Ken Lin > --- > Changes from v1 > - New commit message > > board/ge/bx50v3/bx50v3.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c > index 80b4ba1b8b..0acf655c0e 100644 > --- a/board/ge/bx50v3/bx50v3.c > +++ b/board/ge/bx50v3/bx50v3.c > @@ -307,7 +307,8 @@ static int mx6_rgmii_rework(struct phy_device *phydev) > /* set debug port address: SerDes Test and System Mode Control */ > phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); > /* enable rgmii tx clock delay */ > - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); > + /* set the reserved bits to avoid board specific voltage peak issue*/ > + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); > > return 0; > } > Reviewed-by: Stefano Babic Best regards, Stefano Babic -- Meet DENX at the Embedded World Trade Show 14 Mar - 16 Mar 2017, Nuremberg Trade Fair Centre, Hall 4, Booth 581 -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================