[U-Boot] [PATCH 1/4] ARM: tegra: pinctrl: move Tegra210 code to the correct dir

[U-Boot] [PATCH 1/4] ARM: tegra: pinctrl: move Tegra210 code to the correct dir

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

Patches that added the Tegra210 pinctrl driver and renamed directories
arch/arm/cpu/tegra{$soc}-common -> arch/arm/mach-tegra/tegra-${soc}
crossed. Move the Tegra210 pinctrl driver to the correct location. This
wasn't detected since Tegra210 support is in the process of being added,
and isn't buildable yet.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
This series mainly adds support for configuring the MIPI pad control
registers, along with a few fixes/cleanups first. I'll enhance the
Jetson TK1 pinmux header to actually include MIPI pad control settings
as soon as I've cleared up one other change in the latest spreadsheet.
---
 arch/arm/{cpu/tegra210-common => mach-tegra/tegra210}/pinmux.c | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename arch/arm/{cpu/tegra210-common => mach-tegra/tegra210}/pinmux.c (100%)

diff --git a/arch/arm/cpu/tegra210-common/pinmux.c b/arch/arm/mach-tegra/tegra210/pinmux.c
similarity index 100%
rename from arch/arm/cpu/tegra210-common/pinmux.c
rename to arch/arm/mach-tegra/tegra210/pinmux.c
-- 
1.9.1

[U-Boot] [PATCH 2/4] ARM: tegra: pinctrl: minor cleanup

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.

Fix typo in ifdef comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/include/asm/arch-tegra/pinmux.h | 20 ++++++++++----------
 arch/arm/mach-tegra/pinmux-common.c      |  2 +-
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h
index 4212e5769930..e3eb706fcb8f 100644
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -170,6 +170,16 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io);
 void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
 				int len);
 
+struct pmux_pingrp_desc {
+	u8 funcs[4];
+#if defined(CONFIG_TEGRA20)
+	u8 ctl_id;
+	u8 pull_id;
+#endif /* CONFIG_TEGRA20 */
+};
+
+extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
+
 #ifdef TEGRA_PMX_SOC_HAS_DRVGRPS
 
 #define PMUX_SLWF_MIN	0
@@ -219,14 +229,4 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
 
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
 
-struct pmux_pingrp_desc {
-	u8 funcs[4];
-#if defined(CONFIG_TEGRA20)
-	u8 ctl_id;
-	u8 pull_id;
-#endif /* CONFIG_TEGRA20 */
-};
-
-extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
-
 #endif /* _TEGRA_PINMUX_H_ */
diff --git a/arch/arm/mach-tegra/pinmux-common.c b/arch/arm/mach-tegra/pinmux-common.c
index 912f65e98b06..96dbb5e89b7d 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -695,4 +695,4 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
 	for (i = 0; i < len; i++)
 		pinmux_config_drvgrp(&config[i]);
 }
-#endif /* TEGRA_PMX_HAS_DRVGRPS */
+#endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
-- 
1.9.1

[U-Boot] [PATCH 3/4] ARM: tegra: pinctrl: add support for MIPI PAD control groups

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

Some pinmux controls are in a different register set. Add support for
manipulating those in a similar way to existing pins/groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/include/asm/arch-tegra/pinmux.h | 16 +++++++++
 arch/arm/mach-tegra/pinmux-common.c      | 57 ++++++++++++++++++++++++++++++++
 2 files changed, 73 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h
index e3eb706fcb8f..3cc52dd7731a 100644
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -229,4 +229,20 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
 
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
 
+#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
+struct pmux_mipipadctrlgrp_config {
+	u32 grp:16;	/* pin group PMUX_MIPIPADCTRLGRP_x   */
+	u32 func:8;	/* function to assign PMUX_FUNC_... */
+};
+
+void pinmux_config_mipipadctrlgrp_table(
+	const struct pmux_mipipadctrlgrp_config *config, int len);
+
+struct pmux_mipipadctrlgrp_desc {
+	u8 funcs[2];
+};
+
+extern const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups;
+#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */
+
 #endif /* _TEGRA_PINMUX_H_ */
diff --git a/arch/arm/mach-tegra/pinmux-common.c b/arch/arm/mach-tegra/pinmux-common.c
index 96dbb5e89b7d..b4a1432afcb1 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -108,6 +108,8 @@
 
 #define DRV_REG(group)	_R(TEGRA_PMX_SOC_DRV_GROUP_BASE_REG + ((group) * 4))
 
+#define MIPIPADCTRL_REG(group)	_R(TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG + ((group) * 4))
+
 /*
  * We could force arch-tegraNN/pinmux.h to define all of these. However,
  * that's a lot of defines, and for now it's manageable to just put a
@@ -696,3 +698,58 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
 		pinmux_config_drvgrp(&config[i]);
 }
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
+
+#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
+
+#define pmux_mipipadctrlgrp_isvalid(pd) (((pd) >= 0) && ((pd) < PMUX_MIPIPADCTRLGRP_COUNT))
+
+static void pinmux_mipipadctrl_set_func(enum pmux_mipipadctrlgrp grp,
+	enum pmux_func func)
+{
+	u32 *reg = MIPIPADCTRL_REG(grp);
+	int i, mux = -1;
+	u32 val;
+
+	if (func == PMUX_FUNC_DEFAULT)
+		return;
+
+	/* Error check grp and func */
+	assert(pmux_mipipadctrlgrp_isvalid(grp));
+	assert(pmux_func_isvalid(func));
+
+	if (func >= PMUX_FUNC_RSVD1) {
+		mux = (func - PMUX_FUNC_RSVD1) & 1;
+	} else {
+		/* Search for the appropriate function */
+		for (i = 0; i < 2; i++) {
+			if (tegra_soc_mipipadctrl_groups[grp].funcs[i]
+			    == func) {
+				mux = i;
+				break;
+			}
+		}
+	}
+	assert(mux != -1);
+
+	val = readl(reg);
+	val &= ~(1 << 1);
+	val |= (mux << 1);
+	writel(val, reg);
+}
+
+static void pinmux_config_mipipadctrlgrp(const struct pmux_mipipadctrlgrp_config *config)
+{
+	enum pmux_mipipadctrlgrp grp = config->grp;
+
+	pinmux_mipipadctrl_set_func(grp, config->func);
+}
+
+void pinmux_config_mipipadctrlgrp_table(
+	const struct pmux_mipipadctrlgrp_config *config, int len)
+{
+	int i;
+
+	for (i = 0; i < len; i++)
+		pinmux_config_mipipadctrlgrp(&config[i]);
+}
+#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */
-- 
1.9.1

[U-Boot] [PATCH 4/4] ARM: tegra: enable MIPI PAD CTRL support for Tegra124

[Stephen Warren]

From: Stephen Warren <swarren@nvidia.com>

This allows selection between CSI and DSI_B on the MIPI pads.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/include/asm/arch-tegra124/pinmux.h |  9 +++++++++
 arch/arm/mach-tegra/tegra124/pinmux.c       | 17 +++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h b/arch/arm/include/asm/arch-tegra124/pinmux.h
index 78bc9e6f178b..9fcbb0f80b4b 100644
--- a/arch/arm/include/asm/arch-tegra124/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra124/pinmux.h
@@ -246,6 +246,11 @@ enum pmux_drvgrp {
 	PMUX_DRVGRP_COUNT,
 };
 
+enum pmux_mipipadctrlgrp {
+	PMUX_MIPIPADCTRLGRP_DSI_B,
+	PMUX_MIPIPADCTRLGRP_COUNT,
+};
+
 enum pmux_func {
 	PMUX_FUNC_DEFAULT,
 	PMUX_FUNC_BLINK,
@@ -255,6 +260,7 @@ enum pmux_func {
 	PMUX_FUNC_CLK,
 	PMUX_FUNC_CLK12,
 	PMUX_FUNC_CPU,
+	PMUX_FUNC_CSI,
 	PMUX_FUNC_DAP,
 	PMUX_FUNC_DAP1,
 	PMUX_FUNC_DAP2,
@@ -263,6 +269,7 @@ enum pmux_func {
 	PMUX_FUNC_DISPLAYA_ALT,
 	PMUX_FUNC_DISPLAYB,
 	PMUX_FUNC_DP,
+	PMUX_FUNC_DSI_B,
 	PMUX_FUNC_DTV,
 	PMUX_FUNC_EXTPERIPH1,
 	PMUX_FUNC_EXTPERIPH2,
@@ -336,8 +343,10 @@ enum pmux_func {
 };
 
 #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
+#define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG 0x820
 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING
 #define TEGRA_PMX_SOC_HAS_DRVGRPS
+#define TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
 #define TEGRA_PMX_GRPS_HAVE_LPMD
 #define TEGRA_PMX_GRPS_HAVE_SCHMT
 #define TEGRA_PMX_GRPS_HAVE_HSM
diff --git a/arch/arm/mach-tegra/tegra124/pinmux.c b/arch/arm/mach-tegra/tegra124/pinmux.c
index c6685eaae1e9..4629b4676c4a 100644
--- a/arch/arm/mach-tegra/tegra124/pinmux.c
+++ b/arch/arm/mach-tegra/tegra124/pinmux.c
@@ -304,3 +304,20 @@ static const struct pmux_pingrp_desc tegra124_pingroups[] = {
 	PIN(DP_HPD_PFF0,            DP,         RSVD2,    RSVD3,        RSVD4),
 };
 const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups;
+
+#define MIPIPADCTRL_GRP(grp, f0, f1)	\
+	{				\
+		.funcs = {		\
+			PMUX_FUNC_##f0,	\
+			PMUX_FUNC_##f1,	\
+		},			\
+	}
+
+#define MIPIPADCTRL_RESERVED {}
+
+static const struct pmux_mipipadctrlgrp_desc tegra124_mipipadctrl_groups[] = {
+	/*              pin,   f0,  f1 */
+	/* Offset 0x820 */
+	MIPIPADCTRL_GRP(DSI_B, CSI, DSI_B),
+};
+const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups = tegra124_mipipadctrl_groups;
-- 
1.9.1

[U-Boot] [PATCH 1/4] ARM: tegra: pinctrl: move Tegra210 code to the correct dir

[Tom Warren]

Stephen,

Applied this series to u-boot-tegra/next. I'm still working on some of Simon's and Marcel's latest patches; when I'm done I'll push a new /next to Denx.

Tom

> -----Original Message-----
> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
> Sent: Wednesday, March 25, 2015 11:05 AM
> To: u-boot at lists.denx.de; Simon Glass; Tom Warren; Stephen Warren
> Subject: [PATCH 1/4] ARM: tegra: pinctrl: move Tegra210 code to the correct
> dir
> 
> From: Stephen Warren <swarren@nvidia.com>
> 
> Patches that added the Tegra210 pinctrl driver and renamed directories
> arch/arm/cpu/tegra{$soc}-common -> arch/arm/mach-tegra/tegra-${soc}
> crossed. Move the Tegra210 pinctrl driver to the correct location. This wasn't
> detected since Tegra210 support is in the process of being added, and isn't
> buildable yet.
> 
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> This series mainly adds support for configuring the MIPI pad control registers,
> along with a few fixes/cleanups first. I'll enhance the Jetson TK1 pinmux
> header to actually include MIPI pad control settings as soon as I've cleared up
> one other change in the latest spreadsheet.
> ---
>  arch/arm/{cpu/tegra210-common => mach-tegra/tegra210}/pinmux.c | 0
>  1 file changed, 0 insertions(+), 0 deletions(-)  rename
> arch/arm/{cpu/tegra210-common => mach-tegra/tegra210}/pinmux.c (100%)
> 
> diff --git a/arch/arm/cpu/tegra210-common/pinmux.c b/arch/arm/mach-
> tegra/tegra210/pinmux.c
> similarity index 100%
> rename from arch/arm/cpu/tegra210-common/pinmux.c
> rename to arch/arm/mach-tegra/tegra210/pinmux.c
> --
> 1.9.1

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