From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>
Cc: Intel-gfx@lists.freedesktop.org
Subject: Re: [CI 2/9] drm/i915/pmu: Expose a PMU interface for perf queries
Date: Fri, 1 Dec 2017 09:51:16 +0000 [thread overview]
Message-ID: <09a0f854-620d-e2cf-f40b-7219599a5172@linux.intel.com> (raw)
In-Reply-To: <20171201010142.2t5ejy2knrdowabj@intel.com>
On 01/12/2017 01:01, Rodrigo Vivi wrote:
> On Tue, Nov 21, 2017 at 06:18:45PM +0000, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> From: Chris Wilson <chris@chris-wilson.co.uk>
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> From: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
>>
>> The first goal is to be able to measure GPU (and invidual ring) busyness
>> without having to poll registers from userspace. (Which not only incurs
>> holding the forcewake lock indefinitely, perturbing the system, but also
>> runs the risk of hanging the machine.) As an alternative we can use the
>> perf event counter interface to sample the ring registers periodically
>> and send those results to userspace.
>>
>> Functionality we are exporting to userspace is via the existing perf PMU
>> API and can be exercised via the existing tools. For example:
>>
>> perf stat -a -e i915/rcs0-busy/ -I 1000
>>
>> Will print the render engine busynnes once per second. All the performance
>> counters can be enumerated (perf list) and have their unit of measure
>> correctly reported in sysfs.
[snip]
>> +static int i915_pmu_event_init(struct perf_event *event)
>> +{
>> + struct drm_i915_private *i915 =
>> + container_of(event->pmu, typeof(*i915), pmu.base);
>> + int cpu, ret;
>> +
>> + if (event->attr.type != event->pmu->type)
>> + return -ENOENT;
>> +
>> + /* unsupported modes and filters */
>> + if (event->attr.sample_period) /* no sampling */
>> + return -EINVAL;
>> +
>> + if (has_branch_stack(event))
>> + return -EOPNOTSUPP;
>> +
>> + if (event->cpu < 0)
>> + return -EINVAL;
>> +
>> + cpu = cpumask_any_and(&i915_pmu_cpumask,
>> + topology_sibling_cpumask(event->cpu));
>> + if (cpu >= nr_cpu_ids)
>> + return -ENODEV;
>> +
>> + if (is_engine_event(event)) {
>> + ret = engine_event_init(event);
>> + } else {
>> + ret = 0;
>> + switch (event->attr.config) {
>> + case I915_PMU_ACTUAL_FREQUENCY:
>> + if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
>> + /* Requires a mutex for sampling! */
>> + ret = -ENODEV;
>
> Dummy random question...
> Is the missing break here intentional?
> on PMU_ACTUAL_FREQ we should return -ENODEV to gen < 6 || vlv || chv ?
I am not expert on pre-Gen6, but AFAICS yes, none of the frequency code
paths seem to be active on those platforms. Was there some alternative
way of managing frequencies back then, which would make some reporting
still possible? I can't spot anything - Chris?
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-12-01 9:51 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-21 18:18 [CI 1/9] drm/i915: Extract intel_get_cagf Tvrtko Ursulin
2017-11-21 18:18 ` [CI 2/9] drm/i915/pmu: Expose a PMU interface for perf queries Tvrtko Ursulin
2017-12-01 1:01 ` Rodrigo Vivi
2017-12-01 9:51 ` Tvrtko Ursulin [this message]
2017-11-21 18:18 ` [CI 3/9] drm/i915/pmu: Suspend sampling when GPU is idle Tvrtko Ursulin
2017-11-21 18:18 ` [CI 4/9] drm/i915: Wrap context schedule notification Tvrtko Ursulin
2017-11-21 18:18 ` [CI 5/9] drm/i915: Engine busy time tracking Tvrtko Ursulin
2017-11-21 18:18 ` [CI 6/9] drm/i915/pmu: Wire up engine busy stats to PMU Tvrtko Ursulin
2017-11-21 18:18 ` [CI 7/9] drm/i915/pmu: Add interrupt count metric Tvrtko Ursulin
2017-11-21 18:18 ` [CI 8/9] drm/i915: Convert intel_rc6_residency_us to ns Tvrtko Ursulin
2017-11-21 18:18 ` [CI 9/9] drm/i915/pmu: Add RC6 residency metrics Tvrtko Ursulin
2017-11-21 18:40 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/9] drm/i915: Extract intel_get_cagf Patchwork
2017-11-22 11:31 ` Tvrtko Ursulin
2017-11-22 11:34 ` Tomi Sarvela
2017-11-21 19:37 ` ✗ Fi.CI.IGT: warning " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=09a0f854-620d-e2cf-f40b-7219599a5172@linux.intel.com \
--to=tvrtko.ursulin@linux.intel.com \
--cc=Intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
--cc=tursulin@ursulin.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.